KR20100034756A - Semiconductor die having a redistribution layer - Google Patents

Abstract

A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.

Description

Semiconductor die with redistribution layer {SEMICONDUCTOR DIE HAVING A REDISTRIBUTION LAYER}

Embodiments of the present invention relate to a redistribution layer and a redistribution layer for semiconductor devices.

As the demand for portable consumer electronics increases greatly, a large amount of storage devices are required. In order to meet the ever-increasing demands on digital information storage and exchange, nonvolatile semiconductor memory devices such as flash memory storage cards are widely used. Due to their high reliability and large capacity, as well as their portability, versatility and robust design, these memory devices are ideal for use in a variety of electronic devices, such electronic devices being for example Digital cameras, digital music players, video game consoles, PDAs, and cellular telephones.

While a wide range of package configurations are known, flash memory storage cards can generally be manufactured as System-in-a-Package (SiP) or MultiChip Modules (MCM), in which case multiple Dies are mounted and interconnected on a small footprint substrate. Generally, the substrate may comprise a rigid dielectric base with a conductive layer etched on one or both sides. Electrical connections are formed between the die and the conductive layer (s), and the conductive layer (s) provide an electrical lead structure for connecting the die to the host device. After electrical connections are formed between the die and the substrate, the assembly is typically embedded in a molding compound that provides a protective package.

1 shows a top view of a conventional semiconductor package 20 (no molding compound). A typical package includes a plurality of semiconductor dies, such as dies 22 and 24 attached to substrate 26. A plurality of die bond pads 28 may be formed on the semiconductor dies 22 and 24 during the die fabrication process. Similarly, a plurality of contact pads 30 may be formed on the substrate 26. Die 22 may be attached to substrate 26, and die 24 may then be mounted on die 22. The dies are electrically connected to the substrate by attaching a wire bond 32 between each pair of die bond pads 28 and contact pads 30.

Space in the semiconductor package is limited. The semiconductor die is often formed such that bond pads are disposed along two adjacent sides, as shown on die 24 of FIG. 1. However, due to a significant amount of spatial constraints, there may be only space on the substrate for wire bond connections along one edge of the die. Thus, in FIG. 1, there are no contact pads for connection with die bond pads 28a along the edge 34 of the substrate 26.

One known method for coping with this situation is to use a redistribution layer formed on the semiconductor die. After the semiconductor die is fabricated from the wafer and singulated, the die is electrically conductive traces and bond pads (traces 38 and bond pads 40, FIG. 1). The process is formed on the upper surface of the. Once formed, the traces 38 and bond pads 28a may be covered with an insulator and only the newly formed die bond pads 40 may remain exposed. Traces 38 connect existing die bond pads 28a with newly formed die bond pads 40 to die bond to the edge of the die with pin-out connections to the substrate. The pads are effectively rearranged. Additional contact pads 30 may be formed on the substrate to enable electrical connection between the substrate and the bond pads 28a. Additional contact pads may be formed in line with the remaining contact pads 30, as shown in FIG. Alternatively, where there is space available, additional contact pads 30 may be staggered with remaining contact pads as shown in FIG.

Current photolithography and other methods for forming redistribution layers on semiconductor dies are complex and costly because they add a large number of process steps and costs to the manufacturing process. Therefore, a simplified process for forming the redistribution layer is needed.

Embodiments of the present invention relate to a semiconductor device having a redistribution layer and a method of forming the redistribution layer. In one embodiment, after fabricating a semiconductor die on a wafer, a tape assembly is applied to the surface of the wafer to contact the surface of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as the base layer, and further includes a film assembly adhered to the backgrind tape. The film assembly also includes an adhesive film, on which a thin layer of conductive material is deposited.

The tape assembly is applied to the surface of the wafer such that the adhesive layer of the film assembly contacts the surface of the wafer. When applied to a wafer, the adhesive is a b-stage adhesive that adheres to the wafer, but is a b-stage adhesive that is flexible and removable.

After the tape assembly is applied to the surface of the semiconductor wafer, heat focused from, for example, a laser, is applied to the interface between the tape assembly and the wafer. The laser is programmed to focus its energy at the interface between the adhesive layer and the surface of the semiconductor wafer. At locations along the interface where the laser is applied, the adhesive layer is heated and cured to the surface of the semiconductor wafer so that the laser is permanently attached to the semiconductor wafer along the green path (heat is applied).

The path of the laser is computer controlled to draw on each semiconductor die a pattern of redistribution layer to be defined on each semiconductor die. By selectively concentrating heat at the interface between the tape assembly and the wafer, the adhesive layer of the tape assembly can be melted to the surface of each semiconductor die along a thin, sharply defined path. The adhesive layer on both sides of the path defined by focused heat can be on the b-stage or otherwise uncured, and can be peeled off the surface of the wafer, but the molten regions remain on the wafer surface . Thus, as the tape assembly is pulled from the wafer, the heated regions of the film assembly are separated from the unheated regions, and the heated regions of the film assembly remain on the surface of each semiconductor die on each semiconductor die. You will define the redistribution layer pattern.

1 is a top view of a conventional semiconductor package including a semiconductor die having a redistribution layer for repositioning die bond pads from a first edge to a second edge of the die.
FIG. 2 is a top view of a conventional semiconductor package including a die having a redistribution layer as in FIG. 1 with another substrate contact pad configuration.
3 is a perspective view of a semiconductor wafer covered by a tape assembly from a roll of tape, in accordance with an embodiment of the invention.
4 is a side view of a tape assembly disposed over a semiconductor die of a semiconductor wafer, in accordance with an embodiment of the present invention.
5 is a side view of a film assembly including an adhesive layer and a conductive material, in accordance with an embodiment of the present invention.
6 is a side view of a tape assembly attached to a semiconductor die of a semiconductor wafer, which includes a laser drawing a redistribution pattern on the surface of the tape assembly.
FIG. 7 is a top view of a semiconductor die, in which a tape assembly is disposed on the semiconductor die, and the redistribution layer pattern is laser drawn on the tape assembly.
8 is a side view of a tape assembly removed from a semiconductor wafer, leaving the redistribution layer pattern drawn by the laser.
9 shows a plurality of semiconductor die singulated from a wafer.
10 is a top view of a singulated die including a redistribution layer formed in accordance with an embodiment of the invention.
11 is a side view of another method of separating a semiconductor die and a new tape assembly.
12 is a cross-sectional view of a semiconductor package including a semiconductor die having a redistribution layer formed in accordance with an embodiment of the invention.

3-12, embodiments of the present invention will now be described, and these embodiments of the present invention relate to a plurality of die redistribution layers for semiconductor devices and methods of forming the same. It should be understood that the present invention may be embodied in many other forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the present invention to those skilled in the art. Indeed, the invention is intended to cover modifications, modifications and equivalents of these embodiments, all of which fall within the scope and spirit of the invention as defined by the appended claims. In addition, in the following detailed description of the invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that the present invention may be practiced without these specific details.

Referring now to FIG. 3, a top view of a semiconductor wafer 100 is shown that includes a plurality of semiconductor dies 102 (only a few dies are numbered in FIG. 3). Each semiconductor die 102 on the wafer 100 is processed to include an integrated circuit capable of performing certain electronic functions as is known in the art. In other embodiments, a different die may have different integrated circuits, but all the semiconductor die 102 on the wafer 100 may have the same integrated circuit. As is known in the art, each integrated circuit can be tested during wafer fabrication for identification of defective and defective dies.

Upon completion of the wafer fabrication test, each die 102 may generally be singulated into individual dies and then assembled into a semiconductor package. However, in accordance with embodiments of the present invention, a redistribution layer may be formed on each semiconductor die, as described below. 3 also shows a roll 104, which includes a tape assembly 106 for forming a redistribution layer on each die 102 of the wafer 100. The tape assembly 106 may have a width sufficient to be applied on the entire surface of the wafer 100 as shown in FIG. 3. Alternatively, it may be contemplated that the tape assembly 106 has a width sufficient to cover a single row of semiconductor die 102 on the wafer 100 or only two or more rows of semiconductor die 102.

Referring to the side view of FIG. 4, the tape assembly 106 includes a polyimide tape 108 called backgrinding tape, as known in the art, wherein the polyimide tape 108 includes a film assembly 110. ) Is attached. As shown in FIG. 5, the film assembly 110 includes an adhesive layer 116, on which a conductive material 114 is deposited. The adhesive material 116 is, for example, an adhesive film such as available from Nitto Denko Corp. of Japan, Abel Stick Co. of California, or Henkel Corporation of California. May be any of a variety of those known to electrically insulate them. The adhesive material 116 may be, for example, a viscous, flexible curable b-stage adhesive before being applied to the wafer 100 and prior to curing.

Conductive material 114 may be various electrical conductors such as, for example, aluminum, titanium, or alloys thereof. Conductive material 114 may be applied to the surface of adhesive layer 116 by a variety of known methods, including sputtering, plating, screen printing, photolithography, or various other deposition processes. Can be. Such processes allow the conductive material 114 to be applied at a very thin thickness, for example 1 μm to 5 μm, in particular 1 μm to 3 μm. In other embodiments of the present invention, it should be understood that the thickness of the conductive material 114 on the adhesive layer 116 may be less than 1 μm and greater than 5 μm.

Once the film assembly 110 is formed, the film assembly is applied to the backgrinding tape 108 to form the tape assembly 106. The tape 108 may also have an adhesive surface for adhering the conductive material 114 of the film assembly 110 to the backgrind tape 108. As shown in FIGS. 3, 4, and 6, tape assembly 106 is applied to semiconductor wafer 100 such that adhesive layer 116 of tape assembly 106 has semiconductor die 102 on wafer 100. It can be applied to the surface of). With the adhesive layer 116 applied to the semiconductor wafer 100, the adhesive layer 116 is viscous and adheres to the surface of the wafer 100. However, the adhesive layer 116 has not yet cured, and at this stage, the adhesive layer 116 may be pulled away from the surface of the wafer 100 by pulling.

In embodiments, after the tape assembly 106 is applied to the wafer, the backgrinding tape 108 may be thinned in a backgrinding process that thins the tape assembly 106. In other embodiments the backgrinding process may be omitted.

Referring now to the side view of FIG. 6, after the tape assembly 106 is applied to the surface of the semiconductor wafer 100, the focused heat is transferred to the interface between the tape assembly 106 and the wafer 100 (and more specifically, , An interface between the adhesive layer 116 and the surface of the wafer 100). In embodiments, the focused heat may be applied by one of the various lasers 120, including, for example, a CO 2 laser, a UV laser, a YBO 4 laser, an argon laser, and the like. Such lasers are produced, for example, by Rofin-Sinar Technologies, Hamburg, Germany. The laser is programmed to focus its energy at the interface between the adhesive layer 116 and the surface of the semiconductor wafer 100. At locations along the interface where the laser is applied, the adhesive layer is heated and cured to the surface of the semiconductor wafer so that the laser is permanently attached to the semiconductor wafer along the green path (heat is applied).

The path of the laser is computer controlled to draw on each semiconductor die 102 a pattern of redistribution layer to be defined on each semiconductor die 102. For example, as shown in FIG. 7, the first pair of die bond pads 124 along the upper edge of the semiconductor die 102 may be replaced by die bond pads along the adjacent edge of the semiconductor die 102. It is desirable to relocate to pair 126. Thus, laser 120 will draw a redistribution layer pattern including paths 130 and 132 on tape assembly 106 as shown by the dotted lines in FIG. Paths 130 and 132 are merely exemplary, and various redistribution layer patterns for redistributing die bond pads from a first location on each semiconductor die 102 to a second location on each semiconductor die 102 are provided. It should be understood that it can be drawn by the laser 120. Although a single laser 120 is shown in FIG. 6, it should be understood that multiple lasers 120 may be used to simultaneously draw redistribution layer patterns on multiple semiconductor dies.

By selectively concentrating the heat at the interface between the tape assembly 106 and the wafer 100, for example by means of a laser 120, the adhesive layer 116 of the tape assembly 106 provides a thin, sharply defined path. Thus, it can be melted to the surface of each semiconductor die 102. Importantly, the adhesive layer 116 on either side of the path, defined by focused heat, may be on the b-stage or otherwise uncured, as shown in FIG. 8, the surface of the wafer 100. The molten regions remain on the wafer surface although they may be peeled off.

In the region of the tape assembly 106 that is not heated by the laser 120, the attractive force between the film assembly 110 and the backgrinding tape 108 of the tape assembly 106 causes the film assembly 110 and the semiconductor wafer 100 to lie. Greater than the attractive force between the surfaces. Thus, when the backgrinding tape 108 is pulled off, the unheated regions of the film assembly 110 come off together with the tape assembly 106. Conversely, in areas heated by a laser, the attraction between the film assembly 110 and the tape 108 is less than the attraction between the film assembly 110 and the surface of the semiconductor wafer 100. Thus, as shown in FIG. 8, while the tape assembly 106 is pulled away from the wafer 100, the heated regions of the film assembly 110 are separated from the regions of the unheated film assembly, and The heated regions of the film assembly remain on the surface of each semiconductor die 102 to define a redistribution layer pattern 136 on each semiconductor die 102.

Referring now to FIGS. 9 and 10, after the uncured portions of the tape assembly 106 are removed from the semiconductor wafer 100, the wafer 100 is singulated into individual semiconductor dies 102, each of which is Redistribution layer pattern 136 as defined by the heating source. FIG. 10 is a top view of a singulated semiconductor die 102, which includes die bond pads 124 along the adjacent edge of the die with die bond pads 124 on top of the die. A redistribution layer pattern 136 for relocation to 126. In embodiments, the adhesive layer 116 on the surface of the semiconductor die is an electrical insulator. Accordingly, a subsequent step of electrically connecting the conductive material 114 to the die bond pads 124 and 126 is then performed. Various processes are known for electrically connecting the conductive material of the redistribution layer pattern 136 to the die bond pads 124 and 126. After this pattern is electrically connected to the die bond pads 124 and 126, passivation covers the exposed redistribution layer pattern 136, and optionally also the die bond pads 124, as is known. A passivation layer may be formed on the surface of the semiconductor die 102. The die bond pads 126 remain exposed.

11 illustrates another method of forming a redistribution layer on die 102. As described above, tape assembly 106 is applied to wafer 100 and a heating source, such as a laser, draws redistribution layer pattern 136 on each semiconductor die 102. However, in the embodiment shown in FIG. 11, at some point before or after the tape assembly 106 is applied, the semiconductor wafer 100 is flipped over and the tape assembly 106 on a wafer chuck or the like. Supported by). According to the embodiment of FIG. 11, die 102 is singulated while still in contact with tape assembly 106. Subsequently, a robotic device 140, such as a pick and place robot, grabs the backside of each semiconductor die 102 and pulls each die 102 to tape assembly 106. Drop from As described above, when the robotic device 140 pulls the singulated die 102 away from the tape assembly 106, it is heated to melt the film assembly 110 to the surface of each semiconductor die 102. Are separated from the backgrinding tape 108 and remain with the semiconductor die 102. Unheated portions of film assembly 110 are in tape assembly 106 on the wafer chuck.

Using the redistribution layer processing step described above, one or more die bond pads are placed at any second location at any first location on semiconductor die 102 by the redistribution layer throughout the die formed at the wafer level. It should be understood that they may be relocated. Referring now to FIG. 12, upon completion of the steps described above, die 102 may be mounted on substrate 160. The die 102 may be the only die mounted on the substrate 160, or as shown in FIG. 12, the die 102 may include a substrate (with one or more additional dies 162 and passive elements 164). 160 may be mounted on. Die bond pads on die 102, and any other die, may then be wire bonded to contact pads on substrate 160 using wire bonds 166 in a known wire bonding process. In embodiments, the die and substrate may together function as flash memory device 170, where die 102 may be a controller such as an ASIC or flash memory die. Die 102 may be different from the controller or flash memory die in other embodiments, and in other embodiments the die and substrate together may be different from the flash memory device. In embodiments where the flash memory device 170 is a portable memory device, the contact fingers 168 for exchanging signals between the device 170 and the host device (where the device 170 is inserted) are provided with a substrate 160. May be provided further on.

As described in the background, in some package configurations there is room for pin out placement only along a single edge of the semiconductor die. The redistribution layer applied to the semiconductor die 102 effectively rearranges the bond pads on the die 102 surface to a location where they can be easily bonded to the substrate 160. The relative lengths and relative widths of the semiconductor die 102, semiconductor die 162 and substrate 160 shown in FIG. 12 are merely exemplary and may vary in other embodiments of the present invention.

As shown in FIG. 12, after the stacked die configuration in accordance with the embodiments described above is formed, individual semiconductor packages may be embedded in the molding compound 168 to form a completed semiconductor die package 170. . The molding compound 168 can be, for example, a known epoxy such as available from Sumitomo Corp. and Nitto Denko Corp., headquartered in Japan. The package 170 shown in FIG. 12 may be a completed portable memory card. Alternatively, package 170 may be sealed in a lid to form a finished portable memory card.

The foregoing detailed description of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching. The embodiments described above were chosen to best illustrate the principles of the invention and its practical application, thereby enabling those skilled in the art to make the best use of the invention in various embodiments and with various modifications suitable for the particular use contemplated. Could be. The scope of the invention is defined by the appended claims.

Claims (17)

A method of manufacturing a semiconductor package from a semiconductor wafer,
The semiconductor package comprises a semiconductor die having a redistribution layer,
(a) applying a tape assembly over at least portions of the semiconductor wafer, the tape assembly comprising a tape, an adhesive layer, and a conductive material applied to the adhesive layer, wherein the adhesive layer is the semiconductor wafer Disposed adjacent to;
(b) a portion of the adhesive layer on the surface of the semiconductor die on the semiconductor wafer, in a pattern defining a path between a first location of the die bond pad of the semiconductor die and a second location where the die bond pad should be relocated Bonding them together; And
(c) leaving the pattern of the adhesive layer defined in step (b) adhered to the semiconductor wafer and the conductive material applied to the pattern of the adhesive layer defined in step (b); Removing the portions. The method of claim 1,
The step (b) of adhering portions of the adhesive layer to the surface of the semiconductor die comprises: forming the adhesive layer and the semiconductor die along the pattern defining a path between the first and second positions. Heating the interface between the surfaces. The method of claim 2,
Heating the interface between the adhesive layer and the surface of the semiconductor die along the pattern defining a path between the first and second positions, includes heating the interface with a laser. A semiconductor package manufacturing method. The method of claim 1,
The step (c) of removing the portions of the tape assembly includes pulling the tape away. The method of claim 4, wherein
Step (c), which is the step of removing portions of the tape assembly, pulls together the tape, the portions of the conductive material, and the adhesive layer that is not bonded to the surface of the semiconductor die in step (b). The method of manufacturing a semiconductor package, further comprising the step. The method of claim 1,
The step (c), which is the step of removing portions of the tape assembly, involves attaching portions of the adhesive layer adhered to the surface of the semiconductor die in step (b) to the surface of the semiconductor die in step (b). And separating the portions of the non-adhesive layer from the adhesive layer. The method of claim 1,
(d) depositing the conductive material on the adhesive layer; And
(e) forming the tape assembly by applying the adhesive layer and the conductive material to the tape. The method of claim 1,
(f) electrically connecting the first die bond pad to an end of the conductive material left in step (c). The method of claim 8,
(g) electrically connecting a second end of the conductive material left in step (c) to a second die bond pad in the second position. The method of claim 1,
and (h) singulating the semiconductor die from the semiconductor wafer after step (c), which is the step of removing portions of the tape assembly. As a semiconductor die,
An integrated circuit; And
It is configured to include a redistribution pattern formed on the integrated circuit,
The rewiring pattern is,
An adhesive material adhered to the surface of the semiconductor die in a pattern with the redistribution pattern, and
And a conductive material deposited on the adhesive material. The method of claim 11,
And the conductive material is at least one of titanium and aluminum. The method of claim 11,
The thickness of the conductive material is a semiconductor die, characterized in that 1㎛ to 5㎛ on the adhesive material. The method of claim 11,
The thickness of the conductive material is a semiconductor die, characterized in that 1㎛ to 3㎛ on the adhesive material. The method of claim 11,
And the adhesive material is bonded to the surface of the semiconductor die in a pattern of the redistribution pattern by laser heating the adhesive material in a pattern of the redistribution pattern. The method of claim 11,
And said integrated circuit is a flash memory circuit. The method of claim 11,
Wherein said integrated circuit is a controller circuit for a flash memory.

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