CN114446919A

CN114446919A - MCM encapsulation structure and manufacturing method thereof

Info

Publication number: CN114446919A
Application number: CN202011218426.6A
Authority: CN
Inventors: 周辉星
Original assignee: SIPLP Microelectronics Chongqing Ltd
Current assignee: SIPLP Microelectronics Chongqing Ltd
Priority date: 2020-11-04
Filing date: 2020-11-04
Publication date: 2022-05-06

Abstract

The invention provides an MCM encapsulation structure and a manufacturing method thereof, wherein the encapsulation structure comprises: a pre-wiring substrate, a first die assembly/die, a passive device, a molding layer, a first conductive trace, a second conductive trace, a conductive bump, a first dielectric layer, and a second dielectric layer. The pre-wiring substrate can transfer wiring layers required to be formed on the active surface of the die into the pre-wiring substrate, which includes complex multiple circuits embedded in the package structure by being electrically connected to pads on the active surface of the die, and can improve the performance of the overall MCM package structure. Passive devices may also be incorporated into MCM package structures through the pre-wiring substrate. The pre-wiring substrate can be tested before packaging, and the use of a known poor pre-wiring substrate is avoided. The pre-wiring substrate is a prefabricated substrate, the manufacturing process is independent of the packaging process, and the packaging time of the whole packaging process can be saved.

Description

MCM encapsulation structure and manufacturing method thereof

Technical Field

The invention relates to the technical field of chip packaging, in particular to an MCM (Multi-chip Module) packaging structure and a manufacturing method thereof.

Background

In the packaging process, dies with different functions are often packaged in a packaging structure to form a specific function, which is called a Multi-Chip Module (MCM), and has the advantages of small size, high reliability, high performance, and multiple functions.

With the miniaturization and light weight of electronic devices, chip packages having compact structures and small volumes are gaining more and more market favor.

In the MCM, the internal circuit structure of the chip is often complicated, and the wiring density in the rewiring layer is high, thereby causing wiring difficulties because the surface area of the chip is too small. In addition, the wiring is too dense, so that the fine wiring is easy to generate short circuit, the yield of products is influenced, and meanwhile, the service life of the chip is also low; especially in the case of forming a plurality of wiring layers, the process is difficult to manage due to the complexity of the process.

Disclosure of Invention

The invention aims to provide an MCM (Multi chip Module) packaging structure and a manufacturing method thereof, so as to solve the problems in the related art.

To achieve the above object, a first aspect of the present invention provides an MCM package structure, including:

a pre-wiring substrate having a first through opening and a second through opening; a pre-wiring circuit is arranged in the pre-wiring substrate and comprises a front surface electric connection point and a back surface electric connection point, the front surface electric connection point is exposed on the front surface of the pre-wiring substrate, and the back surface electric connection point is exposed on the back surface of the pre-wiring substrate;

a first die assembly located within the first through opening; the first die assembly includes at least: a first die and a second die, the first die including a number of first bonding pads, the first bonding pads being located on an active side of the first die, the second die including a number of second bonding pads, the second bonding pads being located on an active side of the second die; an active side of the second die is covered with a second protective layer that exposes the second pad; an active side of the first die faces away from an active side of the second die;

a passive device located within the second through opening; the passive device comprises an electric connection end, and the electric connection end is positioned on the active surface of the passive device;

a molding compound layer covering the pre-wiring substrate, the first die assembly and the passive device, wherein the back surface of the molding compound layer exposes the second protective layer, the second bonding pad and the back surface of the pre-wiring substrate, and the front surface of the molding compound layer exposes the active surface of the first die, the active surface of the passive device and the front surface of the pre-wiring substrate;

a first conductive trace on the first pad, the electrical connection terminal, the front side electrical connection point, and the front side of the molding layer for electrically connecting the first die, the passive device, and the pre-routing line;

second conductive traces on the second pads, the backside electrical connections, and the backside of the molding layer for electrically connecting the second die with the pre-routing lines;

a conductive bump connected to the first conductive trace;

a first dielectric layer embedding the first conductive trace and the conductive bump, the conductive bump being exposed outside the first dielectric layer; and

a second dielectric layer embedding the second conductive trace.

Optionally, the first die assembly is a die stack structure.

Optionally, the connection of the conductive bump to the first conductive trace is replaced by: the conductive bump is connected to the second conductive trace; correspondingly, the second dielectric layer embeds the second conductive trace and the conductive bump, the conductive bump is exposed outside the second dielectric layer, and the first dielectric layer embeds the first conductive trace.

Optionally, a third dielectric layer on the active side of the first die, the active side of the passive device, the front side of the pre-wiring substrate, and the front side of the molding layer; the third dielectric layer exposes the first pad, the electrical connection end and the front surface electrical connection point; the first conductive trace is on the first pad, the electrical connection end, the front side electrical connection point, and the third dielectric layer.

Optionally, the method further comprises: a first protective layer covering an active side of the first die, the first protective layer exposing the first bonding pad; the front surface of the plastic packaging layer exposes the first protective layer and the first bonding pad.

Optionally, the material of the second protective layer is an organic high molecular polymer insulating material, an inorganic insulating material or a composite material; and/or the material of the first dielectric layer is an organic high molecular polymer insulating material, an inorganic insulating material or a composite material; and/or the material of the second dielectric layer is an organic high molecular polymer insulating material, an inorganic insulating material or a composite material.

Optionally, the first conductive trace comprises a metal pattern layer; and/or the second conductive trace comprises a metal pattern layer.

A second aspect of the present invention provides a method for manufacturing an MCM package structure, including:

providing a carrier plate and a plurality of groups of packages borne on the carrier plate, wherein each group of packages to be packaged comprises: a pre-wiring substrate having a first through opening and a second through opening, a first die assembly located within the first through opening, and a passive device located within the second through opening; a pre-wiring circuit is arranged in the pre-wiring substrate and comprises a front surface electric connection point and a back surface electric connection point, the front surface electric connection point is exposed on the front surface of the pre-wiring substrate, and the back surface electric connection point is exposed on the back surface of the pre-wiring substrate; the first die assembly includes at least: a first die and a second die, the first die including a number of first bonding pads, the first bonding pads being located on an active side of the first die, the second die including a number of second bonding pads, the second bonding pads being located on an active side of the second die; the active surface of the second bare chip is covered with a second protective layer; an active side of the first die faces away from an active side of the second die; the passive device comprises an electric connection end, and the electric connection end is positioned on the active surface of the passive device; the front surface of the pre-wiring substrate, the active surface of the passive device and the active surface of the first bare chip face the carrier board;

forming a plastic packaging layer for embedding each group of packages to be packaged on the surface of the carrier plate; thinning the plastic packaging layer until the second protective layer and the back of the pre-wiring substrate are exposed;

forming a second opening in the second protective layer to expose the second pad; forming second conductive traces on the second protective layer, the second pads, the backside electrical connections, and the backside of the molding layer to electrically connect the second dies within a group with the pre-routing lines; forming a second dielectric layer embedding the second conductive trace;

removing the carrier plate to expose the active surface of the first bare chip, the active surface of the passive device, the front surface of the pre-wiring substrate and the front surface of the plastic packaging layer; forming first conductive traces on the first pads, the electrical connections, the front side electrical connections, and the front side of the molding layer to electrically connect the first die, the passive devices, and the pre-routing lines within a group;

forming a conductive bump on the first conductive trace and a first dielectric layer embedding the first conductive trace and the conductive bump, the conductive bump being exposed outside the first dielectric layer;

and cutting to form a plurality of MCM encapsulation structures, wherein each MCM encapsulation structure comprises a group of the to-be-encapsulated pieces.

Optionally, after the step of forming the second conductive trace, forming a conductive bump on the second conductive trace and forming a second dielectric layer embedding the second conductive trace and the conductive bump, wherein the conductive bump is exposed outside the second dielectric layer; the forming of the conductive bump on the first conductive trace and the forming of the first dielectric layer embedding the first conductive trace and the conductive bump, the conductive bump exposed outside the first dielectric layer replaced by: a first dielectric layer is formed embedding the first conductive trace.

Optionally, the carrier is removed first, and after the first conductive trace, the conductive bump, and the first dielectric layer embedding the first conductive trace and the conductive bump are formed; and arranging a support plate on the first dielectric layer and the conductive bump, thinning the plastic packaging layer, and forming the second conductive trace and the second dielectric layer.

Optionally, after removing the carrier board, forming a third dielectric layer on the exposed active surface of the first die, the active surface of the passive device, the front surface of the pre-wiring substrate, and the front surface of the molding layer; forming a plurality of fourth openings in the third dielectric layer, wherein the fourth openings expose the first pads, the electrical connection ends and the front electrical connection points; forming the first conductive trace on the first pad, the electrical connection end, the front side electrical connection point, and the third dielectric layer.

Optionally, in the first die assembly, an active side of the first die is covered with a first protective layer; the first protective layer faces the carrier plate; the first protective layer is provided with a first opening for exposing the first bonding pad, or after the carrier plate removing step and before the first conductive trace forming step, a first opening is formed in the first protective layer to expose the first bonding pad;

and/or the active surface of the passive device is covered with a third protective layer; the third protective layer faces the carrier plate; and the third protective layer in the to-be-packaged piece is provided with a third opening for exposing the electric connection end, or after the carrier plate removing step and before the first conductive trace forming step, a third opening is formed in the third protective layer to expose the electric connection end.

Optionally, the pre-wiring substrates of each group of the to-be-packaged devices are connected together, and the step of cutting to form a plurality of MCM packaging structures is performed by cutting.

A third aspect of the present invention provides an MCM package structure, including:

a die located within the first through opening; the die comprises a plurality of bonding pads, and the bonding pads are positioned on the active surface of the die;

the plastic package layer covers the pre-wiring substrate, the bare chip and the passive device, the back surface of the plastic package layer is exposed out of the back surface of the pre-wiring substrate, and the front surface of the plastic package layer is exposed out of the active surface of the bare chip, the active surface of the passive device and the front surface of the pre-wiring substrate;

conductive traces on the pads, the electrical connections, the front side electrical connections, and the front side of the molding layer for electrically connecting the die, the passive devices, and the pre-routing lines;

the conductive bump is connected to the back surface electric connection point;

a first dielectric layer embedding the first conductive trace; and

and the second dielectric layer is used for embedding the conductive bump, and the conductive bump is exposed out of the second dielectric layer.

Optionally, a second die assembly replaces the die, the second die assembly including a plurality of dies, the plurality of dies having active faces facing the same.

A fourth aspect of the present invention provides a method for manufacturing an MCM package structure, including:

providing a carrier plate and a plurality of groups of packages borne on the carrier plate, wherein each group of packages to be packaged comprises: the semiconductor device comprises a pre-wiring substrate with a first through opening and a second through opening, a bare chip positioned in the first through opening, and a passive device positioned in the second through opening; a pre-wiring circuit is arranged in the pre-wiring substrate and comprises a front surface electric connection point and a back surface electric connection point, the front surface electric connection point is exposed on the front surface of the pre-wiring substrate, and the back surface electric connection point is exposed on the back surface of the pre-wiring substrate; the die comprises a plurality of bonding pads, and the bonding pads are positioned on the active surface of the die; the passive device comprises an electric connection end, and the electric connection end is positioned on the active surface of the passive device; the front surface of the pre-wiring substrate, the active surface of the passive device and the active surface of the bare chip face the carrier plate;

forming a plastic packaging layer for embedding each group of packages to be packaged on the surface of the carrier plate; thinning the plastic packaging layer until the back surface of the pre-wiring substrate is exposed;

removing the carrier plate to expose the active surface of the bare chip, the active surface of the passive device, the front surface of the pre-wiring substrate and the front surface of the plastic packaging layer; forming conductive traces on the pads, the electrical connection terminals, the front side electrical connection points, and a front side of the molding layer to electrically connect the dies, the passive devices, and the pre-routing lines within a group; forming a first dielectric layer embedding the conductive traces;

forming a conductive bump on the back electrical connection point and forming a second dielectric layer embedding the conductive bump, wherein the conductive bump is exposed out of the second dielectric layer;

Compared with the prior art, the invention has the beneficial effects that:

first, the pre-wiring substrate can transfer wiring layers required to be formed on the active surface of the die into the pre-wiring substrate, which includes complex multiple circuits embedded in the package structure by being electrically connected to pads on the active surface of the die and electrical connection terminals of passive devices, and can improve the performance of the overall MCM package structure. And secondly, fine wiring in the rewiring layer is transferred to the pre-wiring substrate, so that the probability of short circuit is reduced, the product yield is increased, the number of layers of the first conductive traces and/or the second conductive traces can be reduced, and the process complexity is reduced. Third, a pre-formed pre-wiring substrate is provided that allows testing of the pre-wiring substrate prior to packaging, avoiding the use of known poor pre-wiring substrates. Fourthly, the pre-wiring substrate is a prefabricated substrate, the manufacturing process is independent of the packaging process, and the packaging time of the whole packaging process can be saved.

In addition, the die assemblies with the same or opposite active surfaces can achieve the effects of small volume and compact structure of the MCM package structure. For the bare chip assembly with the back-to-back active surfaces, the pre-wiring substrate not only realizes the electrical connection between the first bare chip and the passive device, but also realizes the wiring on the front surface and the back surface of the plastic packaging layer, and compared with the wiring on only one surface, the wiring density can be improved, and the MCM packaging structure with more complex wiring and smaller volume is formed.

Drawings

Fig. 1 is a schematic cross-sectional structure diagram of an MCM package structure of a first embodiment of the invention;

FIG. 2 is a flow chart of a method of fabricating the MCM package structure of FIG. 1;

FIGS. 3-9 are schematic intermediate structures corresponding to the flow chart of FIG. 2;

FIG. 10 is a flow chart of a method of fabricating a MCM package structure of a second embodiment of the invention;

FIGS. 11 and 12 are schematic intermediate structures corresponding to the flow chart of FIG. 10;

fig. 13 is a schematic cross-sectional structure view of an MCM package structure of a third embodiment of the invention;

fig. 14 is a schematic cross-sectional structure view of an MCM package structure of a fourth embodiment of the invention;

fig. 15 is a schematic cross-sectional structure of an MCM package structure of a fifth embodiment of the invention.

To facilitate an understanding of the invention, all reference numerals appearing in the invention are listed below:

MCM package structures

1, 6, 7, 8 pre-wiring substrate 10

Front electrical connection point 101 of pre-wired circuit 100

Back side electrical connection points 102 front side 10a of the pre-wiring substrate

First through opening 103 in back surface 10b of pre-wiring substrate

Second through opening 104 first die assembly 20

First die 11 first protective layer 110

First pads 111 the back side 11b of the first die

Active surface 11a of the first die the second die 12

Second protective layer 120 second pad 121

Backside 12b of second die active side 12a of second die

Passive device 13 active surface 13a of passive device

Third protective layer 130 for electrical connection 131

Plastic-sealing layer 14 front surface 14a of plastic-sealing layer

Back side 14b of the plastic encapsulation layer first conductive trace 15

Second conductive trace 16 conductive bump 17

First dielectric layer 18 second dielectric layer 19

First opening 110a and second opening 120a

Third opening 130a

metal pattern blocks

15a, 16a

Carrier 2 to be packaged 3

First support plate 4 second support plate 5

Fourth opening 21a third dielectric layer 21

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

Fig. 1 is a schematic cross-sectional structure diagram of an MCM package structure of a first embodiment of the invention.

Referring to fig. 1, MCM package structure 1 includes:

a pre-wiring substrate 10 having a first through opening 103 and a second through opening 104 (see fig. 3 and 4); a pre-wiring circuit 100 is arranged in the pre-wiring substrate 10, the pre-wiring circuit 100 comprises a front surface electrical connection point 101 and a back surface electrical connection point 102, the front surface electrical connection point 101 is exposed on the front surface 10a of the pre-wiring substrate 10, and the back surface electrical connection point 102 is exposed on the back surface 10b of the pre-wiring substrate 10;

a first die assembly 20 located within the first through opening 103; the first die assembly 20 includes at least: a first die 11 and a second die 12, the first die 11 including a plurality of first bonding pads 111, the first bonding pads 111 being located on an active surface 11a of the first die 11, the second die 12 including a plurality of second bonding pads 121, the second bonding pads 121 being located on an active surface 12a of the second die 12; the active face 12a of the second die 12 is covered with a second protective layer 120, the second protective layer 120 exposing the second pad 121; the active surface 11a of the first die 11 faces away from the active surface 12a of the second die 12;

a passive component 13 located within the second through opening 104; the passive component 13 comprises an electrical connection terminal 131, the electrical connection terminal 131 being located on the active face 13a of the passive component 13;

a molding compound layer 14 for covering the pre-wiring substrate 10, the first die assembly 20 and the passive device 13, wherein the back surface 14b of the molding compound layer 14 exposes the second protective layer 120, the second bonding pad 121 and the back surface 10b of the pre-wiring substrate 10, and the front surface 14a of the molding compound layer 14 exposes the active surface 11a of the first die 11, the active surface 13a of the passive device 13 and the front surface 10a of the pre-wiring substrate 10;

first conductive traces 15 on the first pads 111, the electrical connection terminals 131, the front electrical connection points 101, and the front surface 14a of the molding layer 14 for electrically connecting the first die 11, the passive component 13, and the pre-wiring line 100;

second conductive traces 16 on the second pads 121, the back electrical connection points 102, and the back side 14b of the molding layer 14 for electrically connecting the second die 12 with the pre-routing wires 100;

a conductive bump 17 connected to the first conductive trace 15;

a first dielectric layer 18 embedding the first conductive trace 15 and the conductive bump 17, the conductive bump 17 being exposed outside the first dielectric layer 18; and

a second dielectric layer 19 embedding the second conductive trace 16.

The first die 11 and the second die 12 may be dies requiring electrical interconnection, and do not limit the respective functions. In some embodiments, the first DIE 11 and the second DIE 12 may be a POWER DIE (POWER DIE), a MEMORY DIE (MEMORY DIE), a sensing DIE (SENSOR DIE), or a RADIO frequency DIE (RADIO frequency DIE) or a corresponding control chip.

Referring to fig. 1, the first die 11 includes an active surface 11a and a back surface 11b opposite to each other. The first pad 111 is exposed to the active surface 11 a. The first die 11 may include a variety of devices formed on a semiconductor substrate, and electrical interconnect structures electrically connected to the various devices. The first pads 111 are connected to the electrical interconnection structure for inputting/outputting electrical signals of the respective devices.

In the present invention, "/" indicates "or".

The second die 12 includes opposing active and

backside surfaces

12a and 12 b. The second pad 121 is exposed to the active surface 12 a. The second die 12 may include a variety of devices formed on a semiconductor substrate, as well as electrical interconnect structures electrically connected to the various devices. The second pads 121 are connected to the electrical interconnection structure for inputting/outputting electrical signals of the respective devices.

With reference to fig. 1, in the present embodiment, the first die assembly 20 is a stacked die structure, that is, the first die 11 and the second die 12 are disposed back to back. The first die 11 and the second die 12 are disposed back-to-back, which means that: the back surface 11b of the first die 11 is bonded to the back surface 12b of the second die 12.

In other embodiments, the first die assembly 20 may include one or more first dies 11 and one or more second dies 12. The first die 11 and the second die 12 may be disposed in a staggered manner, even side by side, i.e., the front surface 14a of the molding compound layer 14 also exposes the back surface 12b of the second die 12.

In this embodiment, the area of the first die 11 is larger than the area of the second die 12. In other embodiments, the area of the second die 12 may also be larger than the area of the first die 11.

The passive device 13 may include resistive, inductive and capacitive elements, which have the common feature of operating in the presence of a signal without the need for a power supply in the circuit. The passive device 13 includes an electrical connection terminal 131 to enable electrical signal connection/disconnection of the passive device 13.

In this embodiment, the active surface 11a of the first die 11 is provided with the first protective layer 110, and the active surface 13a of the passive component 13 is provided with the third protective layer 130. In some embodiments, the active side 11a of the first die 11 may also omit the first protective layer 110 and/or the active side 13a of the passive device 13 may omit the third protective layer 130.

The first protection layer 110, the second protection layer 120, and/or the third protection layer 130 are made of an insulating material, specifically, an organic high molecular polymer insulating material, or an inorganic insulating material or a composite material. The organic polymer insulating material is, for example, polyimide, epoxy resin, abf (ajinomoto build film), pbo (polybenzoxazole), an organic polymer film, or other organic materials having similar insulating properties. The inorganic insulating material is, for example, at least one of silicon dioxide and silicon nitride. The composite material is inorganic-organic composite material, and can be inorganic-organic polymer composite material, such as SiO₂Resin polymer composite material.

The first through opening 103 and the second through opening 104 in the pre-wiring substrate 10 may be plural, and elements to be electrically connected may be placed in each of the through

openings

103, 104. The pre-wiring substrate 10 includes pre-wiring lines 100 and an insulating material layer filled between the pre-wiring lines 100. Compared with the scheme of manufacturing the rewiring layer on the plastic package body of the first bare chip 11 and the second bare chip 12, the scheme has the advantages that the pre-wiring substrate 10 is adopted: first, the fine wiring in the rewiring layer is transferred to the pre-wiring substrate 10, so that the probability of short circuit is reduced, the product yield is increased, the number of layers of the first conductive traces 15 and/or the second conductive traces 16 can be reduced, and the process complexity is reduced. Second, providing a pre-formed pre-wiring substrate 10 allows testing of the pre-wiring substrate 10 prior to packaging, avoiding the use of known poor pre-wiring substrates 10. Thirdly, the pre-wiring substrate 10 is a prefabricated substrate, and the manufacturing process is independent of the packaging process, so that the packaging time of the whole packaging process can be saved.

Furthermore, transferring the wiring layers that need to be formed on the die

active surfaces

11a, 12a into the pre-wiring substrate 10, the pre-wiring substrate 10 including complex multiple circuits embedded in the package structure 1 by being electrically connected to the pads 111, 121 on the die

active surfaces

11a, 12a and the electrical connection terminals 131 of the passive components 13, can improve the performance of the entire package structure 1.

The pre-wiring substrate 10 may be a single piece or multiple pieces disposed around the first die assembly 20/passive device 13.

The pre-wiring substrate 10 may include a front surface 10a and a back surface 10b that are opposed. In this embodiment, the front surface 10a of the pre-wiring substrate 10 is flush with both the first protective layer 110 and the third protective layer 130, and the back surface 10b of the pre-wiring substrate 10 is flush with the second protective layer 120. In other words, the thickness of the passive device 13 is smaller than the respective thicknesses of the pre-wiring substrate 10 and the first die assembly 20.

There may be a plurality of front surface electrical connection points 101 exposed on the front surface 10a of the pre-wiring substrate, and a plurality of rear surface electrical connection points 102 exposed on the rear surface 10b of the pre-wiring substrate.

The material of the molding layer 14 may be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer, polyvinyl alcohol, or the like. The material of the molding layer 14 may also be various polymers or a composite of resin and polymer.

The molding layer 14 includes a front surface 14a and a back surface 14b opposite to each other. In this embodiment, the front surface 14a of the molding compound layer 14 exposes the first protective layer 110, the first pad 111, the third protective layer 130, the electrical connection terminal 131 and the front surface 10a of the pre-wiring substrate 10, and the back surface 14b of the molding compound layer 14 exposes the second protective layer 120, the second pad 121 and the back surface 10b of the pre-wiring substrate 10.

In the embodiment shown in fig. 1, the first conductive trace 15 comprises a plurality of metal pattern blocks 15a, having one layer. A part of the number of metal pattern blocks 15a selectively electrically connect the front side electrical connection point 101 with the first pad 111 to electrically connect the pre-wiring substrate 10 with the first die 11; a part of the number of metal pattern blocks 15a selectively electrically connect the front electrical connection point 101 and the electrical connection terminal 131 to electrically connect the pre-wiring substrate 10 and the passive device 13; a part of the metal pattern blocks 15a are selectively electrically connected to the front electrical connection points 101 to lead out the front electrical connection points 101 through the conductive bumps 17. In addition, there may be a partial number of metal pattern blocks 15a selectively electrically connected to the plurality of front electrical connection points 101 to realize circuit layout or electrical conduction of the front electrical connection points 101; there may be a partial number of metal pattern blocks 15a selectively electrically connected to the plurality of first pads 111 to realize circuit layout or electrical conduction of the first pads 111.

The layout of the first conductive traces 15 may be determined according to a preset circuit layout.

In some embodiments, the first conductive trace 15 may also include two or more layers, i.e., have two or more metal pattern layers.

In the embodiment shown in fig. 1, the second conductive trace 16 includes a plurality of metal pattern pieces 16a having one layer. A partial number of the metal pattern blocks 16a selectively electrically connect the back surface electrical connection points 102 with the second pads 121 to electrically connect the pre-wiring substrate 10 with the second die 12. In addition, there may be a partial number of metal pattern blocks 16a selectively electrically connecting a plurality of electrically connected back electrical connection points 102 to realize circuit layout or electrical conduction of the back electrical connection points 102; there may be a partial number of the metal pattern blocks 16a selectively electrically connected to the plurality of second pads 121 to realize circuit layout or electrical conduction of the second pads 121.

The layout of the second conductive traces 16 may be based on a predetermined circuit layout.

In some embodiments, the second conductive trace 16 may also include two or more layers, i.e., have two or more metal pattern layers.

Referring to fig. 1, in the present embodiment, the conductive bumps 17 on the first conductive traces 15 serve as external connection terminals of the MCM package structure 1.

In some embodiments, the conductive bump 17 may further have an oxidation resistant layer thereon.

The oxidation resistant layer may include: b1) tin layer, or b2) nickel layer and gold layer stacked from bottom to top, or b3) nickel layer, palladium layer and gold layer stacked from bottom to top. The material of the conductive bump 17 may be copper, and the oxidation-resistant layer may prevent oxidation of copper, thereby preventing deterioration of electrical connection performance due to oxidation of copper.

In some embodiments, the conductive bumps 17 may also have solder balls thereon for flip-chip mounting of the MCM package structure 1.

The material of the first dielectric layer 18 and the second dielectric layer 19 may be an organic polymer insulating material, an inorganic insulating material, or a composite material. The organic polymer insulating material is, for example, polyimide, epoxy resin, abf (ajinomoto build film), pbo (polybenzoxazole), an organic polymer film, or other organic materials having similar insulating properties. The inorganic insulating material is, for example, at least one of silicon dioxide and silicon nitride. The composite material is inorganic-organic composite material, and can be inorganic-organic polymer composite material, such as SiO₂Resin polymer composite material. Compared with an inorganic insulating material, the organic high polymer insulating material and the composite material have smaller tensile stress, and the surface of the MCM package structure 1 can be prevented from warping.

In the MCM package 1, on the one hand, the first die assemblies 20 with their active surfaces facing away from each other achieve the effect that the MCM package 1 is small and compact. On the other hand, the pre-wiring substrate 10 not only realizes the electrical connection between the first die 11 and the second die 12 and the passive device 13, but also realizes the wiring on both the front surface 14a and the back surface 14b of the molding layer 14, and compared with the wiring on only one surface, the wiring density can be increased, and the MCM package structure 1 with more complicated wiring and smaller volume can be formed.

One embodiment of the present invention provides a method of fabricating MCM package structure 1 of fig. 1. Fig. 2 is a flow chart of a method of fabrication. Fig. 3 to 9 are intermediate schematic diagrams corresponding to the flow in fig. 2.

First, referring to step S1 in fig. 2, fig. 3 and fig. 4, a carrier 2 and a plurality of groups of to-be-packaged components 3 carried on the carrier 2 are provided, where each group of to-be-packaged components 3 includes: a pre-wiring substrate 10 having a first through opening 103 and a second through opening 104, a first die assembly 20 located in the first through opening 103, and a passive component 13 located in the second through opening 104; a pre-wiring circuit 100 is arranged in the pre-wiring substrate 10, the pre-wiring circuit 100 comprises a front surface electrical connection point 101 and a back surface electrical connection point 102, the front surface electrical connection point 101 is exposed on the front surface 10a of the pre-wiring substrate 10, and the back surface electrical connection point 102 is exposed on the back surface 10b of the pre-wiring substrate 10; the first die assembly 20 includes at least: a first die 11 and a second die 12, the first die 11 including a plurality of first bonding pads 111, the first bonding pads 111 being located on an active surface 11a of the first die 11, the second die 12 including a plurality of second bonding pads 121, the second bonding pads 121 being located on an active surface 12a of the second die 12; the active face 12a of the second die 12 is covered with a second protective layer 120; the active face 11a of the first die 11 faces away from the active face 12a of the second die 12; the passive component 13 comprises an electrical connection terminal 131, the electrical connection terminal 131 being located on the active face 13a of the passive component 13; the front surface 10a of the pre-wiring substrate 10, the active surface 13a of the passive component 13, and the active surface 11a of the first die 11 face the carrier 2. Fig. 3 is a top view of a carrier and a plurality of groups of packages to be packaged; fig. 4 is a sectional view taken along line AA in fig. 3.

Referring to fig. 4, the first die 11 includes an active surface 11a and a back surface 11b opposite to each other. The first die 11 may include a variety of devices formed on a semiconductor substrate, and electrical interconnect structures electrically connected to the various devices. The first pads 111 exposed to the active surface 11a of the first die 11 are connected to an electrical interconnect structure for inputting/outputting electrical signals of the respective devices.

The second die 12 includes opposing active and

backside surfaces

12a and 12 b. The second pad 121 is exposed to the active surface 12 a. Also included within the second die 12 may be a variety of devices formed on a semiconductor substrate, as well as electrical interconnect structures electrically connecting the various devices. The second pads 121 exposed to the active surface 12a of the second die 12 are connected to electrical interconnect structures for inputting/outputting electrical signals of the respective devices.

With continued reference to fig. 4, in the present embodiment, the first die assembly 20 is a stacked die structure, i.e., the first die 11 and the second die 12 are disposed back to back. The first die 11 and the second die 12 are disposed back-to-back, which means that: the back surface 11b of the first die 11 is bonded to the back surface 12b of the second die 12.

The second protective layer 120 covers the second pad 121 to protect the second pad 121 when thinning the molding layer 14.

In this embodiment, the active surface 11a of the first die 11 is also provided with a first protection layer 110 to buffer the stress of the first bonding pad 111 when the molding layer 14 is thinned. In some embodiments, the active surface 11a of the first die 11 may omit the first protection layer 110.

The first die 11 and the second die 12 are both formed as a singulated wafer. Taking the first die 11 as an example, the wafer includes a wafer active surface and a wafer backside surface, the wafer active surface exposes the first pads 111 and an insulating layer (not shown) protecting the first pads 111. The wafer is diced to form a first die 11, and accordingly, the first die 11 includes an active surface 11a and a back surface 11b, and the first bonding pad 111 and an insulating layer electrically insulating the adjacent first bonding pad 111 are exposed on the die active surface 11 a.

Applying the first protective layer 110 on the active surface 11a of the first die 11, the applying process of the first protective layer 110 may be: before the wafer is cut into the first dies 11, the first protection layer 110 is applied on the active surface of the wafer, and the wafer with the first protection layer 110 is cut to form the first dies 11 with the first protection layer 110, which may also be: after the wafer is diced into the first dies 11, the first protection layer 110 is applied on the active surface 11a of the first dies 11.

In this embodiment, the active surface 13a of the passive component 13 is also provided with a third protection layer 130 to buffer the stress of the electrical connection terminal 131 when the molding layer 14 is thinned. In some embodiments, the active surface 13a of the passive component 13 may also omit the third protective layer 130.

The first protection layer 110, the second protection layer 120, and/or the third protection layer 130 are made of an insulating material, specifically, an organic high molecular polymer insulating material, or an inorganic insulating material or a composite material. The organic polymer insulating material is, for example, polyimide, epoxy resin, abf (ajinomoto build film), pbo (polybenzoxazole), an organic polymer film, or other organic materials having similar insulating properties. The composite material is inorganic-organic composite material, and can be inorganic-organic polymer composite material, such as SiO₂Resin polymer composite material.

The organic high molecular polymer insulating material may be pressed on the first pads 111 and the insulating layer on/second pads 121 between adjacent first pads 111 and the insulating layer on/electrical connection terminals 131 between adjacent second pads 121 and the insulating layer between adjacent electrical connection terminals 131 by a) a laminating process, or b) coated or printed on the first pads 111 and the insulating layer between the adjacent first pads 111/the second pads 121 and the insulating layer between the adjacent second pads 121/the electrical connection terminals 131 and the insulating layer between the adjacent electrical connection terminals 131, and then cured, or c) is cured on the first pads 111 and the insulating layer on/second pads 121 between adjacent first pads 111 and the insulating layer on/electrical connection terminals 131 between adjacent second pads 121 and the insulating layer between adjacent electrical connection terminals 131 by an injection molding process.

When the material of the first protective layer 110, the second protective layer 120, and/or the third protective layer 130 is an inorganic material such as silicon dioxide or silicon nitride, the material may be formed on the first pads 111 and the insulating layer between adjacent first pads 111/the second pads 121, and the insulating layer between adjacent second pads 121/the electrical connection terminals 131 and the insulating layer between adjacent electrical connection terminals 131 by a deposition process.

The first protective layer 110, and/or the second protective layer 120, and/or the third protective layer 130 may include one or more layers.

The wafer may be thinned from the back side prior to dicing to reduce the thickness of the first die 11 and/or the second die 12.

openings

103, 104.

The pre-wiring substrate 10 includes pre-wiring lines 100 and an insulating material filled between the pre-wiring lines 100.

In the present embodiment, referring to fig. 3, the pre-wiring substrates 10 of each group of packages 3 to be packaged are separated, and in some embodiments, the pre-wiring substrates 10 of each group of packages 3 to be packaged may also be connected together.

The carrier plate 2 is a rigid plate and may comprise a plastic plate, a glass plate, a ceramic plate, a metal plate, or the like.

The thickness of the passive device 13 is generally less than the thickness of the first die 11, and thus the thickness of the passive device 13 is less than the thickness of the pre-wiring substrate 10 and the first die assembly 20, respectively.

In some embodiments, the thickness of the pre-wiring substrate 10 is less than the thickness of the die stack structure. When a plurality of groups of packages 3 to be packaged are arranged on the surface of the carrier 2, one solution may include:

a) the active surfaces 13a of the passive devices 13 face the carrier plate 2, and the passive devices 13 are firstly arranged on the carrier plate 2; specifically, a full-surface bonding layer may be coated on the surface of the carrier 2, and the plurality of passive devices 13 are disposed on the bonding layer;

b) the front surfaces 10a of the multiple pre-wiring substrates 10 face the carrier board 2, the second through opening 104 of each pre-wiring substrate 10 is aligned with one passive device 13, and then the multiple pre-wiring substrates 10 are arranged on the carrier board 2;

c) the first passivation layer 110 on the plurality of first dies 11 faces another carrier, the plurality of first dies 11 are arranged on another carrier, the second passivation layer 120 on the plurality of second dies 12 faces another carrier, and the plurality of second dies 12 are arranged on another carrier, specifically, a whole surface bonding layer may be coated on the surfaces of the two carriers; arranging an adhesive layer on the back surfaces 11b of the plurality of first bare chips 11 and/or the back surfaces 12b of the plurality of second bare chips 12, aligning the two carrier plates, and adhering the back surfaces 11b of the first bare chips 11 and the back surfaces 12b of the second bare chips 12 together to form a bare chip stacking structure; removing the other carrier plate;

d) the die stack structure faces the first through opening 103 of the pre-wiring substrate 10, the other carrier is aligned with the carrier 2, and the die stack structure is fixed on the carrier 2 at the bottom of the through opening 103; and removing the another carrier plate.

c) The step and the step a) are not in sequence, and can also be carried out simultaneously; c) the step b) and the step b) are not in sequence, and can also be carried out simultaneously.

The adhesive layer on the surface of each carrier plate can be made of an easily-stripped material so as to strip the corresponding carrier plate. For example, a thermal release material capable of being made tack-free by heating or a UV release material capable of being made tack-free by ultraviolet irradiation may be used.

In another scheme, the step a) and the step b) are firstly carried out; next, in the step c), the first protective layers 110 on the plurality of first dies 11 are fixed on the carrier plate 2 toward the first through opening 103 of the pre-wiring substrate 10; then, the carrier board with the plurality of second dies 12 arranged thereon is aligned with the carrier board 2, and the back surface 11b of the first die 11 is bonded to the back surface 12b of the second die 12 to form a die stack structure; the carrier board carrying the plurality of second dies 12 is removed.

In another scheme, the step a) is firstly carried out; then, the first protection layer 110 on the plurality of first dies 11 faces the carrier 2, and the plurality of first dies 11 are first arranged on the carrier 2; next, the front surfaces 10a of the plurality of pre-wiring substrates 10 face the carrier 2, the first through opening 103 of each pre-wiring substrate 10 is aligned with one first die 11, the second through opening 104 is aligned with one passive device 13, and the plurality of pre-wiring substrates 10 are arranged on the carrier 2; then, the carrier board with the plurality of second dies 12 arranged thereon is aligned with the carrier board 2, and the back surface 11b of the first die 11 is bonded to the back surface 12b of the second die 12 to form a die stack structure; the carrier board carrying the plurality of second dies 12 is removed.

In some embodiments, the thickness of the pre-wiring substrate 10 is greater than the thickness of the die stack structure. When a plurality of groups of packages 3 to be packaged are arranged on the surface of the carrier 2, one solution may include: firstly, the step a) and the step c) are carried out, after the step c), the bare chip stacking structure faces the carrier plate 2, the carrier plate bearing the bare chip stacking structure is jointed with the carrier plate 2, the bare chip stacking structure is arranged on the carrier plate 2, and the carrier plate bearing the bare chip stacking structure is removed; next, the first through opening 103 of the pre-wiring substrate 10 is aligned with the die stack structure, and the second through opening 104 is aligned with the passive component 13, so as to fix the pre-wiring substrate 10 to the carrier 2.

A group of packages 3 to be packaged is located on an area of the surface of the carrier 2, so as to facilitate subsequent cutting. A plurality of groups of packages 3 to be packaged are fixed on the surface of the carrier plate 2 so as to manufacture a plurality of MCM package structures 1 simultaneously, thereby being beneficial to batch production and reducing the cost.

Next, referring to step S2 and fig. 5 in fig. 2, a molding layer 14 embedding each group of to-be-packaged components 3 is formed on the surface of the carrier 2; referring to fig. 6, the molding layer 14 is thinned until the second passivation layer 120 and the back surface 10b of the pre-wiring substrate 10 are exposed.

The material of the molding layer 14 may be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer, polyvinyl alcohol, or the like. The material of the molding layer 14 may also be various polymers or a composite of resin and polymer. Correspondingly, the encapsulation may be performed by filling a liquid molding compound between each first die assembly 20, each passive device 13, and each pre-wiring substrate 10, and then curing the liquid molding compound at a high temperature through a molding die. In some embodiments, the molding layer 14 may also be formed by plastic material molding such as hot press molding and transfer molding.

The molding layer 14 may include a front surface 14a and a back surface 14b opposite to each other.

Referring to fig. 6, the plastic sealing layer 14 is thinned from the back surface 14b by mechanical grinding such as grinding with a grinding wheel.

Specifically, when the thickness of the plastic package layer 14 is reduced and the back surface 10b of the pre-wiring substrate 10 is exposed when the thickness of the pre-wiring substrate 10 is smaller than the thickness of the first die assembly 20, the second protection layer 120 has been removed by a partial height; when the thickness of the pre-wiring substrate 10 is greater than the thickness of the first die assembly 20 and the second protective layer 120 is exposed, the back surface 10b of the pre-wiring substrate 10 has been removed by a partial height.

The second protective layer 120 can prevent the second bonding pad 121, the second die 12, and the electrical interconnection structure and devices in the first die 11 from being damaged during the process of forming the molding compound layer 14 and grinding the molding compound layer 14; the first protective layer 110 may stress-buffer the first pad 111; the third passivation layer 130 can buffer the stress of the electrical connection terminal 131.

This step forms the plastic-sealed body of each group of packages 3 to be packaged.

Next, referring to step S3 in fig. 2 and fig. 7, a second opening 120a is formed in the second protection layer 120 to expose the second pad 121; forming second conductive traces 16 on the second protective layer 120, the second pads 121, the back side electrical connections 102, and the back side 14b of the molding layer 14 to electrically connect the second dies 12 in the group with the pre-routing lines 100; a second dielectric layer 19 is formed embedding the second conductive trace 16.

In this embodiment, the second conductive trace 16 comprises a layer. Forming the second conductive trace 16 includes the following steps S31 to S38.

Step S31: a photoresist layer is formed on the second protective layer 120 of each second die 12, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the molding layer 14.

In this step S31, in an alternative, the photoresist layer formed may be a photosensitive film. The photosensitive film may be peeled off from the adhesive tape and applied to the second protective layer 120 of each second die 12, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the molding layer 14. In other alternatives, the photoresist layer may be formed by first applying a liquid photoresist and then curing the liquid photoresist by heating.

Step S32: and exposing and developing the photoresist layer to form a patterned photoresist layer.

This step S32 patterns the photoresist layer. In other alternatives, other sacrificial materials that are easily removable may be used in place of the photoresist layer.

Step S33: the second protective layer 120 is dry etched or wet etched using the patterned photoresist layer as a mask to form a plurality of second openings 120a, so as to expose a portion of each of the second pads 121. One second opening 120a may expose a partial region of one second pad 121. In other embodiments, one second opening 120a may also expose partial areas of two or more second pads 121.

The material of the second protective layer 120 is a laser-reactive material, such as epoxy resin, and the second opening 120a can be formed by laser irradiation to be modified. The second opening 120a can be formed by exposing and then developing the second passivation layer 120, which is made of a photosensitive material, such as polyimide. As for the material of the second protection layer 120, which is a material that can be dry-etched or wet-etched, such as silicon dioxide, silicon nitride, etc., the second opening 120a can be formed by dry-etched or wet-etched.

Step S34: and ashing to remove the residual photoresist layer.

Step S35: a photoresist layer is formed on the second protective layer 120 of each second die 12, the second pads 121 exposed by the second protective layer 120, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the molding layer 14.

The method of forming the photoresist layer may refer to the method of forming the photoresist layer in step S31.

Step S36: the photoresist layer is exposed and developed, leaving a first predetermined area of the photoresist layer that is complementary to the area where the metal pattern piece 16a of the second conductive trace 16 is to be formed.

Step S37: the complementary area of the first predetermined area is filled with a metal layer to form a metal pattern block 16a of the second conductive trace 16.

The position of a part of the number of metal pattern blocks 16a enables electrical connection of the back side electrical connection points 102 with the second pads 121 to achieve electrical connection of the pre-wiring substrate 10 with the second die 12. A part of the number of metal pattern blocks 16a is positioned so as to electrically connect a plurality of electrically connected back surface electrical connection points 102 to realize circuit layout or electrical conduction of the back surface electrical connection points 102. In addition, there may be a partial number of the metal pattern blocks 16a positioned so as to electrically connect a plurality of the second pads 121 to achieve circuit layout or electrical conduction of the second pads 121.

The step S37 can be performed by an electroplating process. The process of electroplating copper or aluminum is mature.

Specifically, before forming the photoresist Layer in step S35, a Seed Layer (Seed Layer) may be formed on the second passivation Layer 120 of each second die 12, the second pad 121 exposed by the second passivation Layer 120, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the molding Layer 14 by a physical vapor deposition method or a chemical vapor deposition method. The seed layer may serve as a power supply layer for electroplating copper or aluminum.

The electroplating may comprise electrolytic plating or electroless plating. In the electrolytic plating, a piece to be plated is used as a cathode, and an electrolyte is electrolyzed, so that a layer of metal is formed on the piece to be plated. Electroless plating is a method of forming a metal layer by reducing and precipitating metal ions in a solution on an article to be plated. In some embodiments, the metal pattern block 16a may be formed by sputtering and etching.

Step S38: and ashing to remove the residual photoresist layer in the first preset area.

And after ashing, removing the seed crystal layer in the first preset area by dry etching or wet etching.

The metal pattern block 16a of the second conductive trace 16 may be planarized on the upper surface thereof by a polishing process, such as chemical mechanical polishing.

It should be noted that the metal pattern blocks 16a of the second conductive traces 16 in step S3 are arranged according to design requirements, and the distribution of the second conductive traces 16 in different groups of packages 3 may be the same or different.

In addition, in some embodiments, the second conductive trace 16 may also include two or more layers, i.e., have two or more metal pattern layers.

In the step of forming the second dielectric layer 19, in order to prevent the molding layer 14 from being scratched by the process, the second dielectric layer 19 may also be formed on the back surface 14b of the molding layer 14.

The second dielectric layer 19 is an insulating material, which may be an organic high molecular polymer insulating material, an inorganic insulating material, or a composite material. The organic polymer insulating material is, for example, polyimide, epoxy resin, abf (ajinomoto build film), pbo (polybenzoxazole), an organic polymer film, or other organic materials having similar insulating properties. The composite material is inorganic-organic composite material, and can be inorganic-organic polymer composite material, such as SiO₂Resin polymer composite material.

The organic polymer insulating material may be a) laminated on the second conductive trace 16 and the second passivation layer 120 not covering the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 by a laminating process, or b) coated on the second conductive trace 16 and the second passivation layer 120 not covering the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14, and post-cured, or c) cured on the second conductive trace 16 and the second passivation layer 120 not covering the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 by an injection molding process.

When the material of the second dielectric layer 19 is an inorganic insulating material such as silicon dioxide or silicon nitride, the second dielectric layer can be formed on the second conductive trace 16, the second passivation layer 120 not covering the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 by a deposition process.

Compared with inorganic insulating materials, the organic high polymer insulating materials have smaller tensile stress, and can prevent the plastic package body from warping caused by the formation of a large area of the second dielectric layer 19.

The second dielectric layer 19 may comprise one or more layers.

Then, referring to step S4 and fig. 8 in fig. 2, the carrier board 2 is removed, and the active surface 11a of the first die 11, the active surface 13a of the passive component 13, the front surface 10a of the pre-wiring substrate 10 and the front surface 14a of the molding layer 14 are exposed; first conductive traces 15 are formed on the first pads 111, the electrical connection terminals 131, the front side electrical connection points 101, and the front side 14a of the molding layer 14 to electrically connect the first dies 11, the passive devices 13, and the pre-wiring lines 100 in the group.

Referring to fig. 8, after removing the carrier plate 2, the first support plate 4 may be disposed on the second dielectric layer 19.

The removal method of the carrier 2 may be laser lift-off, UV irradiation, or other conventional removal methods.

The first support plate 4 may be used for supporting in subsequent processes of forming the first conductive traces 15, and/or forming the conductive bumps 17, and/or forming the first dielectric layer 18.

The first support plate 4 is a hard plate member and may include a glass plate, a ceramic plate, a metal plate, and the like.

In this embodiment, since the first protection layer 110 is disposed on the active surface 11a of the exposed first die 11 and the third protection layer 130 is disposed on the active surface 13a of the passive device 13, the first protection layer 110 and the third protection layer 130 are exposed after the carrier 2 is removed. Before the first conductive trace 15 is formed, a first opening 110a is formed in the first protection layer 110 to expose the first pad 111, and a third opening 130a is formed in the third protection layer 130 to expose the electrical connection terminal 131.

The first protective layer 110/the third protective layer 130 are made of a laser-reactive material, such as epoxy resin, and the first opening 110 a/the third opening 130a may be formed by laser irradiation to be modified. For the material of the first protection layer 110/the third protection layer 130 being a photosensitive material, such as polyimide, the first opening 110 a/the third opening 130a can be formed by exposing and then developing. As for the materials of the first protection layer 110/the third protection layer 130, which are dry-etchable or wet-etchable materials, such as silicon dioxide, silicon nitride, etc., the first opening 110 a/the third opening 130a may be formed by dry-etchable or wet-etchable materials.

In some embodiments, in the multiple sets of packages 3 to be packaged in step S1, specifically, in the first die assembly 20 and/or the passive device 13, the first protective layer 110 may have a first opening 110a therein for exposing the first bonding pad 111, and/or the third protective layer 130 has a third opening 130a therein for exposing the electrical connection terminal 131.

The forming method of the metal pattern block 15a in the first conductive trace 15 may refer to the forming method of the metal pattern block 16a in the second conductive trace 16. The layout of the first conductive traces 15 may be according to a predetermined layout.

In this embodiment, the first conductive trace 15 comprises one layer.

A part of the number of metal pattern blocks 15a selectively electrically connect the front side electrical connection point 101 with the first pad 111 to electrically connect the pre-wiring substrate 10 with the first die 11; a part of the number of metal pattern blocks 15a selectively electrically connect the front electrical connection point 101 and the electrical connection terminal 131 to electrically connect the pre-wiring substrate 10 and the passive device 13; a part of the metal pattern blocks 15a are selectively electrically connected to the front electrical connection points 101 to lead out the front electrical connection points 101 through the conductive bumps 17. In addition, there may be a partial number of metal pattern blocks 15a selectively electrically connected to the plurality of front electrical connection points 101 to realize circuit layout or electrical conduction of the front electrical connection points 101; there may be a partial number of metal pattern blocks 15a selectively electrically connected to the plurality of first pads 111 to realize circuit layout or electrical conduction of the first pads 111.

In other embodiments, the first conductive trace 15 may include two or more metal pattern layers.

Next, referring to step S5 in fig. 2 and fig. 8, a conductive bump 17 is formed on the first conductive trace 15 and a first dielectric layer 18 is formed to embed the first conductive trace 15 and the conductive bump 17, wherein the conductive bump 17 is exposed outside the first dielectric layer 18.

This step S5 may include steps S51-S55.

Step S51: a photoresist layer is formed on the metal pattern block 15a, the insulating material layer exposed from the front surface 10a of the pre-wiring substrate, and the front surface 14a of the molding layer 14.

In this step S51, in an alternative, the photoresist layer formed may be a photosensitive film. The photosensitive film may be peeled off from the adhesive tape and applied on the metal pattern block 15a, the insulating material layer exposed from the front surface 10a of the pre-wiring substrate, and the front surface 14a of the molding layer 14. In other alternatives, the photoresist layer may be formed by first applying a liquid photoresist and then curing the liquid photoresist by heating.

Step S52: and exposing and developing the photoresist layer to retain the photoresist in the second predetermined area. The second predetermined area is complementary to the area where the conductive bump 17 is to be formed.

This step S52 patterns the photoresist layer. In other alternatives, other sacrificial materials that are easily removable may be used in place of the photoresist layer.

Step S53: the complementary regions of the second predetermined area are filled with a metal layer to form conductive bumps 17.

The step S53 can be performed by an electroplating process. The process of electroplating copper or aluminum is mature. Before electroplating copper or aluminum, a Seed Layer (Seed Layer) can be physically or chemically vapor deposited as a power supply Layer.

Step S54: and ashing to remove the residual photoresist layer in the second preset area.

The conductive bump 17 may be planarized by a polishing process, such as chemical mechanical polishing.

Step S55: referring to fig. 8, a first dielectric layer 18 is formed on the conductive bump 17, the metal pattern block 15a, the insulating material layer exposed from the front surface 10a of the pre-wiring substrate, and the front surface 14a of the molding layer 14; the first dielectric layer 18 is thinned until the conductive bump 17 is exposed.

The material and formation method of the first dielectric layer 18 can be referred to those of the second dielectric layer 19.

In the step of forming the first dielectric layer 18, in order to prevent the molding layer 14 from being scratched by the process, the first dielectric layer 18 may also be formed on the front surface 14a of the molding layer 14 between adjacent groups of packages 3 to be packaged.

When the first dielectric layer 18 covers the conductive bump 17, the first dielectric layer 18 is polished until the conductive bump 17 is exposed.

The first dielectric layer 18 may include one or more layers.

After the conductive bumps 17 are fabricated, in an alternative a), referring to fig. 8, the conductive bumps 17 serve as external connection terminals of the MCM package 1.

b) In an alternative, after exposing the conductive bump 17, an oxidation resistant layer is also formed on the conductive bump 17.

The oxidation resistant layer may include: b1) tin layer, or b2) nickel layer and gold layer stacked from bottom to top, or b3) nickel layer, palladium layer and gold layer stacked from bottom to top. The oxidation resistant layer may be formed using an electroplating process. The material of the conductive bump 17 may be copper, and the oxidation-resistant layer may prevent oxidation of copper, thereby preventing deterioration of electrical connection performance due to oxidation of copper.

c) In an alternative, after exposing the conductive bumps 17, solder balls are also formed on the conductive bumps 17 for flip-chip mounting of the MCM package structure 1 (see fig. 1).

After the conductive bumps 17 are formed, the first support plate 4 is removed as shown in fig. 9.

The first support plate 4 may be removed by conventional methods such as laser lift-off and UV irradiation.

Thereafter, referring to step S6 in fig. 2, fig. 9 and fig. 1, a plurality of MCM package structures 1 are formed by dicing, each MCM package structure 1 including a group of packages 3 to be packaged therein.

For the embodiment in which the pre-wiring substrates 10 of the respective groups of packages 3 to be packaged are connected together, the pre-wiring substrates 10 are cut apart in the present step S6 cutting process.

In the MCM package structure 1 formed through the above steps, on one hand, the first die assemblies 20 with active surfaces facing away from each other achieve the effects of small size and compact structure of the MCM package structure 1. On the other hand, the pre-wiring substrate 10 not only realizes the electrical connection between the first die 11 and the second die 12 and the passive device 13, but also realizes the wiring on both the front surface 14a and the back surface 14b of the molding layer 14, and compared with the wiring on only one surface, the wiring density can be increased, and the MCM package structure 1 with more complicated wiring and smaller volume can be formed.

The use of the pre-wiring substrate 10 is advantageous in that: first, the fine wiring in the rewiring layer is transferred to the pre-wiring substrate 10, so that the probability of short circuit is reduced, the product yield is increased, the number of layers of the first conductive traces 15 and/or the second conductive traces 16 can be reduced, and the process complexity is reduced. Second, providing a pre-formed pre-wiring substrate 10 allows testing of the pre-wiring substrate 10 prior to packaging, avoiding the use of known poor pre-wiring substrates 10. Thirdly, the pre-wiring substrate 10 is a prefabricated substrate, and the manufacturing process is independent of the packaging process, so that the packaging time of the whole packaging process can be saved.

Furthermore, transferring the wiring layers that need to be formed on the die

active surfaces

A second embodiment of the present invention provides another method for fabricating the MCM package structure 1 of fig. 1. Fig. 10 is a flow chart of a method of fabrication. Fig. 11 and 12 are intermediate schematic diagrams corresponding to the flow chart in fig. 10.

Referring to fig. 10 and 2, the manufacturing method of the present embodiment is substantially the same as the manufacturing method of the embodiment shown in fig. 2, and the differences are only:

step S2', referring to fig. 5, forming a molding layer 14 embedding each group of to-be-packaged components 3 on the surface of the carrier 2;

step S3', referring to fig. 11, removing the carrier 2 to expose the active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14; forming first conductive traces 15 on the first pads 111, the electrical connection terminals 131, the front side electrical connection points 101, and the front side 14a of the molding layer 14 to electrically connect the first dies 11, the passive devices 13 and the pre-wiring lines 100 in the group;

step S4', with continued reference to fig. 11, forming a conductive bump 17 on the first conductive trace 15 and forming a first dielectric layer 18 embedding the first conductive trace 15 and the conductive bump 17, wherein the conductive bump 17 is exposed outside the first dielectric layer 18;

step S5', referring to fig. 12, thinning the molding layer 14 until the second passivation layer 120 and the back surface 10b of the pre-wiring substrate 10 are exposed; forming a second opening 120a in the second protective layer 120 to expose the second pad 121; forming second conductive traces 16 on the second protective layer 120, the second pads 121, the back side electrical connections 102, and the back side 14b of the molding layer 14 to electrically connect the second dies 12 in the group with the pre-routing lines 100; a second dielectric layer 19 is formed embedding the second conductive trace 16.

Step S2 'may refer to step S2 of the foregoing embodiment, step S3' may refer to step S4 of the foregoing embodiment, step S4 'may refer to step S5 of the foregoing embodiment, and step S5' may refer to steps S2 and S3 of the foregoing embodiment.

Specifically, in step 3', referring to fig. 11, after the carrier plate 2 is removed, the first support plate 4 may be disposed on the back surface 14b of the plastic sealing layer 14; removing the first support plate 4 after the step S4' is finished, and disposing a second support plate 5 on the conductive bump 17 and the first dielectric layer 18; the second support plate 5 is removed after step S5' is finished.

In other words, the carrier 2 is removed first, and the first conductive trace 15, the conductive bump 17 and the first dielectric layer 18 embedding the first conductive trace 15 and the conductive bump 17 are formed; then, the second supporting board 5 is disposed on the first dielectric layer 18 and the conductive bump 17, and the plastic package layer 14 is thinned to form a second conductive trace 16 and a second dielectric layer 19.

In some embodiments, thinning the molding layer 14 may also be performed in step S2'.

Fig. 13 is a schematic cross-sectional structure diagram of an MCM package structure of a third embodiment of the invention. Referring to fig. 13, MCM package structure 6 in the present embodiment is substantially the same as MCM package structure 1 of the preceding embodiment, except that: omitting the first protective layer 110 and the third protective layer 130, and providing the active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14 with the third dielectric layer 21; the third dielectric layer 21 has a fourth opening 21a exposing the first pad 111, the electrical connection terminal 131 and the front surface electrical connection point 101; the first conductive trace 15 is located on the first pad 111, the electrical connection terminal 131, the front electrical connection point 101, and the third dielectric layer 21.

Accordingly, as for the manufacturing method, the difference from the two previous embodiments is that: in step S4/S3', the carrier board 2 is removed to expose the active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14: forming a third dielectric layer 21 on the exposed active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14; forming a plurality of fourth openings 21a in the third dielectric layer 21, the fourth openings 21a exposing the first pads 111, the electrical connection terminals 131 and the front electrical connection points 101; first conductive traces 15 are then formed on the first pads 111, the electrical connection terminals 131, the front electrical connection points 101, and the third dielectric layer 20.

The material of the third dielectric layer 21 is referred to the material of the first dielectric layer 18 and the second dielectric layer 19.

The material of the third dielectric layer 21 is a laser-reactive material, such as epoxy resin, and the fourth opening 21a can be formed by laser irradiation to be modified. The fourth opening 21a can be formed by exposing and then developing the third dielectric layer 21, which is made of a photosensitive material, such as polyimide. As for the material of the third dielectric layer 21, which is a material that can be dry-etched or wet-etched, such as silicon dioxide, silicon nitride, etc., the fourth opening 21a can be formed by dry-etched or wet-etched.

Fig. 14 is a schematic cross-sectional structure view of an MCM package structure of a fourth embodiment of the invention. Referring to fig. 14, MCM package structure 7 in the present embodiment is substantially the same as MCM package structures 1, 6 of the preceding embodiments, except that: the conductive bump 17 is connected to the second conductive trace 16; correspondingly, the second dielectric layer 19 embeds the second conductive trace 16 and the conductive bump 17, the conductive bump 17 is exposed outside the second dielectric layer 19, and the first dielectric layer 18 embeds the first conductive trace 15.

Accordingly, as for the manufacturing method, the difference from the three previous embodiments is that: in step S3/S5', after forming the second conductive trace 16, forming a conductive bump 17 on the second conductive trace 16 and forming a second dielectric layer 19 embedding the second conductive trace 16 and the conductive bump 17, wherein the conductive bump 17 is exposed outside the second dielectric layer 19; in step S5/S4', the first dielectric layer 18 embedding the first conductive trace 15 is formed.

Fig. 15 is a schematic cross-sectional structure of an MCM package structure of a fifth embodiment of the invention. Referring to fig. 15, MCM package 8 of the present embodiment is substantially the same as MCM packages 1, 6, 7 of the preceding embodiments and methods of making the same, except that: the first die assembly 20 is replaced with a die, for example, with the first die 11. Accordingly, the conductive bump 17 is connected to the rear electrical connection point 102. The conductive bump 17 is exposed outside the second dielectric layer 19, and the first dielectric layer 18 covers the conductive trace 15.

In other embodiments, the first die assembly 20 may also be replaced with the second die 12, or with a second die assembly that includes a plurality of first dies 11, or a plurality of second dies 12. In other words, the active side of each die is oriented the same in the second die assembly.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. An MCM package structure, comprising:

a passive device located within the second through opening; the passive device comprises an electric connection end which is positioned on an active surface of the passive device;

a conductive bump connected to the first conductive trace;

a second dielectric layer embedding the second conductive trace.

2. The MCM package structure of claim 1, wherein the first die assembly is a die stack structure.

3. The MCM package structure of claim 1, wherein the conductive bump connection to the first conductive trace is replaced with: the conductive bump is connected to the second conductive trace; correspondingly, the second dielectric layer embeds the second conductive trace and the conductive bump, the conductive bump is exposed outside the second dielectric layer, and the first dielectric layer embeds the first conductive trace.

4. The MCM package structure of claim 1, further comprising: a third dielectric layer on an active side of the first die, an active side of the passive device, a front side of the pre-wiring substrate, and a front side of the molding layer; the third dielectric layer exposes the first pad, the electrical connection end and the front surface electrical connection point; the first conductive trace is on the first pad, the electrical connection end, the front side electrical connection point, and the third dielectric layer.

5. The MCM package structure of claim 1, further comprising: a first protective layer covering an active side of the first die, the first protective layer exposing the first bonding pad; the front surface of the plastic packaging layer exposes the first protective layer and the first bonding pad.

6. The MCM package structure of claim 1, wherein a material of the second protective layer is an organic high molecular polymer insulating material, an inorganic insulating material, or a composite material; and/or the material of the first dielectric layer is an organic high molecular polymer insulating material or an inorganic insulating material or a composite material; and/or the material of the second dielectric layer is an organic high molecular polymer insulating material, an inorganic insulating material or a composite material.

7. A method for manufacturing an MCM package structure is characterized by comprising the following steps:

forming a second opening in the second protective layer to expose the second pad; forming second conductive traces on the second protective layer, the second pads, the backside electrical connections, and the backside of the molding layer to electrically connect the second die within a group with the pre-routing lines; forming a second dielectric layer embedding the second conductive trace;

8. The method for fabricating an MCM package structure of claim 7, wherein after the step of forming the second conductive trace, forming a conductive bump on the second conductive trace and forming a second dielectric layer embedding the second conductive trace and the conductive bump, the conductive bump being exposed outside the second dielectric layer; the forming of the conductive bump on the first conductive trace and the forming of the first dielectric layer embedding the first conductive trace and the conductive bump, the conductive bump exposed outside the first dielectric layer replaced by: a first dielectric layer is formed embedding the first conductive trace.

9. The method for fabricating an MCM package structure according to claim 7, wherein the carrier is removed to form the first conductive traces, the conductive bumps, and the first dielectric layer embedding the first conductive traces and the conductive bumps; and arranging a support plate on the first dielectric layer and the conductive bump, thinning the plastic packaging layer, and forming the second conductive trace and the second dielectric layer.

10. The method for fabricating an MCM package structure of claim 7, wherein after removing the carrier board, a third dielectric layer is formed on the exposed active surface of the first die, the active surface of the passive device, the front surface of the pre-wiring substrate, and the front surface of the molding layer; forming a plurality of fourth openings in the third dielectric layer, wherein the fourth openings expose the first pads, the electrical connection ends and the front electrical connection points; forming the first conductive trace on the first pad, the electrical connection end, the front side electrical connection point, and the third dielectric layer.

11. The method of fabricating an MCM package structure of claim 7, wherein in the first die assembly, an active side of the first die is covered with a first protective layer; the first protective layer faces the carrier plate; the first protective layer is provided with a first opening for exposing the first bonding pad, or after the carrier plate removing step and before the first conductive trace forming step, a first opening is formed in the first protective layer to expose the first bonding pad;

and/or the active surface of the passive device is covered with a third protective layer; the third protective layer faces the carrier plate; and the third protective layer in the to-be-packaged part is provided with a third opening for exposing the electric connection end, or after the carrier plate is removed and before the first conductive trace is formed, a third opening is formed in the third protective layer so as to expose the electric connection end.

12. A method for fabricating an MCM package structure according to any of claims 7 to 11, wherein said pre-wiring substrates of respective groups to be packaged are joined together, and said step of cutting to form a plurality of MCM package structures is performed by cutting.

13. An MCM package structure, comprising:

a die positioned within the first through opening; the die comprises a plurality of bonding pads, and the bonding pads are positioned on the active surface of the die;

the conductive bump is connected to the back surface electric connection point;

a first dielectric layer embedding the first conductive trace; and

14. The MCM package structure of claim 13, wherein a second die assembly replaces the die, the second die assembly including a plurality of dies, the plurality of dies having active faces facing the same.

15. A method for manufacturing an MCM package structure is characterized by comprising the following steps:

providing a carrier and a plurality of groups of to-be-packaged parts borne on the carrier, wherein each group of to-be-packaged parts comprises: the semiconductor device comprises a pre-wiring substrate with a first through opening and a second through opening, a bare chip positioned in the first through opening, and a passive device positioned in the second through opening; a pre-wiring circuit is arranged in the pre-wiring substrate and comprises a front surface electric connection point and a back surface electric connection point, the front surface electric connection point is exposed on the front surface of the pre-wiring substrate, and the back surface electric connection point is exposed on the back surface of the pre-wiring substrate; the die comprises a plurality of bonding pads, and the bonding pads are positioned on the active surface of the die; the passive device comprises an electric connection end, and the electric connection end is positioned on the active surface of the passive device; the front surface of the pre-wiring substrate, the active surface of the passive device and the active surface of the bare chip face the carrier board;

forming a conductive bump on the back electrical connection point and forming a second dielectric layer embedding the conductive bump, the conductive bump being exposed outside the second dielectric layer;

16. The method of fabricating an MCM package structure of claim 15, wherein a second die assembly replaces the die, the second die assembly including a plurality of dies, the plurality of dies having active faces facing the same.