KR20090086329A - 반도체 장치 - Google Patents

반도체 장치 Download PDF

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Publication number
KR20090086329A
KR20090086329A KR1020090009268A KR20090009268A KR20090086329A KR 20090086329 A KR20090086329 A KR 20090086329A KR 1020090009268 A KR1020090009268 A KR 1020090009268A KR 20090009268 A KR20090009268 A KR 20090009268A KR 20090086329 A KR20090086329 A KR 20090086329A
Authority
KR
South Korea
Prior art keywords
channel region
region
channel
transistor
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020090009268A
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English (en)
Korean (ko)
Inventor
게이스케 우에무라
준 오사나이
Original Assignee
세이코 인스트루 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 세이코 인스트루 가부시키가이샤 filed Critical 세이코 인스트루 가부시키가이샤
Publication of KR20090086329A publication Critical patent/KR20090086329A/ko
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/8311Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having different channel structures

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020090009268A 2008-02-07 2009-02-05 반도체 장치 Withdrawn KR20090086329A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2008-027246 2008-02-07
JP2008027246A JP2009188223A (ja) 2008-02-07 2008-02-07 半導体装置

Publications (1)

Publication Number Publication Date
KR20090086329A true KR20090086329A (ko) 2009-08-12

Family

ID=40938172

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020090009268A Withdrawn KR20090086329A (ko) 2008-02-07 2009-02-05 반도체 장치

Country Status (5)

Country Link
US (1) US20090200613A1 (enExample)
JP (1) JP2009188223A (enExample)
KR (1) KR20090086329A (enExample)
CN (1) CN101504946A (enExample)
TW (1) TW201001676A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9293730B2 (en) 2013-10-15 2016-03-22 Samsung Display Co., Ltd. Flexible organic light emitting diode display and manufacturing method thereof
US9553136B2 (en) 2012-09-28 2017-01-24 Samsung Display Co., Ltd. Organic light emitting diode display

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012064854A (ja) * 2010-09-17 2012-03-29 Toshiba Corp 半導体装置
FR2993983A1 (fr) * 2012-07-30 2014-01-31 St Microelectronics Rousset Procede de compensation d'effets de contraintes mecaniques dans un microcircuit
CN206774547U (zh) * 2017-05-11 2017-12-19 合肥鑫晟光电科技有限公司 薄膜晶体管结构、电路结构、显示基板及显示装置
JP7092692B2 (ja) * 2019-01-22 2022-06-28 エイブリック株式会社 応力補償制御回路及び半導体センサ装置
US10903369B2 (en) 2019-02-27 2021-01-26 International Business Machines Corporation Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions
US10957799B2 (en) 2019-02-27 2021-03-23 International Business Machines Corporation Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions
JP7297479B2 (ja) * 2019-03-15 2023-06-26 エイブリック株式会社 半導体装置
JP2020177393A (ja) * 2019-04-17 2020-10-29 エイブリック株式会社 定電流回路及び半導体装置
US20240145565A1 (en) * 2022-10-27 2024-05-02 Advanced Micro Devices, Inc. Apparatuses and systems for offset cross field-effect transistors

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53675B2 (enExample) * 1972-03-16 1978-01-11
EP0466463A1 (en) * 1990-07-10 1992-01-15 Kawasaki Steel Corporation Basic cell and arrangement structure thereof
EP0845815A3 (en) * 1996-11-28 1999-03-03 Matsushita Electric Industrial Co., Ltd. Semiconductor device, method of designing the same and semiconductor integrated circuit device
US6601224B1 (en) * 1999-08-30 2003-07-29 Intel Corporation Layout to minimize gate orientation related skew effects
JP2001177357A (ja) * 1999-12-17 2001-06-29 Matsushita Electric Works Ltd 差動アンプ
US6794718B2 (en) * 2002-12-19 2004-09-21 International Business Machines Corporation High mobility crystalline planes in double-gate CMOS technology
JP2005197622A (ja) * 2004-01-09 2005-07-21 Sharp Corp 半導体集積回路設計装置、半導体集積回路設計方法、半導体集積回路の電流値相対ばらつき特性評価方法、半導体集積回路の抵抗値相対ばらつき特性評価方法、半導体集積回路の製造方法、制御プログラムおよび可読記録媒体
JP4984316B2 (ja) * 2005-08-18 2012-07-25 セイコーエプソン株式会社 半導体装置、電気光学装置及び電子機器
JP4602908B2 (ja) * 2006-01-10 2010-12-22 シャープ株式会社 半導体装置
JP5157289B2 (ja) * 2007-07-11 2013-03-06 ミツミ電機株式会社 Mosトランジスタ及びこれを用いたmosトランジスタ回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9553136B2 (en) 2012-09-28 2017-01-24 Samsung Display Co., Ltd. Organic light emitting diode display
US9960220B2 (en) 2012-09-28 2018-05-01 Samsung Display Co., Ltd. Organic light emitting diode display
US9293730B2 (en) 2013-10-15 2016-03-22 Samsung Display Co., Ltd. Flexible organic light emitting diode display and manufacturing method thereof

Also Published As

Publication number Publication date
JP2009188223A (ja) 2009-08-20
TW201001676A (en) 2010-01-01
CN101504946A (zh) 2009-08-12
US20090200613A1 (en) 2009-08-13

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20090205

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid