KR20080102213A - 명령 프리페치 버퍼 깊이의 동적 제어를 갖는 데이터 프로세서 및 그 방법 - Google Patents

명령 프리페치 버퍼 깊이의 동적 제어를 갖는 데이터 프로세서 및 그 방법 Download PDF

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Publication number
KR20080102213A
KR20080102213A KR1020087022855A KR20087022855A KR20080102213A KR 20080102213 A KR20080102213 A KR 20080102213A KR 1020087022855 A KR1020087022855 A KR 1020087022855A KR 20087022855 A KR20087022855 A KR 20087022855A KR 20080102213 A KR20080102213 A KR 20080102213A
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South Korea
Prior art keywords
prefetch buffer
control unit
instruction
maximum depth
variable maximum
Prior art date
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KR1020087022855A
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English (en)
Korean (ko)
Inventor
제프리 더블유. 스코트
윌리암 씨. 모이어
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프리스케일 세미컨덕터, 인크.
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Publication of KR20080102213A publication Critical patent/KR20080102213A/ko
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6022—Using a prefetch buffer or dedicated prefetch cache
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020087022855A 2006-03-21 2007-02-23 명령 프리페치 버퍼 깊이의 동적 제어를 갖는 데이터 프로세서 및 그 방법 Withdrawn KR20080102213A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/385,463 US9304773B2 (en) 2006-03-21 2006-03-21 Data processor having dynamic control of instruction prefetch buffer depth and method therefor
US11/385,463 2006-03-21

Publications (1)

Publication Number Publication Date
KR20080102213A true KR20080102213A (ko) 2008-11-24

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Application Number Title Priority Date Filing Date
KR1020087022855A Withdrawn KR20080102213A (ko) 2006-03-21 2007-02-23 명령 프리페치 버퍼 깊이의 동적 제어를 갖는 데이터 프로세서 및 그 방법

Country Status (5)

Country Link
US (1) US9304773B2 (enExample)
EP (1) EP1999574B1 (enExample)
JP (1) JP5279701B2 (enExample)
KR (1) KR20080102213A (enExample)
WO (1) WO2007109395A2 (enExample)

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KR20180015660A (ko) * 2015-06-05 2018-02-13 에이알엠 리미티드 가변 길이 명령 처리 모드

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KR20180015660A (ko) * 2015-06-05 2018-02-13 에이알엠 리미티드 가변 길이 명령 처리 모드

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US20070226462A1 (en) 2007-09-27
EP1999574A2 (en) 2008-12-10
US9304773B2 (en) 2016-04-05
WO2007109395A3 (en) 2008-10-30
EP1999574B1 (en) 2012-04-11
JP5279701B2 (ja) 2013-09-04
WO2007109395A2 (en) 2007-09-27
EP1999574A4 (en) 2009-06-03
JP2009530753A (ja) 2009-08-27

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PA0105 International application

Patent event date: 20080919

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid