DE69935066D1 - Befehlsvorausholeinheit - Google Patents

Befehlsvorausholeinheit

Info

Publication number
DE69935066D1
DE69935066D1 DE69935066T DE69935066T DE69935066D1 DE 69935066 D1 DE69935066 D1 DE 69935066D1 DE 69935066 T DE69935066 T DE 69935066T DE 69935066 T DE69935066 T DE 69935066T DE 69935066 D1 DE69935066 D1 DE 69935066D1
Authority
DE
Germany
Prior art keywords
befehlsvorausholeinheit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69935066T
Other languages
English (en)
Inventor
Laurent Wojcieszak
Andrew Cofler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Application granted granted Critical
Publication of DE69935066D1 publication Critical patent/DE69935066D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3814Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30189Instruction operation extension or modification according to execution mode, e.g. mode flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
DE69935066T 1999-05-03 1999-05-03 Befehlsvorausholeinheit Expired - Lifetime DE69935066D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP99410052A EP1050802B1 (de) 1999-05-03 1999-05-03 Befehlsvorausholeinheit

Publications (1)

Publication Number Publication Date
DE69935066D1 true DE69935066D1 (de) 2007-03-22

Family

ID=8242255

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69935066T Expired - Lifetime DE69935066D1 (de) 1999-05-03 1999-05-03 Befehlsvorausholeinheit

Country Status (3)

Country Link
US (1) US6711668B1 (de)
EP (1) EP1050802B1 (de)
DE (1) DE69935066D1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040158695A1 (en) 1999-05-03 2004-08-12 Laurent Ugen Method and apparatus for handling transfer of guarded instructions in a computer system
US7065637B1 (en) 2000-08-24 2006-06-20 Veritas Operating Corporating System for configuration of dynamic computing environments using a visual interface
US7082521B1 (en) 2000-08-24 2006-07-25 Veritas Operating Corporation User interface for dynamic computing environment using allocateable resources
US7027412B2 (en) * 2000-11-10 2006-04-11 Veritas Operating Corporation System for dynamic provisioning of secure, scalable, and extensible networked computer environments
JP2002318687A (ja) * 2001-04-18 2002-10-31 Fujitsu Ltd 情報処理装置及び計算機システム
US6986033B2 (en) 2002-09-10 2006-01-10 Veritas Operating Corporation System for automated boot from disk image
US7069428B2 (en) * 2002-09-10 2006-06-27 Veritas Operating Corporation System for managing boot-up of target computers
US7185178B1 (en) 2004-06-30 2007-02-27 Sun Microsystems, Inc. Fetch speculation in a multithreaded processor
US9304773B2 (en) * 2006-03-21 2016-04-05 Freescale Semiconductor, Inc. Data processor having dynamic control of instruction prefetch buffer depth and method therefor
US9798528B2 (en) * 2006-09-13 2017-10-24 International Business Machines Corporation Software solution for cooperative memory-side and processor-side data prefetching
US8095488B1 (en) 2007-12-31 2012-01-10 Symantec Corporation Method and apparatus for managing configurations
US8051028B2 (en) * 2007-05-31 2011-11-01 Symantec Corporation Method and apparatus for generating configuration rules for computing entities within a computing environment using association rule mining
US9354887B2 (en) * 2010-06-28 2016-05-31 International Business Machines Corporation Instruction buffer bypass of target instruction in response to partial flush
US9507628B1 (en) 2015-09-28 2016-11-29 International Business Machines Corporation Memory access request for a memory protocol
GB2563582B (en) * 2017-06-16 2020-01-01 Imagination Tech Ltd Methods and systems for inter-pipeline data hazard avoidance

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4654781A (en) * 1981-10-02 1987-03-31 Raytheon Company Byte addressable memory for variable length instructions and data
US4847759A (en) * 1985-03-18 1989-07-11 International Business Machines Corp. Register selection mechanism and organization of an instruction prefetch buffer
US4714994A (en) * 1985-04-30 1987-12-22 International Business Machines Corp. Instruction prefetch buffer control
JPH0395629A (ja) * 1989-09-08 1991-04-22 Fujitsu Ltd データ処理装置
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
DE69030648T2 (de) * 1990-01-02 1997-11-13 Motorola Inc Verfahren zum sequentiellen Vorabruf von 1-Wort-, 2-Wort oder 3-Wort-Befehlen
JP2881049B2 (ja) * 1991-07-30 1999-04-12 株式会社日立製作所 プリフェッチバッファ
US5680564A (en) * 1995-05-26 1997-10-21 National Semiconductor Corporation Pipelined processor with two tier prefetch buffer structure and method with bypass
US5734881A (en) * 1995-12-15 1998-03-31 Cyrix Corporation Detecting short branches in a prefetch buffer using target location information in a branch target cache
JPH09190348A (ja) * 1996-01-09 1997-07-22 Matsushita Electric Ind Co Ltd 命令プリフェッチバッファ制御方法、命令プリフェッチバッファ制御装置、及び命令プリフェッチバッファフラッシュ方法
US6189090B1 (en) * 1997-09-17 2001-02-13 Sony Corporation Digital signal processor with variable width instructions
US6385757B1 (en) * 1999-08-20 2002-05-07 Hewlett-Packard Company Auto design of VLIW processors
US6317811B1 (en) * 1999-08-26 2001-11-13 International Business Machines Corporation Method and system for reissuing load requests in a multi-stream prefetch design

Also Published As

Publication number Publication date
EP1050802A1 (de) 2000-11-08
EP1050802B1 (de) 2007-02-07
US6711668B1 (en) 2004-03-23

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Legal Events

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