KR20080001726A - Method of manufacturing plasma display panel and plasma display apparatus thereof - Google Patents

Abstract

A plasma display device and a manufacturing method thereof are provided to simplify a panel manufacturing process by co-firing an electrode, a black matrix, and a dielectric material on a substrate at the same time. A paste for forming an electrode is applied on a substrate(500,510). A dielectric material is laminated on the substrate(520). The paste for forming the electrode and the dielectric material are co-fired on the substrate at the same time(530). A thickness of the dielectric material laminated on the substrate is between 65 and 82 um from the substrate. The paste for forming the electrode contains an organic component and an inorganic component. The inorganic component contains a glass frit and a conductive material. The glass frit accommodates 1.5 to 4w% of the paste for forming the electrode.

Description

Method of manufacturing plasma display panel and plasma display apparatus

1 is a perspective view showing an embodiment of a structure of a plasma display panel according to the present invention.

2 is a cross-sectional view illustrating an embodiment of an electrode arrangement of a plasma display panel.

FIG. 3 is a timing diagram illustrating an embodiment of a method of time-divisionally driving a plasma display panel by dividing one frame into a plurality of subfields.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel.

5 is a flowchart illustrating an embodiment of a method of manufacturing a plasma display panel according to the present invention.

6 is a cross-sectional view illustrating an embodiment of a pre-firing structure of a black matrix, an electrode, and a dielectric formed on a substrate.

7 is a cross-sectional view showing an embodiment of a post-firing structure of a black matrix, an electrode, and a dielectric formed on a substrate.

8A and 8B illustrate embodiments of the shape of black matrices, electrodes, and dielectrics fired on a substrate.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device, and more particularly, to a method of manufacturing a plasma display panel used in the device and a dielectric formed in the panel.

In general, a plasma display panel is a partition wall formed between an upper substrate and a lower substrate to form one unit cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because a thin and light configuration is possible.

In general, a plasma display panel includes an upper panel, which is a display surface on which an image is displayed, and a lower panel coupled in parallel with a predetermined distance therebetween, and the upper panel is formed by pairing a scan electrode and a sustain electrode on an upper substrate. A plurality of sustain electrode pairs, a black matrix and a dielectric layer are formed, and a plurality of address electrodes, phosphors, dielectric layers, etc. are arranged on the lower substrate so as to intersect with the plurality of sustain electrode pairs.

The conventional plasma display panel having the structure as described above is largely manufactured through a glass substrate manufacturing process, an upper panel manufacturing process, a lower panel manufacturing process, and an assembly process. Bubbles are produced during the panel manufacturing process, in particular, the firing of the electrode, the black matrix, or the dielectric layer. May occur.

In the case of the electrode formed by the conventional manufacturing method as described above, when the voltage is applied, the insulation of the electrode is destroyed as the voltage is concentrated on the generated bubble portion, thereby destroying the panel, thereby reducing the reliability of the plasma display device. There was a problem.

In order to solve the above problems, an object of the present invention is to provide a plasma display panel manufacturing method and a plasma display apparatus which can simplify the manufacturing process of the plasma display panel and prevent damage to the panel due to bubble generation. It is done.

According to an aspect of the present invention, there is provided a method of manufacturing a plasma display panel, comprising: placing an electrode forming paste on the substrate; Laminating a dielectric on the substrate; And simultaneously baking the electrode forming paste and the dielectric on the substrate, wherein the thickness of the laminated dielectric is 65 to 82 μm from the substrate.

More preferably, the thickness of the laminated dielectric material is 75 to 80 μm from the substrate. In addition, the thickness of the laminated dielectric material is preferably from 60 to 78㎛, more preferably from 70 to 78㎛ from the electrode forming paste.

The electrode forming paste may include an organic component; And an inorganic component including a glass frit and a conductive metal, wherein the glass frit is 1.5 to 4% by weight of the electrode forming paste. Preferably, the thickness of the electrode forming paste located on the substrate is 7 to 9 mu m.

Preferably, the method of manufacturing the plasma display panel further includes placing a black matrix forming paste on the substrate, wherein the firing step comprises forming an electrode forming paste, a black matrix forming paste, and a dielectric on the substrate. It is preferable to co-fir.

The black matrix forming paste may include an organic component; And an inorganic component including glass frit and cobalt oxide, wherein the glass frit is 1.5 to 4% by weight of the black matrix forming paste.

Preferably, the thickness of the black matrix forming paste located on the substrate is 1.5 to 2.5 mu m.

Plasma display device according to the present invention for solving the above technical problem, the upper substrate; A first electrode, a second electrode and a dielectric layer formed on the upper substrate; A lower substrate disposed to face the upper substrate; And a third electrode formed on the lower substrate, wherein the thickness of the dielectric layer is 25 to 35 μm from the upper substrate.

Preferably, the dielectric layer has a thickness of 20 to 30 μm from the electrode, at least one of the first and second electrodes includes glass frit and silver (Ag), and the glass frit is the electrode Is preferably 2.5 to 4% by weight. It is preferable that the thickness of at least one of the said 1st, 2nd electrode is 3-5 micrometers.

The plasma display apparatus further includes a black matrix formed on the upper substrate, wherein the black matrix includes glass frit and cobalt oxide, and the glass frit is 15 to 25% by weight of the black matrix. Do. Preferably, the black matrix has a thickness of 0.25 to 0.45 mu m.

Hereinafter, a plasma display panel manufacturing method and a plasma display apparatus according to the present invention will be described in detail with reference to the accompanying drawings. 1 is a perspective view showing an embodiment of a plasma display panel according to the present invention.

As shown in FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrodes 11b and 12b. 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). have. The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the exemplary embodiment of the present invention, the sustain electrode pairs 11 and 12 may not only have a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also the buses without the transparent electrodes 11a and 12a. Only the electrodes 11b and 12b may be configured. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11c to absorb external light generated outside the upper substrate 10 to reduce reflection. A black matrix (BM, 15) is arranged that functions to block and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the exemplary embodiment of the present invention is formed on the upper substrate 10, the first black matrix 15 and the transparent electrodes 11a and 12a formed at positions overlapping the partition wall 21. And the second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also referred to as black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, or may not be simultaneously formed and thus not physically connected. .

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are formed separately.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons.

In addition, the address electrode 22 is formed in a direction crossing the scan electrode 11 and the sustain electrode 12. In addition, the lower dielectric layer 23 and the partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, phosphor layers are formed on the surfaces of the lower dielectric layer 23 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape, and physically distinguishes discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells.

In an embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in one embodiment of the present invention, although the R, G and B discharge cells are shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

FIG. 2 illustrates an embodiment of an electrode arrangement of a plasma display panel, and a plurality of discharge cells constituting the plasma display panel are preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Ym are simultaneously scanned is possible. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down in the center portion of the panel.

3 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to an embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, a display data signal is applied to the address electrode X, and scan pulses corresponding to each scan electrode Y are sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to form wall charges in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. . For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel with respect to the divided subfield.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. A reset section for initializing the discharge cells of the entire screen using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells.

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set-down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), thereby eliminating discharge discharge in all the discharge cells. Generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, a negative scan signal scan is sequentially applied to the scan electrode, and at the same time, a positive data signal data is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. Meanwhile, a signal for maintaining a sustain voltage is applied to the sustain electrode during the set down period and the address period.

In the sustain period, a sustain pulse is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The driving waveforms shown in FIG. 4 are first embodiments of signals for driving the plasma display panel according to the present invention, and the present invention is not limited to the waveforms shown in FIG. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. May be authorized. In addition, the single sustain driving may be performed by applying the sustain signal to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge.

5 is a flowchart illustrating an embodiment of a method of manufacturing a plasma display panel according to the present invention. The black matrix forming paste is applied to the upper substrate (step 500), and the electrode forming paste is applied onto the applied black matrix forming paste (step 510). The upper substrate is preferably made of glass (glass) material.

The black matrix paste applied on the substrate is composed of an organic component that burns out upon firing and an inorganic component including glass frit and cobalt oxide (Co ₃ O ₄ ). It is preferable that it is 1.5 to 4 weight% of the said paste. The glass frit is a glass in a molten form, and serves to cause the black matrix to be formed on the substrate when the paste is attached to the substrate upon firing.

More preferably, the glass frit is preferably 2.5 to 3.5% by weight of the paste. In addition, the inorganic component containing the glass frit and cobalt oxide is preferably 25 to 40% by weight of the organic component, and the glass frit is preferably contained at 15 to 25% by weight of the inorganic component.

When the black matrix paste has a component composition including the glass frit in the range as described above, it is possible to maintain the adhesion and stability of the paste and to reduce bubble generation during firing, and to improve the exposure and development margin of the black matrix. Can be.

The most preferable weight ratio of each component contained in the black matrix paste is 85.8% of organic components, 11.1% of cobalt oxide, and 3.1% of glass frit.

It is preferable that the viscosity of a black matrix paste is 10-20 Pa.s (Pascal second). When the viscosity of the black matrix paste has the above range, it is possible to prevent clogging of the nozzle applying the paste and spreading of the applied paste.

The F.O.G (Fineness Of Grind) result of the black matrix paste is preferably 10 μm or less, and the paste can be applied stably when having the above values.

The organic component included in the black matrix paste may include a photosensitive component including a photosensitive monomer, a photosensitive oligomer, or a photosensitive polymer, and preferably a binder, a photopolymerization initiator, or an ultraviolet ray. It may further include additive components such as absorbents, sensitizers, sensitizers, polymerization inhibitors, plasticizers, thickeners, organic solvents, antioxidants, dispersants, organic or inorganic precipitation inhibitors or leveling agents.

The electrode paste applied on the substrate is composed of an organic component that burns out upon firing, and an inorganic component including glass frit and silver (Ag), wherein the glass frit is 1.5 to It is preferable that it is 4 weight%.

More preferably, the glass frit is 2-3 wt% of the paste. In addition, the organic component is preferably 35 to 45% by weight of the inorganic component containing glass frit and silver (Ag), and the glass frit is preferably contained at 3 to 4.5% by weight of the inorganic component.

When the electrode paste has a component composition including the glass frit in the above-described range, it is possible to reduce the generation of bubbles during firing while maintaining the adhesion and stability of the paste, and to improve the exposure and development margin of the black matrix. have.

The most preferred weight ratio of each component included in the electrode paste is 29.9% organic component, 67.8% silver (Ag), and 2.3% glass frit.

It is preferable that the viscosity of an electrode paste is 11-25 Pa.s (Pascal second). When the viscosity of the electrode paste has the above range, it is possible to prevent clogging of the nozzles for applying the paste and spreading of the applied paste.

The F.O.G (Fineness Of Grind) result of the electrode paste is preferably 10 μm or less, and the paste can be applied stably when having the above values.

The organic component included in the electrode paste may include a photosensitive component including a photosensitive monomer, a photosensitive oligomer, or a photosensitive polymer, and preferably a binder, a photopolymerization initiator, or an ultraviolet absorber. It may further include additive components such as sensitizers, sensitizers, polymerization inhibitors, plasticizers, thickeners, organic solvents, antioxidants, dispersants, organic or inorganic precipitation inhibitors or leveling agents.

Silver (Ag) contained in the electrode paste may be replaced with a metal having other conductivity, for example, copper or two or more metal compounds. The scan electrode and the sustain electrode are formed on the upper substrate by the electrode paste having the above configuration.

As shown in FIG. 2, when formed on the ITO electrode, which is a transparent electrode on the upper substrate, the paste for forming the ITO electrode is first applied to the upper substrate before 500 steps, and is formed between the ITO electrode and the scan electrode or the sustain electrode. It is desirable to have the black matrix positioned.

The dielectric is laminated on the upper substrate to which the black matrix paste and the electrode paste are applied (step 520), and the coated black matrix paste and the electrode paste and the laminated dielectric are simultaneously fired (step 530). The firing refers to a process of heating the combined raw material to make a curable material.

An embodiment of the simultaneous firing method of step 530 is as follows. As the firing temperature is increased from low temperature to high temperature, a panel is formed inside the dielectric by the solvent of the laminated dielectric and the organic component vaporized at low temperature, and the organic component of the electrode is formed through the channel where the phase is formed. It is burned out and finally the electrode and dielectric are baked to form on the upper substrate.

In the above, the method of forming the electrode, the black matrix, and the dielectric on the upper substrate of the panel has been described with reference to FIG. 5, but the method of manufacturing the panel is also applicable to forming the address electrode and the dielectric on the lower substrate.

6 is a cross-sectional view illustrating an embodiment of a pre-firing structure of a black matrix, an electrode, and a dielectric formed on a substrate, and laminating the black matrix and the electrode pastes 600, 610, and 620 applied on the substrate 630. The shape of the dielectric 640 is shown.

The thickness (a) of the black matrix paste 620 applied on the substrate is preferably 1.5 to 2.5 탆, more preferably 1.7 to 2 탆. As described above, in the case of co-firing, the dielectric is laminated while the black matrix is not fired. Therefore, when the thickness of the applied black matrix paste is thick, the dielectric may not be filled at both ends where the paste and the substrate abut. As the empty space formed as described above, firing may generate bubbles.

Therefore, the thickness (a) of the black matrix paste 620 applied on the substrate is made thin in the above-described range, thereby absorbing external light and reducing reflection, and the purity and contrast of the substrate. In addition to performing a function to improve the, it is possible to reduce the generation of bubbles during firing.

It is preferable that the thickness b of the electrode pastes 600 and 610 apply | coated on a board | substrate is 7-9 micrometers, More preferably, it is 7.5-8.5 micrometers. As described above, in the case of co-firing, since the dielectric is laminated while the electrode is not fired, when the thickness of the applied electrode paste is thick, the dielectric may not be filled at both ends of the paste. Firing can cause bubbles to generate.

Therefore, by making the thickness b of the electrode pastes 600 and 610 applied on the substrate thin in the above-described range, bubbles are generated during firing in a range that does not significantly increase the resistance of the electrode beyond the resistance required for the panel. Can be reduced.

The thickness d from the substrate 630 of the dielectric 640 laminated on the substrate is preferably 65 to 82 mu m, more preferably 75 to 80 mu m. Further, the thickness c from the electrode pastes 600 and 610 of the dielectric 640 to be laminated is preferably 60 to 78 mu m, more preferably 70 to 78 mu m.

By thinning the thickness of the dielectric 640 laminated on the substrate in the above-described range, it is possible to reduce the generation of bubbles during the firing by reducing the formation of empty spaces before firing as well as acting as the dielectric.

FIG. 7 is a cross-sectional view illustrating an embodiment of a post-firing structure of a black matrix, an electrode, and a dielectric formed on a substrate, and the black matrix paste, electrode paste, and laminated dielectric applied on the substrate as shown in FIG. 6. The result of co-firing is shown. In the firing, the black matrix paste has a small width shrinkage but a large thickness shrinkage, and the electrode paste almost equally shrinks in thickness and width, and the shrinkage degree is higher in the black matrix paste than in the electrode paste.

The thickness e of the black matrix 720 formed on the substrate after firing is preferably 0.25 to 0.45 탆, more preferably 0.3 to 0.4 탆. It is preferable that the thickness f of the electrodes 700 and 710 formed on the board | substrate after baking is 3-5 micrometers, More preferably, it is 3.5-4.5 micrometers. The thickness h from the substrate 730 of the dielectric 740 after firing is preferably 25 to 35 µm, more preferably 28 to 32 µm. The thickness g from the electrodes 700 and 710 of the dielectric 740 after firing is preferably 20 to 30 m, more preferably 24 to 28 m.

By forming a thin thickness of the black matrix 720, the electrodes 700, 710 and the dielectric 740 in the range as described above, it is possible to reduce the generation of bubbles during firing to prevent damage to the panel. That is, as described with reference to FIG. 6, the thickness a of the black matrix paste 620 applied on the substrate, the thickness b of the electrode pastes 600 and 610 applied on the substrate, and the lamination on the substrate. By having the thickness of the dielectric 640 to be in the above range, it is possible to prevent the formation of voids to prevent the generation of bubbles during the firing, according to the black matrix 720, the electrodes 700, 710 and The thickness of the dielectric 740 will have a range as described above.

8A and 8B illustrate embodiments of shapes of a black matrix, an electrode, and a dielectric formed on a substrate through a sintering process. In FIG. 8A, the black matrix paste containing 6.8% by weight of glass frit and the electrode paste containing 6% by weight of glass frit are coated and fired. In the case of FIG. 8B, the black matrix containing 2.8% by weight of glass frit is illustrated. This is the case when the electrode paste containing 2.3 wt% of the paste and the glass frit is coated and fired.

As shown in FIG. 8A, when the glass frit content of the paste is large, bubbles are generated around the black matrix and the electrode formed on the substrate after firing. As shown in FIG. 8B, it can be seen that bubble generation is almost prevented when the content of the glass frit is reduced within the range described with reference to FIG. 5.

Although a preferred embodiment of the present invention has been described in detail above, those skilled in the art to which the present invention pertains can make various changes without departing from the spirit and scope of the invention as defined in the appended claims. It will be appreciated that modifications or variations may be made. Accordingly, modifications to future embodiments of the present invention will not depart from the technology of the present invention.

According to the present invention configured as described above, in manufacturing a plasma display panel by forming an electrode, a black matrix and a dielectric on a substrate, the panel manufacturing process can be simplified by co-firing the electrode, the black matrix and a dielectric on a substrate. By appropriately reducing the thickness of the dielectric, bubble generation can be reduced. In addition, the driving efficiency of the plasma display panel and the reliability of the device can be improved.

Claims (15)

In the method of forming an electrode and a dielectric on a substrate, Placing an electrode forming paste on the substrate; Laminating a dielectric on the substrate; And Co-firing the electrode forming paste and the dielectric on the substrate; And a thickness of the laminated dielectric material is 65 to 82 μm from the substrate. The method of claim 1, And a thickness of the laminated dielectric material is 75 to 80 μm from the substrate. The method of claim 1, The thickness of the laminated dielectric material is a plasma display panel manufacturing method, characterized in that from 60 to 78㎛ from the electrode forming paste. The method of claim 1, The thickness of the laminated dielectric material is a plasma display panel manufacturing method, characterized in that 70 to 78㎛ from the electrode forming paste. The method of claim 1, wherein the electrode forming paste Organic components; And An inorganic component comprising a glass frit and a conductive metal, The glass frit is a manufacturing method of the plasma display panel, characterized in that 1.5 to 4% by weight of the electrode forming paste. The method of claim 1, The thickness of the electrode forming paste located on the substrate is a method of manufacturing a plasma display panel, characterized in that 7 to 9㎛. The method of claim 1, Positioning a paste for forming a black matrix on the substrate; The firing step is A method of manufacturing a plasma display panel comprising simultaneously baking the electrode forming paste, the black matrix forming paste, and the dielectric on the substrate. The method of claim 7, wherein the black matrix forming paste Organic components; And Including an inorganic component including glass frit and cobalt oxide, The glass frit is a method of manufacturing a plasma display panel, characterized in that 1.5 to 4% by weight of the black matrix forming paste. The method of claim 7, wherein The thickness of the black matrix forming paste located on the substrate is 1.5 to 2.5㎛ manufacturing method of the plasma display panel. Upper substrate; A first electrode, a second electrode and a dielectric layer formed on the upper substrate; A lower substrate disposed to face the upper substrate; In the plasma display device comprising a third electrode formed on the lower substrate, The thickness of the dielectric layer is a plasma display device, characterized in that 25 to 35㎛ from the upper substrate. The method of claim 10, The thickness of the dielectric layer is a plasma display device, characterized in that 20 to 30㎛ from the electrode. The method of claim 10, At least one of the first and second electrodes Glass frit and silver (Ag), The glass frit is characterized in that the plasma display device 2.5 to 4% by weight of the electrode. The method of claim 10, At least one of the first and second electrodes has a thickness of 3 to 5㎛. The method of claim 10, Further comprising a black matrix formed on the upper substrate, And the black matrix comprises glass frit and cobalt oxide, wherein the glass frit is 15 to 25% by weight of the black matrix. The method of claim 14, The thickness of the black matrix is a plasma display device, characterized in that 0.25 to 0.45㎛.

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