KR20080048751A - Plasma display apparatus - Google Patents

Abstract

A plasma display device is provided to decrease a magnitude of an address voltage applied on an address electrode by forming a floating electrode in a barrier rib of a PDP(Plasma Display Panel). A plasma display device includes a PDP(Plasma Display Panel) having an upper substrate, plural first and second electrodes, a lower substrate(500), plural third electrodes(520), and a barrier rib(530). The first and second electrodes are formed on the upper substrate. The lower substrate is arranged to be opposed to the upper substrate. The third electrodes are formed on the lower substrate. The barrier rib is formed on the lower substrate to define discharge cells. The barrier rib includes first and second barrier rib layers, which are separated from each other in a vertical direction. A floating electrode is formed between the first and second barrier rib layers.

Description

Plasma display apparatus

1 is a perspective view showing an embodiment of a structure of a plasma display panel according to the present invention.

2 is a cross-sectional view illustrating an embodiment of an electrode arrangement of a plasma display panel.

FIG. 3 is a timing diagram illustrating an embodiment of a method of time-divisionally driving a plasma display panel by dividing one frame into a plurality of subfields.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel.

5 and 6 are cross-sectional views illustrating embodiments of a lower substrate structure of a plasma display panel according to the present invention.

7 is a view showing an embodiment of a method for manufacturing a lower substrate of the panel according to the present invention.

The present invention relates to a plasma display device, and more particularly, to a structure of a plasma display panel used in the device.

In general, a plasma display panel is a partition wall formed between an upper substrate and a lower substrate to form one unit cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because a thin and light configuration is possible.

An object of the present invention is to provide a plasma display device capable of improving the driving efficiency of the plasma display panel.

In the plasma display apparatus according to the present invention for solving the above technical problem, the partition wall partitioning the discharge cells of the plasma display panel includes a first partition layer and a second partition layer divided up and down, the first partition layer and A floating electrode is formed between the second partition wall layers.

Hereinafter, a plasma display device according to the present invention will be described in detail with reference to the accompanying drawings. 1 is a perspective view showing an embodiment of a plasma display panel according to the present invention.

As shown in FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrodes 11b and 12b. 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). . The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the exemplary embodiment of the present invention, the sustain electrode pairs 11 and 12 may not only have a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also the buses without the transparent electrodes 11a and 12a. Only the electrodes 11b and 12b may be configured. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11c to absorb external light generated outside the upper substrate 10 to reduce reflection. A black matrix (BM, 15) is arranged that functions to block and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the exemplary embodiment of the present invention is formed on the upper substrate 10, the first black matrix 15 and the transparent electrodes 11a and 12a formed at positions overlapping the partition wall 21. And the second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also referred to as black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, or may not be simultaneously formed and thus not physically connected. .

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are formed separately.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons.

In addition, the address electrode 22 is formed in a direction crossing the scan electrode 11 and the sustain electrode 12. In addition, the lower dielectric layer 23 and the partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, phosphor layers are formed on the surfaces of the lower dielectric layer 23 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape to physically distinguish the discharge cells, and prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. .

In an embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in one embodiment of the present invention, although the R, G and B discharge cells are shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

FIG. 2 illustrates an embodiment of an electrode arrangement of a plasma display panel, and a plurality of discharge cells constituting the plasma display panel are preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Ym are simultaneously scanned is possible. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down in the center portion of the panel.

3 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to an embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, a display data signal is applied to the address electrode X, and scan pulses corresponding to each scan electrode Y are sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to form wall charges in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. . For example, the plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel with respect to the divided subfield.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. A reset section for initializing the discharge cells of the entire screen using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells.

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set-down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), thereby eliminating discharge discharge in all the discharge cells. Generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, a negative scan signal scan is sequentially applied to the scan electrode, and at the same time, a positive data signal data is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. Meanwhile, a signal for maintaining a sustain voltage is applied to the sustain electrode during the set down period and the address period.

In the sustain period, a sustain pulse is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The driving waveforms shown in FIG. 4 are exemplary embodiments of signals for driving the plasma display panel according to the present invention, and the present invention is not limited to the waveforms shown in FIG. 4. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. May be authorized. In addition, the single sustain driving may be performed by applying the sustain signal to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge.

5 and 6 illustrate embodiments of the lower substrate structure of the plasma display panel according to the present invention in cross-sectional view, and it is preferable that a floating electrode is formed in a partition wall that partitions a discharge cell.

Referring to FIG. 5, an address electrode 520 and a dielectric layer 510 are formed on the lower substrate 500, and a partition 530 is formed on the dielectric layer 510.

As shown in FIG. 5, the partition wall 530 is divided into a first partition wall layer and a second partition wall layer that are positioned up and down, and a floating electrode 540 is formed between the first and second partition wall layers. The floating electrode 540 is floating without being connected to other driving circuits, and no voltage is applied.

When driving the panel, by trapping charges on the surface of the floating electrode 540, the magnitude of the address voltage applied to the address electrode 520 to select the discharge cell to be turned on can be reduced.

In consideration of the height of the barrier rib 530, the height h of the floating electrode 540 from the bottom of the barrier rib 530 is 10 to 125 μm in order to reduce the size of the address voltage to effectively reduce the panel driving power consumption. Is preferably.

In addition, the number of floating electrodes formed in the partition wall 530 may be two or more.

Referring to FIG. 6, a protective film 650 made of MgO may be formed between the barrier rib 630 and the phosphor layer 660. The MgO passivation layer 650 may protect the floating electrode 640 by preventing the floating electrode 640 from being exposed to the discharge space, and may reduce the address voltage by increasing the secondary electron emission coefficient.

In addition, by applying carbon nanotubes (CNTs) on the surface of the phosphor layer 660, field emission may be induced to improve driving efficiency of the panel.

Carbon nanotubes (CNTs) are small molecules of about 1 nm in diameter, in which long carbons are connected by hexagonal rings.

Carbon nanotubes become conductors and semiconductors depending on the diameter of the tube, and have various properties depending on the shape of the middle wall tube and the bundle.

7 illustrates an embodiment of a method of manufacturing a lower substrate of a panel according to the present invention.

Referring to FIG. 7, in step (a), the address electrode 710 and the dielectric layer 720 are formed on the lower substrate 700, and in the next step (b), the first partition wall layer 730 is formed on the dielectric layer 720. Dry after laminating or printing.

In step (c), after laminating or printing the floating electrode layer 740 on the first partition wall layer 730 and drying, and in the next step (d), the second partition wall layer 750 on the floating electrode layer 740. ) Is dried after laminating or printing.

In the step (e), the first and second barrier layers 730 and 750 and the floating electrode layer 740 are etched or the first and second barrier layers 730 and 750 are formed using the photosensitive paste. The development is performed to form the partition wall 760 and the floating electrode 770.

Thereafter, in step (f), after depositing the MgO protective film 770, the phosphor layer 780 is printed. As described above, carbon nanotubes (CNTs) may be coated on the surface of the phosphor layer 780.

Although a preferred embodiment of the present invention has been described in detail above, those skilled in the art to which the present invention pertains may make various changes without departing from the spirit and scope of the invention as defined in the appended claims. It will be appreciated that modifications or variations may be made. Accordingly, modifications to future embodiments of the present invention will not depart from the technology of the present invention.

According to the plasma display device according to the present invention configured as described above, by forming a floating electrode in the partition wall of the plasma display panel, an address applied to the address electrode to select the discharge cells to be turned on (turn on) The magnitude of the voltage can be reduced.

Claims (5)

Upper substrate; A plurality of first electrodes and second electrodes formed on the upper substrate; A lower substrate disposed to face the upper substrate; In the plasma display device comprising a plurality of third electrodes formed on the lower substrate and a partition formed on the lower substrate to partition the discharge cells, The partition wall includes a first partition layer and a second partition layer divided up and down, and a floating electrode is formed between the first partition layer and the second partition layer. The method of claim 1, Plasma display device, characterized in that the Mgo layer is formed on the outer surface of the partition wall. The method of claim 2, wherein the Mgo layer And a plasma display device positioned between the partition wall and the phosphor layer. The method of claim 1, wherein the floating electrode Plasma display device, characterized in that located at 10 to 125㎛ height from the bottom of the partition wall. The method of claim 1, A phosphor layer formed on the lower substrate, Plasma display device, characterized in that the carbon nanotube (CNT) is coated on the phosphor layer.

Images