KR100853168B1 - Plasma display apparatus - Google Patents

Abstract

The present invention relates to a plasma display device. The apparatus is formed by combining an upper substrate and a lower substrate, and includes a plurality of discharge cells partitioned by partition walls formed on the lower substrate, wherein the first electrode and the second electrode formed on the upper substrate are the discharges. The distance from the center of the cell is different from each other.

According to the plasma display device according to the present invention, the positions of the two electrodes formed on the upper substrate of the panel are formed asymmetrically with respect to the center of the panel so that the shadow formed on the lower substrate as the external light is incident is not on the partition wall. By being located at the bottom surface, the reflectivity of the panel can be reduced to improve the contrast ratio.

Description

Plasma display apparatus

1 is a perspective view illustrating an embodiment of a structure of a plasma display panel.

2 is a cross-sectional view illustrating an embodiment of an electrode arrangement of a plasma display panel.

FIG. 3 is a timing diagram illustrating an embodiment of a method of time-divisionally driving a plasma display panel by dividing one frame into a plurality of subfields.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel.

5 and 6 illustrate embodiments of an electrode arrangement structure formed on an upper substrate of a plasma display panel according to the present invention.

7 to 8 are cross-sectional views illustrating embodiments of a plasma display panel structure in which an upper substrate and a lower substrate are coupled according to the present invention.

The present invention relates to a plasma display device, and more particularly, to a structure of a plasma display panel used in the device.

In general, a plasma display panel is a partition wall formed between an upper substrate and a lower substrate to form one unit cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because a thin and light configuration is possible.

When external light such as indoor lighting is incident on the plasma display panel as described above, the panel reflectance is reduced by a plurality of electrodes formed on the panel, and the brightness and contrast ratio of the panel is lowered.

SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display apparatus having a structure capable of improving the reflectance and the contrast ratio of a panel.

The plasma display device according to the present invention for solving the above technical problem is formed by combining an upper substrate and a lower substrate and comprises a plurality of discharge cells partitioned by a partition wall formed on the lower substrate, the upper The first electrode and the second electrode formed on the substrate are characterized in that the distance from the center of the discharge cell is different from each other.

Another plasma display device according to the present invention for solving the above technical problem is characterized in that the distance from the partition wall adjacent to the first electrode is different from the distance from the partition wall adjacent to the second electrode.

In another plasma display device according to the present invention for solving the above technical problem, the first electrode includes a first transparent electrode and a first bus electrode, the second electrode is a second transparent electrode and a second bus And an electrode, wherein the distance from the center of the first transparent electrode to the center of the first bus electrode is different from the distance from the center of the second transparent electrode to the center of the second bus electrode.

Hereinafter, a plasma display device according to the present invention will be described in detail with reference to the accompanying drawings. 1 is a perspective view showing an embodiment of a plasma display panel according to the present invention.

As shown in FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrode 11b. , 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). have. The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the exemplary embodiment of the present invention, the sustain electrode pairs 11 and 12 may not only have a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also the buses without the transparent electrodes 11a and 12a. Only the electrodes 11b and 12b may be configured. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11c to absorb external light generated outside the upper substrate 10 to reduce reflection. A black matrix (BM, 15) is arranged that functions to block and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the exemplary embodiment of the present invention is formed on the upper substrate 10, the first black matrix 15 and the transparent electrodes 11a and 12a formed at positions overlapping the partition wall 21. And the second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also referred to as black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, or may not be simultaneously formed to be physically connected. All.

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are formed separately.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons.

In addition, the address electrode 22 is formed in a direction crossing the scan electrode 11 and the sustain electrode 12. In addition, the lower dielectric layer 23 and the partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, phosphor layers are formed on the surfaces of the lower dielectric layer 23 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape, and physically distinguishes discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells.

In an embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in one embodiment of the present invention, although the R, G and B discharge cells are shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

FIG. 2 illustrates an embodiment of an electrode arrangement of a plasma display panel, and a plurality of discharge cells constituting the plasma display panel are preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Ym are simultaneously scanned is possible. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down in the center portion of the panel.

3 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to an embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, a display data signal is applied to the address electrode X, and scan pulses corresponding to each scan electrode Y are sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to form wall charges in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. . For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel with respect to the divided subfield.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. A reset section for initializing the discharge cells of the entire screen using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells.

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set-down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), thereby eliminating discharge discharge in all the discharge cells. Generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, a negative scan signal scan is sequentially applied to the scan electrode, and at the same time, a positive data signal data is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. Meanwhile, a signal for maintaining a sustain voltage is applied to the sustain electrode during the set down period and the address period.

In the sustain period, a sustain pulse is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The driving waveforms shown in FIG. 4 are exemplary embodiments of signals for driving the plasma display panel according to the present invention, and the present invention is not limited to the waveforms shown in FIG. 4. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. May be authorized. In addition, the single sustain driving may be performed by applying the sustain signal to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge.

5 and 6 illustrate embodiments of the electrode arrangement structure formed on the upper substrate of the plasma display panel according to the present invention, and the upper substrate electrode arrangement with respect to one discharge cell among a plurality of discharge cells constituting the panel. The structure is shown briefly.

Referring to FIG. 5, the discharge cells are partitioned and surrounded by two horizontal partitions 500 and 510 and two vertical partitions 520 and 530, and overlap the discharge spaces or horizontal partitions 500 and 510 in the discharge cells. First and second electrodes 540 and 550, for example, a scan electrode and a sustain electrode, are formed on the upper substrate.

The first and second electrodes 540 and 550 illustrated in FIG. 5 are bus electrodes and have a darker color than the dielectric formed on the upper substrate. It is an opaque electrode that is not made.

As shown in FIG. 5, the first and second electrodes 540 and 550 are preferably formed in an asymmetrical position with respect to the center 560 of the discharge cell. That is, the distance x3 from the center 560 of the discharge cell to the first electrode 540 and the distance x4 from the center 560 of the discharge cell to the first electrode 540 may be different from each other. Alternatively, the distance x1 from the first electrode 540 to the partition wall 500 adjacent thereto and the distance x2 from the second electrode 550 to the partition wall 510 adjacent thereto may be different from each other.

Assuming that a direction in which external light sources such as indoor lighting are located is defined as an upper side of the panel, and assuming that the first electrode 540 is formed above the second electrode 550, the center of the discharge cell as shown in FIG. 5. By positioning the second electrode 550 closer to the first electrode 540 from the 560, the shadow formed by the external light incident on the panel is blocked by the first and second electrodes 540 and 550. 510 may be sufficiently positioned on the bottom surface of the lower substrate. Thereby, the light reflectance of the panel can be reduced, and the clear contrast ratio can be improved.

As shown in FIG. 5, the first and second electrodes 540 and 550 formed on the upper substrate of the panel may be made of only an opaque metal bus electrode, unlike the electrode structure shown in FIG. 1. The first and second electrodes 540 and 550 are formed using silver (Ag), copper (Cu), or chromium (Cr), which is a material of a conventional bus electrode, without using ITO, which is a material of a conventional transparent electrode. As a result, the manufacturing cost of the plasma display panel can be lowered.

Referring to FIG. 6, a pair of sustain electrodes formed on an upper substrate, for example, a scan electrode and a sustain electrode, may include a first transparent electrode 600, a first bus electrode 620, and a second transparent electrode 610 each formed of ITO. And a second bus electrode 630 may be stacked.

As shown in FIG. 6, the position of the first bus electrode 610 formed on the first transparent electrode 600 is the position of the second bus electrode 630 formed on the second transparent electrode 620. Can be different. That is, the distance y1 from the end of the first transparent electrode 600 to the first bus electrode 610 and the distance y2 from the end of the second transparent electrode 620 to the first bus electrode 630 are They are different from each other, or the distance y3 from the center of the first transparent electrode 600 to the center of the first bus electrode 610 and the center of the first bus electrode 630 from the center of the second transparent electrode 620. The distances y4 may be different from each other.

Assuming that a direction in which external light sources such as indoor lighting are located is defined as an upper side of the panel, and assuming that the first bus electrode 610 is formed above the second bus electrode 630, as shown in FIG. By forming the bus electrode 630 adjacent to the upper end of the second transparent electrode 620, the shadow formed as the external light incident on the panel is blocked by the first and second bus electrodes 610 and 630 is lowered. It can be sufficiently positioned on the bottom surface of the substrate. Thereby, the light reflectance of the panel can be reduced, and the clear contrast ratio can be improved.

In order to maximize the contrast ratio of the panel, the upper end of the second bus electrode 630 may be formed at the upper end of the second transparent electrode 620.

7 to 8 illustrate cross-sectional views of embodiments of a plasma display panel structure in which an upper substrate and a lower substrate are coupled according to the present invention.

Referring to FIG. 7, the upper substrate may include a top glass 700, a dielectric layer 705, first and second transparent electrodes 710 and 720, and first and second bus electrodes 715 and 725. The lower substrate may include a lower plate glass 730, an address electrode 735, a dielectric layer 745, barrier ribs 750 and 755, and a phosphor layer 745.

As shown in FIG. 7, external light is incident on the panel from a light source such as indoor lighting, and shadows 765. 770 on the lower substrate by the first and second bus electrodes 715 and 725 which are hardly transmitted. Is formed.

As described above, when formed on the phosphor layer 760 of the bottom surface of the lower substrate than those formed on the yarn partitions 750 and 755 of the shadows 765 and 770, the light reflectance of the panel is reduced, The brightness contrast ratio can be improved.

Assuming that the incidence angle θ of the external light is 30 to 60 °, the first bus electrode 715 formed on the upper side in the direction in which the external light is incident is formed on the first bus electrode 715 even if it is far from the center of the discharge cell. The shadow formed by the shadow may be formed on the phosphor layer 760 on the bottom surface of the lower substrate. In contrast, since the first bus electrode 715 is located closer to the center of the discharge cell, the opening ratio of the panel may be reduced to block visible light emitted from the panel. Therefore, the first bus electrode 715 is located above the external light. ) Is located far from the center of the discharge cell to secure the aperture ratio of the panel, and the lower second bus electrode 725 is preferably located close to the center of the discharge cell to improve the contrast ratio of the panel.

Referring to FIG. 8, the distance a1 from the center of the discharge cell to the first bus electrode 715 located in the upper direction in which the external light is incident is discharged in order to secure the aperture ratio of the panel and to improve the contrast ratio. It is preferable to be larger than the distance a2 from the cell center to the second bus electrode 725 located below. The distance b1 from the center of the first bus electrode 715 positioned above to the center of the first transparent electrode 710 is shown. In FIG. 8, the first bus electrode 715 is the first transparent electrode 710. It is preferable that b1 is 0 at the center of and smaller than the distance b2 from the center of the second bus electrode 725 positioned below to the second transparent electrode 720. In addition, the distance c2 from the first bus electrode 715 located on the upper side to the partition wall 750 adjacent thereto is from the second bus electrode 725 located on the lower side to the partition wall 755 adjacent thereto. Smaller than

Referring to FIG. 9, assuming a direction in which external light is incident on the upper side, a position for improving the contrast contrast ratio of the panel of the bus electrode formed on the lower side of the two bus electrodes formed on the upper substrate will be described in more detail. .

Assuming that the incident angle θ of the external light is 45 degrees, the shadow 845 formed by the second bus electrode 815 is not formed on the partition wall 835, and all of them are on the phosphor layer 840 on the bottom surface of the lower substrate. In order to be formed in Equation 1, the following Equation 1 must be satisfied.

e ≥ g

In Equation 1, since the thickness of the second bus electrode 815 is very small compared to the distance g from the lower substrate to the second transparent electrode 810, g is the second bus electrode 815 from the lower substrate. Can be approximated by a distance d).

Therefore, when the distance e from the second bus electrode 815 to the adjacent partition wall 835 is greater than the distance d from the lower substrate to the second bus electrode 815, the second bus electrode 815 All of the shadows 845 formed may be formed on the phosphor layer 840 on the bottom surface of the lower substrate.

In Equation 1, e and g may be expressed as Equation 2 below.

e = l-i

g = h + f-d2

In the plasma display panel according to the present invention, since f is greater than d2, g may be expressed as Equation 3 below.

g = h + f-d2 ≥ h

Using Equations 1 and 3, when the distance e from the second bus electrode 815 to the adjacent partition wall 835 is greater than the height h of the partition wall 835, the second bus electrode All of the shadows 845 formed by 815 may be formed on the phosphor layer 840 on the bottom surface of the lower substrate.

In Equation 2, i may be approximated to 1/2 of the bottom width w of the partition wall, and as described above, g is the distance d from the lower substrate to the second bus electrode 815. Since the following equation 4 is satisfied, all of the shadows 845 formed by the second bus electrode 815 may be formed on the phosphor layer 840 on the bottom surface of the lower substrate.

l-w / 2 ≥ d

In addition, by using Equations 1 and 2, when the following Equation 5 is satisfied, all of the shadows 845 formed by the second bus electrode 815 are phosphor layers 840 on the bottom surface of the lower substrate. It can be formed on.

l ≥ h + f + i-d2

As described above, since i is approximated to w / 2 and the thickness of the second transparent electrode 810 is smaller than the thickness d1 of the dielectric layer 805, when f is approximated to d1, 5 may be expressed as Equation 6 below.

l-w / 2 ≥ h + d1-d2

Therefore, when the above Equation 6 is satisfied, all of the shadows 845 formed by the second bus electrode 815 are formed on the phosphor layer 840 on the bottom surface of the lower substrate, thereby improving the contrast ratio of the panel. have.

Although a preferred embodiment of the present invention has been described in detail above, those skilled in the art to which the present invention pertains can make various changes without departing from the spirit and scope of the invention as defined in the appended claims. It will be appreciated that modifications or variations may be made. Accordingly, modifications to future embodiments of the present invention will not depart from the technology of the present invention.

According to the plasma display device according to the present invention configured as described above, by forming the position of the two electrodes formed on the upper substrate of the panel asymmetrically with respect to the center of the panel, formed on the lower substrate as the external light is incident By allowing the shadow to be located on the bottom surface rather than on the partition wall, the reflectivity of the panel can be reduced to improve the contrast ratio.

Claims (16)

delete delete delete delete delete A plasma display apparatus comprising a plurality of discharge cells formed by combining an upper substrate and a lower substrate and partitioned by partition walls formed on the lower substrate. A first electrode and a second electrode formed on the upper substrate, and the partition wall includes first and second horizontal partition walls formed in parallel with the first and second electrodes, and among the first and second horizontal partition walls. Further adjacent to the first electrode is a first transverse bulkhead, The distance between the second electrode and the second horizontal partition wall is greater than the distance between the first electrode and the first horizontal partition wall, The distance l from the second electrode to the center of the upper end of the second horizontal partition wall, the bottom width w of the partition wall, and the distance d from the second electrode to the lower substrate satisfy the following equation. Plasma display device characterized in that. l-w / 2 ≥ d delete The method of claim 6, A dielectric layer formed on the upper substrate, And the first and second electrodes are darker in color than the dielectric layer. The method of claim 6, And a distance between the second electrode and the second horizontal partition wall is greater than a distance between the second electrode and the lower substrate. The method of claim 6, And a distance between the second electrode and the second horizontal partition wall is greater than a height of the partition wall. delete The method of claim 6, A dielectric layer formed on the upper substrate; And a phosphor layer formed on the lower substrate, The distance l from the second electrode to the center of the upper end of the second horizontal partition wall, the height h of the partition wall, the thickness d1 of the dielectric layer, and the thickness d2 of the phosphor layer are expressed by the following equation. Plasma display device, characterized in that satisfying. l-w / 2 ≥ h + d1-d2 delete delete delete delete

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