KR100762248B1 - Plasma display panel - Google Patents

Abstract

A plasma display panel is provided to increase brightness and to minimize interference between adjacent cells by adjusting a width of a lateral barrier rib and a width of a longitudinal barrier rib. A plurality of longitudinal barrier ribs(21b) are formed across a first direction on a lower substrate(20). A plurality of lateral barrier ribs are formed on the lower substrate in the first direction. An upper width of each of the lateral barrier ribs is equal to or less than an upper width of each of the longitudinal barrier ribs. The upper width of each of the lateral barrier ribs is 55 to 100 micrometers. An upper substrate(10) is disposed opposite to the lower substrate. A plurality of sustain electrodes are formed on the upper substrate and are formed with transparent electrodes(11a,12a) and bus electrodes(11b,12b). One of the transparent electrode and the bus electrode is not overlapped with an upper part of the lateral barrier rib.

Description

 Plasma Display Panel

1 is a diagram illustrating an embodiment of an electrode arrangement of a plasma display panel;

FIG. 2 is a timing diagram illustrating an embodiment of a method of time-division driving by dividing one frame into a plurality of subfields; FIG.

FIG. 3 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel for the divided subfields; FIG.

4 is a perspective view of an embodiment of a plasma display panel according to the present invention;

5 is a diagram illustrating an embodiment of a panel in which horizontal and vertical bulkheads are formed.

6 is a view showing an embodiment of the upper width of the transverse bulkhead,

7 is a cross-sectional view of a panel cut in a direction crossing the sustain electrode according to the present invention.

<Explanation of symbols on main parts of the drawings>

10: upper substrate 11: scanning electrode

12: sustain electrode 11, 12: sustain electrode

11a, 12a: transparent electrode 11b, 12b: bus electrode

11c and 12c: Black (electrode) layer 15: Black matrix

20: lower substrate 21: partition wall

21a: horizontal bulkhead 21b: vertical bulkhead

The present invention relates to a plasma display panel, and more particularly, to a width of a partition wall in a structure in which a black matrix and an electrode are separated.

In general, a plasma display device is a device that displays an image including a character or a graphic by applying a predetermined voltage to electrodes installed in a discharge space and causing a discharge, and the plasma generated during gas discharge excites a phosphor. In addition, it is easy to enlarge, lighten, and thinner, to provide a wide viewing angle up, down, left and right, and to realize full color and high latitude. In this case, the plasma display apparatus includes a plasma display panel in which an image is realized through discharge and a driving apparatus for driving the panel.

The plasma display panel includes an upper substrate on which a plurality of sustain electrodes composed of a transparent electrode and a bus electrode formed on the transparent electrode are arranged, and a plurality of discharge spaces, that is, partition walls for forming cells, are arranged and intersect the sustain electrode. It includes a lower substrate on which the electrode is arranged.

The sustain electrode is divided into a bus electrode and a transparent electrode. The bus electrode maximizes the distance between the bus electrodes in the cell in order to increase the efficiency during discharge, which causes the bus electrode to be adjacent to the partition wall. At this time, the bus electrode and the partition wall function as a capacitor, and the panel capacitance increases due to voltage accumulation. In addition, there is a problem that the consumption of reactive current is increased due to the increase of the panel capacitance.

The present invention has been made to solve the above problems of the prior art, the partition and the black matrix to separate the bus electrode and the black matrix, to reduce the panel capacitance between the upper substrate and the lower substrate and to reduce the interference between adjacent cells The purpose is to set the proper width and ratio of.

Plasma display panel according to the present invention for solving the above problems is a plurality of vertical partition wall formed in the direction crossing the first direction on the lower substrate, the lower substrate is formed in the first direction, the upper width of the vertical partition wall A plurality of horizontal barrier ribs having an upper width of 55 μm to 100 μm, an upper substrate disposed to face the lower substrate, and an upper substrate, wherein at least one of the transparent electrode and the bus electrode does not overlap with an upper portion of the horizontal barrier rib. And a plurality of sustain electrodes including the transparent electrode and the bus electrode.

In addition, the plasma display panel according to the present invention is formed on the upper substrate, the first black matrix formed at a position overlapping at least one of the upper portion of the horizontal partition and the upper portion of the vertical partition wall, the transparent electrode and the bus electrode It further comprises a second black matrix formed therebetween.

The upper substrate may include a horizontal BM, which is a first black matrix formed at a position overlapping with an upper portion of the horizontal partition wall, and the width of the horizontal BM is 80 μm to 140 μm.

In addition, the upper width of the horizontal bulkhead is 55㎛ to 100㎛, the width of the horizontal bulkhead is characterized in that the upper width and the lower width is formed in a ratio of 1: 1 to 1: 3.

The upper width of the horizontal bulkhead is formed in a ratio of 1: 0.8 to 1: 2.56 with the width of the horizontal BM, and the upper width of the horizontal bulkhead is in a ratio of 1: 1 to 1.9: 1 with the upper width of the vertical bulkhead. It is characterized by being formed.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 illustrates an embodiment of an electrode arrangement of a plasma display panel. As shown in FIG. 1, the plasma display panel implements an image through discharge at intersections between the scan electrode, the sustain electrode, and the data electrode. In this case, the plurality of discharge cells constituting the plasma display panel is preferably arranged in a matrix form.

The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym are sequentially driven, and the sustain electrode lines Z1 to Zm are commonly driven. The address electrode lines X1 to Xn are divided into odd-numbered lines and even-numbered lines to drive.

Since the electrode arrangement shown in FIG. 1 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 1. For example, a dual scan method in which two scan electrode lines of the scan electrode lines Y1 to Ym are driven at the same time is also possible. In the dual scan, the address electrode lines X1 to Xn are divided up and down at the center. It is characterized by being formed. In this case, the distance between the upper and lower address electrode lines (X1 to Xn) is preferably formed in the range of 70 ~ 200㎛ in order to prevent problems such as a minute step on the screen by separating the electrode line up and down.

FIG. 2 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

In each address section A1, ..., A8, a data signal is applied to the address electrode X, and a scan pulse corresponding to each scan electrode Y is sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to generate wall charges generated in the address periods A1, ..., A8. This causes sustain discharge in the discharge cell.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. For example, in order to obtain luminance of 133 gray levels, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 2, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. . For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

FIG. 3 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel for one divided subfield.

The subfield forms a wall charge distribution formed by a prereset section and a prereset section for forming the positive wall charges on the scan electrodes Y and the negative wall charges on the sustain electrodes Z. A reset period for initializing the discharge cells of the entire screen by using, an address period for selecting the discharge cells and a sustain period for maintaining the discharge of the selected discharge cells.

The reset section is composed of a setup section and a setdown section. In the setup section, a voltage rising waveform in which voltage gradually increases to all scan electrodes is simultaneously applied to generate fine discharge in all discharge cells. Thus, wall charges are generated. In the set-down period, a voltage drop waveform in which the voltage falls at a positive voltage lower than the peak voltage of the voltage rise waveform is simultaneously applied to all the scan electrodes (Y), so that erase discharge occurs in all the discharge cells. The unwanted charges are eliminated among the wall charges and the space charges.

In the address period, a negative scan signal scan is sequentially applied to the scan electrode, and at the same time, a positive data signal data is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. On the other hand, a signal for maintaining a sustain voltage Vs is applied to the sustain electrode during the set down period and the address period.

In the sustain period, a sustain pulse is alternately applied to the scan electrode and the sustain electrode to generate a discharge between the scan electrode and the sustain electrode.

The driving waveforms shown in FIG. 3 are examples of signals for driving the plasma display panel according to the present invention, and the present invention is not limited to the waveforms shown in FIG. 3. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 3 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. It may be. In addition, a single sustain drive in which a sustain signal is applied to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge is also possible.

The panel supplied with such a driving waveform is configured as shown in FIG. 4 below.

4 is a perspective view showing an embodiment of a plasma display panel according to the present invention. As shown in FIG. 4, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

Each of the sustain electrode pairs 11 and 12 includes transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), respectively, and the bus electrodes 11b. , 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). have. The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

In addition, the upper substrate 10 has a black matrix function that absorbs external light generated from the outside to reduce reflection and improves the purity and contrast of the upper substrate 10. BM) is arranged.

In this case, the black matrix formed on the upper substrate 10 is disposed between the first black matrix 15 formed at a position overlapping the partition wall 21, the transparent electrodes 11a and 12a and the bus electrodes 11b and 12b. 2nd black matrices 11c and 12c formed. In this case, the black matrix formed by separating the first and second black matrices 15, 11c, and 12c is defined as a separate type BM, and the second black matrices 11c and 12c are formed by forming a layer between the electrodes. It is also called black layer or black electrode layer.

The upper dielectric layer 14 and the passivation layer 15 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side in the first direction. In the upper dielectric layer 14, charged particles in which gas discharge ionization gas (plasma) is generated are accumulated. The protective film 15 protects the upper dielectric layer 14 from sputtering of charged particles generated during gas discharge, and increases the emission efficiency of secondary electrons. As the protective film 15, magnesium oxide (MgO) is usually used.

In this case, the address electrode 22 is formed on the lower substrate 20 in a direction crossing the first direction of the scan electrode 11 and the sustain electrode 12. In addition, the lower dielectric layer 24 and the partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed, and the phosphor layer 23 is formed on the surfaces of the lower dielectric layer 24 and the partition wall 21. do.

The partition 21 has a horizontal partition 21b formed in a first direction of the sustain electrodes 11 and 12 and a vertical partition 21a formed in a direction crossing the first direction to form a closed shape to physically discharge the discharge cell. It distinguishes and prevents ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

In addition, the phosphor layer 23 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

Since the structure shown in FIG. 4 is only an embodiment of the structure of the plasma panel according to the present invention, the present invention is not limited to the structure of the plasma display panel shown in FIG. 4. For example, the plasma display panel according to the present invention may have an ITO-less structure in which each of the sustain electrode pairs 11 and 12 does not include the transparent electrodes 11a and 12a made of ITO but includes only the bus electrodes 11b and 12b. In addition, each of the sustain electrode pairs 11 and 12 may include two or more electrode lines, and a structure may further include other electrodes.

In the plasma display panel having such a structure, the partition wall will be described in detail with reference to FIGS. 5 and 6.

5 is a diagram illustrating an embodiment of a panel in which horizontal and vertical partition walls are formed.

As shown in FIG. 5, the cell is surrounded by a horizontal bulkhead and a vertical bulkhead, and a portion where the upper substrate and the bulkhead abuts is the upper part of the partition wall, and the width of the upper part of the partition wall is the upper width (a) and the vertical partition wall of the horizontal partition wall, respectively. It is referred to as the upper width (d) of.

In this case, an appropriate ratio between the upper width a of the horizontal bulkhead and the upper width d of the vertical bulkhead is proposed to increase discharge efficiency between adjacent cells and reduce interference.

6A and 6B show an embodiment of the upper width of the transverse bulkhead.

As shown in FIG. 6A, it can be seen that the panel capacitance suddenly increases when the upper width a of the horizontal partition wall is greater than or equal to 100 μm, and the panel capacitance value decreases when less than or equal to 100 μm. In addition, as shown in FIG. 6B, the luminance suddenly increases when the upper width a of the horizontal partition wall is 120 μm or less, and it can be seen that the luminance value is stably high when it is less than 100 μm.

In this case, the narrower the upper width (a) of the transverse bulkhead, the more the panel capacitance decreases and the brightness is increased.However, the upper width (a) of the horizontal bulkhead, which can be manufactured and tested at present, is 40 μm. And experimentation is impossible.

That is, in the exemplary embodiment of the present invention, an appropriate range of the upper width a of the horizontal bulkhead where the panel capacitance is reduced and the brightness is increased is 40 μm ≦ a ≦ 100 μm. It is noted that the lower limit of the upper width (a) can be as small as 40 mu m or less. In the embodiment of the present invention, the upper width (a) of the transverse bulkhead is described as more than 40㎛, which is considering the tolerances and yield of the panel manufacturing, considering the future process improvement, etc., is not limited to 40㎛, 40㎛ The following may also be possible. On the other hand, the upper width (a) of the more preferable horizontal bulkhead according to the embodiment of the present invention is 55㎛ to 100㎛. This is the case considering the reliability of the yield or tolerance of panel production.

In addition, the upper width (d) of the vertical bulkhead is formed more than the upper width (a) of the horizontal bulkhead, the upper width (d) of the vertical bulkhead is 1: 1 to 1: 1.9 of the upper width (a) of the horizontal bulkhead. It is preferable that it is a ratio. At this time, the optimum ratio of the upper width (d) of the vertical bulkhead and the upper width (a) of the horizontal bulkhead is 55 μm and 55 μm, respectively.

Panel capacitance is generated between the partition wall 21 and the bus electrodes 11b and 12b. The panel capacitance generated at this time is the horizontal partition wall 21b and the bus electrode formed in the same direction as the first direction in which the bus electrodes 11b and 12b are formed. The value changes with distance from (11b, 12b).

FIG. 7A illustrates a cross section of a panel cut in a direction crossing the sustain electrode according to the present invention, and FIG. 7B is a simplified view of FIG. 7A.

As shown in FIGS. 7A and 7B, the widths of the horizontal bulkheads 21b do not coincide with the widths of the upper and lower parts, and the upper width a of the horizontal bulkheads and the lower widths of the horizontal bulkheads to increase the discharge efficiency during discharge in the cell. The ratio of b) is preferably 1: 1 to 1: 3. In this case, the lower width refers to the width of the portion formed in contact with the lower dielectric layer 24.

In addition, since the horizontal partition wall 21b and the vertical partition wall 21a are formed at an appropriate ratio, it is possible to reduce the panel capacitance due to the area of the horizontal partition wall 21b.

Among the first black matrices 15 formed at a position overlapping with at least one of the upper part of the horizontal partition wall 21b and the vertical partition wall 21a of the upper substrate, the first black matrix overlapping the upper part of the horizontal partition wall is formed by a horizontal BM ( 15a).

At this time, the horizontal BM 15a improves the contrast, and the length of the width of the preferred horizontal BM 15a for smooth light emission during discharge is 80 μm to 140 μm. Comparing this with the upper width (a) of the transverse bulkhead of Figure 6, it can be seen that the upper width (a) and the horizontal BM (15a) of the transverse bulkhead is a ratio of 1: 0.8 to 1: 2.5.

As described above, the plasma display panel according to the present invention has been described with reference to the illustrated drawings, but the present invention is not limited by the embodiments and the drawings disclosed herein, and may be applied within the scope of the technical idea.

The plasma display panel according to the present invention configured as described above has an effect of increasing contrast as the first black matrix and the second black matrix are formed in a separate BM structure. In addition, by adjusting the upper width of the horizontal bulkhead and the lower width of the horizontal bulkhead and the width of the vertical bulkhead according to the upper width of the horizontal bulkhead, the emission of light due to the discharge is smoothed, the brightness is increased and the interference between adjacent cells is minimized. It can work. In addition, there is an effect that the reactive current is reduced by lowering the panel capacitance caused by the area of the transverse bulkhead. As a result, the address time to which the scan pulse is applied is reduced, so that the sustain period during which the image is displayed can be secured longer.

Claims (9)

A plurality of vertical partition walls formed on the lower substrate in a direction crossing the first direction; A plurality of horizontal bulkheads formed on the lower substrate in the first direction and having an upper width less than an upper width of the vertical bulkhead and having a thickness of 55 μm to 100 μm; An upper substrate facing the lower substrate; And And a plurality of sustain electrodes formed on the upper substrate, wherein at least one of the transparent electrodes and the bus electrodes comprises the transparent electrodes and the bus electrodes that do not overlap the upper portion of the horizontal partition wall. delete The method of claim 1, A first black matrix formed on the upper substrate and formed at a position overlapping at least one of an upper portion of the horizontal barrier rib and an upper portion of the vertical barrier rib; And And a second black matrix formed between the transparent electrode and the bus electrode. The method of claim 3, wherein And the upper substrate further comprises a horizontal black matrix which is a first black matrix formed at a position overlapping an upper portion of the horizontal partition wall. The method of claim 4, wherein The width of the horizontal black matrix is a plasma display panel, characterized in that 80㎛ to 140㎛. delete The method of claim 1, The horizontal partition wall is a plasma display panel, characterized in that the upper width and the lower width is formed in a ratio of 1: 1 to 1: 3. The method according to any one of claims 4 to 5, And an upper width of the horizontal barrier rib is formed in a ratio of 1: 0.8 to 1: 2.56 to the width of the horizontal black matrix. The method of claim 1, And an upper width of the horizontal partition wall is formed in a ratio of 1: 1 to 1.9: 1 with an upper width of the vertical partition wall.

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