KR20070083001A - Driving apparatus and liquid crystal display comprising the same - Google Patents

Abstract

A driving apparatus and an LCD(Liquid Crystal Display) device having the same are provided to eliminate a horizontal pattern noise by stabilizing an output voltage of a driving voltage generator. A driving apparatus includes a driving voltage generator(200) and a signal controller(600). The driving voltage generator generates plural driving voltages for driving a liquid crystal panel(100). The signal controller turns on the last gate line of the liquid crystal panel during a non-activation period of a data enable signal and stabilizes an output voltage from the driving voltage generator based on the turn-on of the last gate line. The driving apparatus further includes a memory(700) for storing turn-on information of the gate line.

Description

Driving apparatus and liquid crystal display including the same {Driving apparatus and liquid crystal display comprising the same}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a diagram illustrating an interior of the memory unit of FIG. 1.

3 is a diagram illustrating turn on information of a last gate line in a memory unit according to an embodiment of the present invention.

4 is a waveform diagram illustrating a gray voltage output in an inactive period of a data enable signal according to an embodiment of the present invention.

5 is a waveform diagram illustrating a gray voltage output in an inactive section of a data enable signal according to another exemplary embodiment of the present invention.

6 is a waveform diagram illustrating a gray voltage output in an inactive section of a data enable signal according to another exemplary embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

100: liquid crystal panel 200: drive voltage generator

300: gate driver 400: gray voltage generator

500: data driver 600: signal controller

700: memory

The present invention relates to a driving device and a liquid crystal display including the same. More particularly, the present invention relates to a driving device capable of improving distortion of the gray scale voltage and a liquid crystal display including the same.

In general, a liquid crystal display (Liquid Crystal Display) is a flat panel display device that displays an image using a liquid crystal (Liquid Crystal), is thinner and lighter than other display devices, has the advantage of low power consumption and low driving voltage There is this.

In a liquid crystal display device, a liquid crystal layer is interposed between a color filter display panel on which a reference electrode and a color filter are formed, and a thin film transistor substrate on which a thin film transistor and a pixel electrode are formed, and different potentials are applied to the pixel electrode and the reference electrode. By forming an electric field to change the arrangement of the liquid crystal molecules, and through this to control the light transmittance to represent the image.

The driving circuit of the liquid crystal display includes a signal controller, a driving voltage generator, a gate driver, and a data driver.

The signal controller receives an image signal provided from the outside, converts a timing format according to liquid crystal panel conditions, and generates gate and data control signals.

The gate driver receives a gate control signal transmitted from the signal controller and applies a voltage to the gate line.

The data driver converts an image signal transmitted from the signal controller into an analog signal and applies a voltage to each data line of the liquid crystal panel.

The driving voltage generation unit uses various voltages used in the liquid crystal module, for example, the driving voltage AVdd, the gate on voltage Von, the gate off voltage Voff, and the reference using an input voltage Vin provided from an external system. Generate the voltage Vref. Here, the driving voltage AVdd is a supply voltage of the data driver, and the reference voltage Vref is a voltage required for the digital / analog converter of the data driver, and the gate on voltage Von and the gate off voltage. Voff is a voltage for turning on and off the thin film transistor for driving the liquid crystal panel.

When the data enable (DE) signal of the input signal of the signal controller is converted from the inactive period to the active period, distortion of the gray voltage occurs, which is represented by the DC / DC converter of the driving voltage generator. In the period when the data enable signal is inactive, the gate of the thin film transistor connected to the gate line is turned off and the load is momentarily reduced, which is caused by the DC / DC conversion due to the load transient of the DC / DC device. This will affect the negative output voltage. In this case, the distortion of the gradation voltage, which is divided by the driving voltage AVdd, may appear as a defect at the beginning of the screen, and in particular, as a horizontal line defect, which is the most fatal defect during dual scan driving.

An object of the present invention is to provide a driving device that can improve the distortion of the gradation voltage.

Another object of the present invention is to provide a liquid crystal display including a driving device capable of improving distortion of a gray voltage.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided a driving apparatus including a driving voltage generator for generating a plurality of driving voltages for driving a liquid crystal panel, and at least a portion of the liquid crystal during an inactive period of a data enable signal. And a signal controller configured to stabilize the output voltage of the driving voltage generator by turning on the last gate line of the panel.

In addition, the liquid crystal display according to another embodiment of the present invention for achieving the above technical problem, a liquid crystal panel including a plurality of unit pixels defined in a region where a plurality of gate lines and data lines intersect, the liquid crystal panel A signal controller for generating a gate and a data control signal for driving and stabilizing an output voltage of the driving voltage generator by turning on a last gate line of the liquid crystal panel during at least a portion of the data enable signal in an inactive period, the control signal A driving voltage generator configured to receive a plurality of driving voltages and generate a plurality of driving voltages, a gate driver receiving the driving voltages and applying the driving voltages to the gate lines, and a data driver applying a data voltage to the data lines.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various forms, and the present embodiments are merely provided to make the disclosure of the present invention complete and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, the invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention;

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a diagram illustrating an interior of a memory unit of FIG. 1.

Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel 100, a driving voltage generator 200, a gate driver 300, a gray voltage generator 400, and a data driver 500. ), A signal controller 600 and a memory unit 700.

The liquid crystal panel 100 is connected to a plurality of display signal lines G1-Gn and D1 -Dm as viewed in an equivalent circuit, and includes a plurality of unit pixels arranged in a matrix form.

Here, the display signal lines G1-Gn and D1-Dm include a plurality of gate lines G1-Gn transferring gate signals and data lines D1-Dm transferring data signals. The gate lines G1-Gn extend in the row direction and are substantially parallel to each other, and the data lines D1-Dm extend in the column direction and are substantially parallel to each other.

Each unit pixel includes a switching element Q connected to the display signal lines G1-Gn, D1-Dm, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. The sustain capacitor Cst may be omitted as necessary.

The switching element Q is provided on a TFT substrate, and is a three-terminal element whose control terminal and providing terminal are connected to the gate lines G1-Gn and the data lines D1-Dm, respectively, and the output terminal is a liquid crystal capacitor. (Clc) and sustain capacitor (Cst).

The liquid crystal capacitor Clc has a pixel electrode of a TFT substrate and a common electrode 24 of a color filter substrate as two terminals, and the liquid crystal layer between the two electrodes functions as a dielectric. The pixel electrode is connected to the switching element Q, and the common electrode is formed on the front surface of the color filter substrate and receives the common voltage Vcom. Here, the common electrode may be provided in the TFT substrate, in which case both electrodes are made in a linear or bar shape.

The sustain capacitor Cst is formed by overlapping a separate signal line (not shown) and a pixel electrode provided on the TFT substrate, and a predetermined voltage such as a common voltage Vcom is applied to the separate signal line (independent wiring method). However, the sustain capacitor Cst may be formed such that the pixel electrode overlaps the front end gate line directly above the insulator (shear gate method).

On the other hand, in order to implement color display, each unit pixel should be able to display color, which is possible by providing a red, green, or blue color filter in a region corresponding to the pixel electrode. Here, the color filter can be formed in the corresponding region of the color filter substrate, and can also be formed above or below the pixel electrode of the TFT substrate.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the TFT substrate and the color filter substrate of the liquid crystal panel 100.

The driving voltage generator 200 generates a plurality of driving voltages. For example, the driving voltage generator 200 generates a gate on voltage Von, a gate off voltage Voff, and a common voltage Vcom.

The gate driver 300 is connected to the gate lines G1-Gn of the liquid crystal panel 100 to receive a gate signal formed by a combination of a gate on voltage Von and a gate off voltage Voff from the outside. Applied to Gn).

The gray voltage generator 400 may generate two sets of gray voltages related to transmittance of a unit pixel. That is, one of the two sets is the positive voltage, and the other is the negative voltage. The positive voltage and the negative voltage mean voltages whose polarities of the data voltages are opposite to the common voltage Vcom, and are alternately provided to the liquid crystal panel during inversion driving.

The data driver 500 is connected to the data lines D1-Dm of the liquid crystal panel 100, and generates and generates a plurality of gray voltages based on the plurality of gray voltages provided from the gray voltage generator 400. The selected gray voltage is selected and applied to the unit pixel as a data signal, and is usually composed of a plurality of integrated circuits.

The signal controller 600 generates control signals for controlling operations of the gate driver 300 and the data driver 500, and provides the corresponding control signals to the gate driver 300 and the data driver 500. In addition, the signal controller 600 adjusts the turn-on of the last gate line Gn of the liquid crystal panel during at least a part of the inactive period of the data enable signal DE to improve the distortion of the gray voltage. Stabilize the output voltage of 200).

Referring to FIG. 2, the memory unit 700 includes extended display identification data (EDID) informing a manufacturer, a product identification code, and basic display variables and characteristics, timing information for driving the liquid crystal panel 100, and dithering. (Dithering) Data patterns, Accurate Color Capture (ACC) for color correction, and Dynamic Capacitance Capture (DCC) information for improved response speed are stored. In this case, the memory unit 700 preferably uses EEPROM. In addition, the memory unit 700 stores information for adjusting the turn-on time of the last gate line of the liquid crystal panel in the inactive period of the data enable signal. Detailed description thereof will be described with reference to FIG. 3.

Hereinafter, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 controls RGB image signals R, G, and B and displays thereof from an external graphic controller (not shown), for example, a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync. , A main clock MCLK, and a data enable signal DE are provided. The signal controller 600 generates a gate control signal CONT1, a data control signal CONT2, and the like based on the control signal, and appropriately processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel 100. After that, the gate control signal CONT1 is provided to the gate driver 300, and the data control signal CONT2 and the processed image signal DAT are provided to the data driver 500.

Here, the gate control signal CONT1 may be a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV controlling the output timing of the gate on pulse, and a gate on. An output enable signal OE or the like that defines the width of the pulse.

The data control signal CONT2 includes a horizontal synchronization start signal STH indicating the start of the image signal DAT, a load signal LOAD for applying a corresponding data voltage to the data lines D1-Dm, and a common voltage VCOM. The inversion signal RVS and the data clock signal HCLK for inverting the polarity of the data voltage with respect to (hereinafter, referred to as the polarity of the data voltage by reducing the polarity of the data voltage with respect to the common voltage) are included.

The data driver 500 sequentially receives an image signal DAT corresponding to one row of unit pixels according to the data control signal CONT2 from the signal controller 600, and corresponds to each image signal DAT among grayscale voltages. By selecting the gray scale voltage to be converted, the video signal DAT is converted into the corresponding data voltage.

The gate driver 300 applies a gate-on voltage Von to the gate lines G1-Gn according to the gate control signal CONT1 from the signal controller 600, and is connected to the gate lines G1-Gn. Turn on (Q).

While a gate-on voltage Von is applied to one gate line G1-Gn, and a row of switching elements Q connected thereto is turned on (this period is '1H' or '1 horizontal period'). And the same as one period of the horizontal sync signal Hsync, the data enable signal DE, and the gate clock CPV], and the data driver 500 transmits each data voltage to the corresponding data line D1-Dm. Supply. The data voltage supplied to the data lines D1-Dm is applied to the corresponding unit pixel through the turned-on switching element Q.

The liquid crystal molecules change their arrangement according to the electric field generated by the pixel electrode and the common electrode, and thus the polarization of light passing through the liquid crystal layer changes. This change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the TFT substrate and the color filter substrate.

In this manner, the gate-on voltages Von are sequentially applied to all the gate lines G1 -Gn during one frame to apply data voltages to all the unit pixels. When one frame ends, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each unit pixel is opposite to that of the previous frame ('frame' reversal'). In this case, the polarity of the data voltage flowing through one data line may be changed ('line inversion') or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS within one frame ( 'Dot reversal').

3 is a diagram illustrating turn on information of a last gate line in a memory unit according to an embodiment of the present invention, and FIG. 4 is a diagram illustrating a gray voltage output in an inactive period of a data enable signal according to an embodiment of the present invention. 5 is a waveform diagram illustrating a gray voltage output in an inactive period of a data enable signal according to another embodiment of the present invention, and FIG. 6 is a data enable signal according to another embodiment of the present invention. This is a waveform diagram showing a gray voltage output in an inactive section of.

3 and 4, information (Gate_open) for adjusting the turn-on time of the last gate line Gn in the inactive period of the data enable signal is stored in a predetermined region of the memory unit 700. For example, it is assumed that information for adjusting the turn-on time of the last gate line Gn is stored in the address 50 of the memory unit 700. Information about the turn-on time of the last gate line Gn may be represented by 2 bits. In this case, the data enable signal is a combination of an active section A and an inactive section B. When the information Gate_open controlling the turn-on time of the last gate line Gn is “00”, the gate-on voltage Von is applied to the last gate line Gn during the inactive period B of the data enable signal. By turning on the last gate line, the output voltage of the driving voltage generator 200 may be stabilized to prevent distortion of the gray voltage as much as possible. In this case, the gray voltage applied to the data line of the liquid crystal panel maintains the gray voltage of the previous frame.

Referring to FIG. 5, when the information Gate_open adjusting the turn-on time of the last gate line Gn is “01”, the gate-on is performed on the last gate line Gn during the inactive period B of the data enable signal. The last gate line may be periodically turned on by applying a voltage Von periodically.

Referring to FIG. 6, when the information Gate_open adjusting the turn-on time of the last gate line Gn is “10”, the last gate line at the start time and the middle time of the inactive section B of the data enable signal is The gate-on voltage Von may be applied to (Gn) to turn on the last gate line Gn at the beginning and the middle of the last gate line.

As described above, in the present invention, the last gate line of the liquid crystal panel is turned on during at least a portion of the inactive period of the data enable signal to stabilize the output of the driving voltage generator to prevent distortion of the gray voltage. It is possible to prevent a horizontal line defect that occurs.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive.

According to the driving apparatus and the liquid crystal display including the same according to the present invention as described above, it is possible to stabilize the output voltage of the driving voltage generator to improve the distortion of the gray scale voltage and the defect of the line.

Claims (11)

A driving voltage generator configured to generate a plurality of driving voltages for driving the liquid crystal panel; And And a signal controller configured to stabilize the output voltage of the driving voltage generator by turning on the last gate line of the liquid crystal panel during at least a portion of the inactive period of the data enable signal. The method of claim 1, And a memory unit configured to store turn-on information of the gate line. The method of claim 1, And the signal controller turns on the last gate line of the liquid crystal panel during an inactive period of the data enable signal. The method of claim 1, And the signal controller periodically turns on the last gate line of the liquid crystal panel during an inactive period of the data enable signal. The method of claim 1, The signal controller is configured to turn on the last gate line of the liquid crystal panel at the start point and the middle point of the inactive period of the data enable signal. A liquid crystal panel including a plurality of unit pixels defined in a region where the plurality of gate lines and the data lines cross each other; A signal controller for generating a gate and a data control signal for driving the liquid crystal panel and stabilizing an output voltage of the driving voltage generator by turning on the last gate line of the liquid crystal panel for at least a portion of the data enable signal in an inactive period. ; A driving voltage generator configured to receive the control signal and generate a plurality of driving voltages; A gate driver which receives the driving voltage and applies it to the gate line; And And a data driver for applying a data voltage to the data line. The method of claim 6, And a memory unit in which the information on the gate turn-on is stored. The method of claim 6, And the signal controller turns on the last gate line of the liquid crystal panel during an inactive period of the data enable signal. The method of claim 6, And the signal controller periodically turns on the last gate line of the liquid crystal panel during an inactive period of the data enable signal. The method of claim 6, The signal controller turns on the last gate line of the liquid crystal panel at the start time and the middle time of the inactive period of the data enable signal. The method according to any one of claims 8 to 10, And a gray voltage applied to the data line at the last gate line turn-on of the liquid crystal panel maintains the gray voltage of the previous frame.

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