KR20070070926A - Liquid crystal display and the method of driving the same - Google Patents

Abstract

An LCD device and a driving method thereof are provided to improve a display error, such as flicker or motion blurring, by supplying different common voltages according to gray scales. An LCD(Liquid Crystal Display) device includes a liquid crystal panel(500), a timing controller(100), and a common voltage supplying unit(220). The timing controller analyzes R,G,B images, which are received from the outside, and generates a voltage control signal having a different duty ratio for different gray scales. The common voltage supplying unit receives the voltage control signal(Vcnt), converts the voltage control signal into a common voltage(Vcom) having a different magnitude for different gray scales, and supplies the common voltage to the liquid crystal panel.

Description

Liquid crystal display and the method of driving the same {Liquid crystal display and the method of driving the same}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display of FIG. 1.

3 is a block diagram of the common voltage generator of FIG. 1.

4 is a diagram illustrating an example of an integration circuit used in the converter of FIG. 3.

(Explanation of symbols for the main parts of the drawing)

100: timing controller 150: Y pyrom

200: driving voltage generator 210: gate on / off voltage generator

220: common voltage generator 221: converter

223: amplifier 300: gate driver

400: data driver 450: gamma voltage generator

500: liquid crystal panel 600: liquid crystal display device

400: integral circuit 410: op amp

The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly, to a liquid crystal display device and a driving method thereof that can improve screen defects.

In recent years, liquid crystal displays have been spotlighted as display means.

A liquid crystal display device applies an electric field to a liquid crystal material having an anisotropic dielectric constant injected between two display panels, adjusts the intensity of the electric field, and controls the amount of light transmitted through the display panel to obtain a desired image signal. Device.

In the liquid crystal display, a plurality of gate lines parallel to each other and a plurality of data lines insulated from and intersecting the gate lines are formed on the display panel, and an area surrounded by the gate lines and the data lines defines one pixel. Thin film transistors (TFTs) are formed at the intersections of the gate lines and the data lines of each pixel.

Herein, the liquid crystal panel may display brightness of 62 gradations, and the common voltage supplied to the liquid crystal panel is optimally set to 31 gradations, which is an intermediate value of 62 gradations.

However, when the gray scale changes due to the characteristics of the liquid crystal panel, the level of the common voltage required by the liquid crystal panel changes differently for each gray scale. Therefore, when the level of the common voltage optimized in the 31 gradations is supplied to the liquid crystal panel, a difference between the common voltage level required by the liquid crystal panel and the level of the common voltage substantially applied is generated in the remaining gradation regions except the 31 gradations.

Due to the difference in the common voltage level, the LCD panel may display a screen defect such as flicker or afterimage.

An object of the present invention is to provide a liquid crystal display device that can improve screen defects.

Another object of the present invention is to provide a method of driving such a liquid crystal display.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a liquid crystal panel and a voltage control signal having different duty ratios for respective gray levels by analyzing R, G, and B image signals from an external source. And a common voltage generator which receives the voltage control signal and converts the voltage control signal into a common voltage having a different magnitude for each gray level and provides the same to the liquid crystal panel.

According to another aspect of the present invention, there is provided a method of driving a liquid crystal display device, the voltage control signal having a different duty ratio for each gray level by analyzing an R, G, B image signal from an external source Generating a voltage control signal and converting the voltage control signal into a common voltage having a different size for each gray level and providing the same to the liquid crystal panel.

Specific details of other embodiments are included in the detailed description and drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various different forms, and only the embodiments make the disclosure of the present invention complete, and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, which is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display of FIG. 1.

1 and 2, the liquid crystal display 600 may include a liquid crystal panel 500, a timing controller 100, an EEPROM 150, a driving voltage generator 200, and a gate driver 300. , A data driver 400, a gamma voltage generator 450, and the like.

The liquid crystal panel 500 includes a plurality of display signal lines G1 to Gn and D1 to Dm, and a plurality of unit pixels connected thereto and arranged in a matrix form in an equivalent circuit.

The display signal lines G1 to Gn and D1 to Dm include a plurality of gate lines G1 to Gn for transmitting gate signals and a plurality of data lines D1 to Dm for transmitting data signals. The gate lines G1 to Gn extend in the row direction and are substantially parallel to each other, and the data lines D1 to Dm extend in the column direction and are substantially parallel to each other.

Each unit pixel includes a switching element Q connected to the display signal lines G1 to Gn and D1 to Dm, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. The sustain capacitor Cst may be omitted as necessary.

The switching element Q has two terminals, the pixel electrode PE of the first display panel and the common electrode CE of the second display panel, and the liquid crystal layer (not shown) interposed between the two electrodes PE and CE is a dielectric material. Function as. The pixel electrode PE is connected to the switching element Q, and the common electrode CE is formed on the entire surface of the second display panel and receives the common voltage Vcom. In addition, the common electrode CE may be provided in the first display panel. In this case, both electrodes PE and CE may be formed in a linear or bar shape.

The storage capacitor Cst is formed by overlapping a separate signal line (not shown) and the pixel electrode PE provided on the first display panel, and a predetermined voltage such as the common voltage CE is applied to the separate signal line (independence). Wiring method). In addition, the storage capacitor Cst may be formed such that the pixel electrode PE overlaps the front-end gate line directly above the insulator (shear gate method).

On the other hand, in order to implement color display, each unit pixel should display a color, which is possible by providing a color filter CF of red, green, or blue in a region corresponding to the pixel electrode PE. The color filter CF may be formed in a corresponding region of the second display panel, or may be formed above or below the pixel electrode PE of the first display panel.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the first display panel and the second display panel of the liquid crystal panel 500.

In order to provide driving and control signals to the liquid crystal panel 500, the liquid crystal display 600 may include a timing controller 100, an Y pyrom 150, a driving voltage generator 200, a gate driver 300, and a data driver. 400 and a gamma voltage generator 450.

The timing controller 100 generates control signals for controlling operations of the gate driver 300 and the data driver 400, and provides the corresponding control signals to the gate driver 300 and the data driver 400.

In addition, the timing controller 100 analyzes the R, G, and B image signals R, G, and B input from the outside to generate a voltage control signal Vcnt having a different duty ratio for each gray level. The voltage control signal Vcnt may be implemented as, for example, a pulse width modulation signal. In addition, values of different duty ratios for the respective gray levels are stored in the ypyrom 150 and provided to the timing controller 100. Here, the value of the duty ratio stored in the Y pyrom 150 may be set through programming.

The driving voltage generator 200 generates a plurality of driving voltages and provides them to the gate driver 300 and the liquid crystal panel 500. The driving voltage generator 200 may include a gate on / off voltage generator 210 for generating a gate on voltage Von and a gate off voltage Voff, and a common voltage generator for generating a common voltage Vcom. 220).

The common voltage generator 220 receives the voltage control signal Vcnt from the timing controller 100, generates a common voltage Vcom through a predetermined conversion process, and provides the generated voltage to the liquid crystal panel 500. The common voltage generator 220 will be described in detail later with reference to FIGS. 3 and 4.

The gate driver 300 is connected to the gate lines G1 to Gn formed in the liquid crystal panel 500, and includes a gate made of a combination of a gate-on voltage Von and a gate-off voltage Voff provided from the driving voltage generator 200. The signal is provided to the gate lines G1 to Gn.

The data driver 400 is connected to the data lines D1 to Dm formed in the liquid crystal panel 500, and generates and generates a plurality of gray voltages based on the plurality of gamma voltages provided from the gamma voltage generator 450. The selected gray voltage is selected and applied to the unit pixel as a data signal, and is typically formed of a plurality of integrated circuits.

The gate driver 300 and the data driver 400 may be mounted on the liquid crystal panel 500 in the form of a plurality of driving integrated circuit chips, or may be mounted on a flexible printed circuit film (FPC). The tape may be attached to the liquid crystal panel 500 in the form of a tape carrier package (TCP). In addition, the gate driver 300 or the data driver 400 may be integrated with the liquid crystal panel 500 together with the display signal lines G1 to Gn and D1 to Dm and the switching element Q.

The gamma voltage generator 450 may generate two sets of gamma voltages related to transmittance of a unit pixel. That is, one of the two sets is the positive voltage, and the other is the negative voltage. Herein, the positive voltage and the negative voltage mean voltages having opposite polarities of the data voltages with respect to the common voltage Vcom, and are alternately provided to the liquid crystal panel 500 during inversion driving.

As described above, the liquid crystal display 600 receives the driving and control signals from the outside and processes them appropriately to provide the driving and control signals of the liquid crystal panel 500.

Hereinafter, the display operation of the liquid crystal display 600 will be described in more detail.

The timing controller 100 may input R, G, and B image signals R, G, and B from the external graphic controller (not shown), and an input control signal for controlling the display thereof, for example, a vertical synchronization signal Vsync, horizontally. The synchronization signal Hsync, the main clock MCLK, and the data enable signal DE are provided.

The timing controller 100 generates a gate control signal CONT1, a data control signal CONT2, and the like based on the input control signal, and applies the image signals R, G, and B to operating conditions of the liquid crystal panel 500. Treat it properly. The gate control signal CONT1 is provided to the gate driver 300, and the data control signal CONT2 and the processed image signals R ', G', and B 'are provided to the data driver 400.

The gate control signal CONT1 is a vertical synchronization signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV for controlling the output timing of the gate on pulse, and a width of the gate on pulse. Output enable (OE) or the like that defines the < RTI ID = 0.0 >

The data control signal CONT2 is a load for applying a horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and a data voltage corresponding to the data lines D1 to Dm. The signal LOAD, the inversion signal RVS for inverting the polarity of the data voltage with respect to the common voltage Vcom, the data clock signal HCLK, and the like.

In addition, the timing controller 100 analyzes the image signals R, G, and B provided from the outside, and generates a voltage control signal Vcnt having a different duty ratio for each gray level. As the voltage control signal Vcnt, for example, a pulse width modulation signal may be used.

The generated voltage control signal Vcnt is supplied to the common voltage generator 220, and the common voltage generator 220 generates the common voltage Vcom through a predetermined process.

In more detail, the image signals R, G, and B input from the outside are analyzed by the timing controller 100 and are based on different duty ratios for each gray level stored in the Y. pyrom 150. The control signal Vcnt is generated. The voltage control signal Vcnt is provided as an input signal of the common voltage generator 220, and the common voltage generator 220 has a different size for each gray level based on the input voltage control signal Vcnt. The common voltage Vcom is generated and provided to the liquid crystal panel 500.

The data driver 400 sequentially receives image data R ', G', and B 'corresponding to one row of unit pixels according to the data control signal CONT2 provided from the timing controller 100, and among the gray voltages. The image data R ', G', B 'is converted into the corresponding data voltage by selecting the gray scale voltage corresponding to each of the image data R', G ', and B'.

The gate driver 300 is connected to the gate lines G1 to Gn by applying the gate-on voltage Von to the gate lines G1 to Gn according to the gate control signal CONT1 provided from the timing controller 100. Turn on (Q).

Here, while a gate-on voltage Von is applied to one gate line G1 to Gn, and a row of latching elements Q connected thereto is turned on (this period is referred to as' 1H 'or' 1 horizontal period ( horizontal period) ', which is equal to one period of the horizontal synchronization signal STH, the data enable signal DE, and the gate clock signal CPV], and the data driver 400 stores each data voltage as a corresponding data line. Supply to D1 ~ Dm). The supplied data voltage is applied to the corresponding unit pixel through the turned-on switching element Q.

In addition, the liquid crystal molecules constituting the liquid crystal layer interposed between the first and second display panels change their arrangement according to the change in the electric field generated by the pixel electrode PE and the common electrode CE, thereby passing through the liquid crystal layer. The polarization of the light is changed. The change in polarization is represented by a change in transmittance of light by polarizers (not shown) attached to the first and second display panels.

In this manner, the gate-on voltages Von are sequentially applied to all the gate lines G1 to Gn during one frame to apply data voltages to all unit pixels. When one frame ends, the next frame starts, and the state of the inversion signal RVS applied to the data driver 400 is controlled so that the polarity of the data voltage applied to each unit pixel is opposite to the polarity of the data voltage in the previous frame. ('Frame inversion'). In this case, the polarity of the data voltage flowing through one of the data lines D1 to Dm is changed ('line inversion') within one frame, or the polarity of the data voltage applied to one pixel row is also changed according to the characteristics of the inversion signal RVS. They can be different ('dot reversal').

3 is a block diagram of the common voltage generator of FIG. 1.

1 and 3, the common voltage generator 220 includes a converter 221 and an amplifier 223.

The converter 221 receives a voltage control signal Vcnt having different duty ratios from the timing controller 100 and converts the DC control voltage Vcom 'with a predetermined level. In this case, for example, a pulse width modulation signal PWM may be used as the voltage control signal Vcnt provided from the timing controller 100 to the converter 221.

The amplifier 223 receives the DC voltage Vcom 'from the converter 221 and amplifies the amplifier to generate a common voltage Vcom. The generated common voltage Vcom is provided to the liquid crystal panel 500.

In more detail, the timing controller 100 receives the image signals R, G, and B from the outside and analyzes them to generate a voltage control signal Vcnt having a different duty ratio for each gray level. The voltage control signal Vcnt is provided as an input signal of the common voltage generator 220, and the voltage control signal Vcnt input to the converter 221 of the common voltage generator 220 performs a predetermined conversion process. After the conversion, each gray level is converted into a DC voltage Vcom 'having a different magnitude. The conversion unit 221 may be configured by, for example, an integrated circuit, which will be described in detail later with reference to FIG. 4.

Subsequently, the DC voltage Vcom ′ output from the converter 221 is input to the amplifier 223 and amplified to be provided to the liquid crystal panel 500 as the common voltage Vcom. Here, the amplifier 223 may be configured as a level shifter, for example.

4 is a diagram illustrating an example of an integration circuit used in the converter of FIG. 3.

Referring to FIG. 4, the integrating circuit 400 used in the converting unit includes an op-amp 410, resistors R1 and R2, a capacitor C1, and the like.

Briefly looking at the operation of the integration circuit 400 as follows.

First, the voltage control signal Vcnt generated by the timing controller is input to the input unit. The voltage control signal Vcnt may use the pulse width modulation signal PWM as described above.

The input voltage control signal Vcnt is integrated by the resistor R1 and the condenser C1, and a DC voltage Vcom 'proportional to the input voltage control signal Vcnt is output through the output unit. That is, the voltage control signal Vcnt passing through the resistor R1 flows to the capacitor C1 without being input to the negative terminal of the op amp 410, and charges the capacitor C1. At this time, the voltage applied to both ends of the capacitor (C1) is represented by integrating the current flowing through the capacitor (C1). Here, the integrating circuit 400 should have an appropriate time constant τ in consideration of the frequency and response speed of the input pulse width modulation signal PWM.

The time constant τ is an indicator of how fast or slow the circuit can react to an input from the outside, and can be expressed as a product of the resistor R1 and the capacitor C1. The larger the time constant τ, the higher the fundamental frequency rejection rate of the input pulse width modulation signal PWM, but the lower the response speed. The smaller the time constant τ, the faster the response speed, while The fundamental frequency rejection rate of PWM is lowered.

In addition, the feedback resistor R2 used in the integration circuit 400 is used to increase the stability of the output DC voltage Vcom '. That is, when the input of the OPAMP 410 is opened, the output should not come out in theory, but the output voltage is prevented from coming out regardless of the input voltage due to the offset voltage of the OPAMP 410.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

As described above, according to the liquid crystal display and the driving method thereof according to the present invention, screen defects such as flicker or afterimage may be improved by supplying different common voltages for each gray level.

Claims (8)

Liquid crystal panels; A timing controller configured to receive an R, G, and B image signal from an external source and analyze the same to generate a voltage control signal having a different duty ratio for each gray level; And And a common voltage generator which receives the voltage control signal and converts the voltage control signal into a common voltage having a different magnitude for each of the gray levels, and provides the voltage to the liquid crystal panel. The method of claim 1, wherein the common voltage generator, A converter which receives the voltage control signal and converts the voltage control signal into a DC voltage having a different magnitude for each of the gray levels; And And an amplifier configured to receive and amplify the DC voltage and provide the amplified voltage to the liquid crystal panel. The method of claim 2, And the conversion unit is configured with an integration circuit for converting the voltage control signal into the DC voltage. The method of claim 2, And the amplifier comprises a level shifter. According to claim 1, And an ypyrom which provides the timing controller with different duty ratio values for each of the gray levels. Generating a voltage control signal having a different duty ratio for each grayscale by receiving an R, G, and B image signal from an external source; And And converting the voltage control signal into a common voltage having different magnitudes for each of the gray levels, and providing the converted voltage to a liquid crystal panel. The method of claim 6, Generating a voltage control signal having a different duty ratio for each gray level by analyzing an R, G, B image signal from an external source, the duty ratio from the ypyrom stored in the value of the duty ratio different for each gray level And generating the voltage control signal by receiving a value of. The method of claim 6, The step of converting the voltage control signal into a common voltage having a different magnitude for each of the gray levels to provide to the liquid crystal panel, Converting to DC voltages having different magnitudes for each of the gray levels; And And receiving and amplifying the DC voltage and providing the amplified voltage to the liquid crystal panel.

Images