KR102560740B1 - Liquid crystal display device - Google Patents

Abstract

Provided is a liquid crystal display device capable of preventing picture quality defects from occurring by controlling the operation of a data driver according to an input image. The liquid crystal display device includes an image analyzer that analyzes an input image and controls the data driver to operate in one of a column inversion method and a dot inversion method.

Description

Liquid crystal display device {Liquid crystal display device}

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of preventing image quality defects by controlling the operation of a data driver according to an input image.

A liquid crystal display (LCD), which is a representative display device of flat panel display devices, is a device that displays an image using optical anisotropy of liquid crystal, and has advantages such as thin shape, small size, low power consumption, and high image quality.

In general, a liquid crystal display device includes a liquid crystal layer formed between two substrates including a pixel electrode and a common electrode. In such a liquid crystal display, a voltage is applied to two electrodes to form an electric field in a liquid crystal layer, and a desired image is displayed by adjusting the transmittance of light passing through the liquid crystal layer by adjusting the intensity of the electric field formed.

In such a liquid crystal display device, an inversion driving method is used to prevent deterioration and fixation of the liquid crystal when an electric field in one direction is applied to a liquid crystal cell, that is, a pixel for a long time. The inversion driving method refers to inverting the polarity of a data voltage applied to each pixel based on a common voltage in a frame unit, column unit, or dot unit.

1 is a diagram schematically showing the configuration of a conventional liquid crystal display device, and FIG. 2 is a waveform diagram showing an output signal according to the operation of the data driver of FIG. 1 .

As shown in FIG. 1, a conventional liquid crystal display device 10 includes a liquid crystal panel 1 and a driving circuit for driving the liquid crystal panel, for example, a data driver 2, a gate driver 3, and a timing controller 4.

In the liquid crystal panel 1, a plurality of pixels (not shown) are formed in each intersection area of the plurality of gate lines GL and the plurality of data lines DL. The liquid crystal panel 1 has a structure in which one data line DL is connected to two pixels, and is driven in a Z-inversion method.

The data driver 2 generates data voltages from the image data DATA according to the data control signal DCS provided from the timing controller 4 . The data driver 2 converts the image data DATA into positive (+) or negative (-) data voltages according to the polarity control signal (POL) of the data control signal (DCS) and outputs them to a plurality of data lines (DL) of the liquid crystal panel (1).

The gate driver 3 generates a gate signal according to the gate control signal GCS provided from the timing controller 4 . The gate signal includes a gate high voltage of a high potential. The gate driver 3 outputs gate signals to the plurality of gate lines GL of the liquid crystal panel 1 .

As shown in FIG. 2 , the data driver 2 operates in a column inversion method according to the polarity control signal POL of the data control signal DCS output from the timing controller 4 . The data driver 2 outputs data voltages VD of different polarities for each data line DL during one frame of the liquid crystal panel 1 . For example, the data driver 2 outputs a data voltage VD of positive polarity to one data line DL of the liquid crystal panel 1 based on the common voltage VCOM. Accordingly, pixels connected to one data line DL and vertically adjacent to the liquid crystal panel 1 are charged with positive pixel voltages in response to the positive data voltage VD.

As such, in the conventional liquid crystal display device 10, the data driver 2 is operated in a column inversion method to output the data voltage VD of the same polarity to each data line DL for one frame. Therefore, a potential difference is not generated between a plurality of vertically adjacent pixels of the liquid crystal panel 1 during one frame, and as a result, power consumption of the data driver 2 is reduced.

However, in the conventional liquid crystal display device 10, since the data driver 2 operates in a column inversion method regardless of an image signal input from the outside, each pixel of the liquid crystal panel 1 must hold the pixel voltage by the data voltage VD output from the data driver 2 for one frame.

Due to this, when an image signal having a specific pattern is input, the holding characteristic of each pixel of the liquid crystal panel 1 is deteriorated, and leakage current increases. This increase in leakage current causes vertical crosstalk such as a line shape or flickering between adjacent data lines DL in the liquid crystal panel 1 . Accordingly, the quality of an image displayed on the liquid crystal panel 1 is degraded.

An object of the present invention is to provide a liquid crystal display device capable of preventing image quality defects by controlling the operation of a data driver according to an input image.

In order to achieve the above object, the liquid crystal display of the present invention includes an image analyzer that analyzes an image signal input from the outside and outputs a polarity control signal and a mode control signal, a data driver whose operation is controlled according to the polarity control signal, and a voltage generator whose operation is controlled according to the mode control signal.

The data driver outputs the data voltage to the liquid crystal panel in one of a column inversion method and a dot inversion method according to the polarity control signal output from the image analyzer.

The voltage generator outputs one of the first gate high voltage and the second gate high voltage according to the mode control signal output from the image analyzer.

The liquid crystal display device according to the present invention analyzes the video signal input from the outside and controls the operation of the data driving unit and the voltage generating unit, thereby reducing the power consumption of the liquid crystal display device and causing image quality defects due to horizontal or vertical crosstalk. can prevent it from happening.

1 is a diagram schematically showing the configuration of a conventional liquid crystal display device.
FIG. 2 is a waveform diagram illustrating an output signal according to the operation of the data driver of FIG. 1 .
3 is a diagram showing the configuration of a liquid crystal display device according to the present invention.
FIG. 4 is a diagram schematically showing the configuration of the liquid crystal panel of FIG. 3 .
FIG. 5A is a diagram illustrating an operation of the image analysis unit shown in FIG. 3 .
5B is a diagram illustrating an example of a specific pattern input to the image analysis unit.
6 and 7 are waveform diagrams showing signals of the liquid crystal display according to the operation of the image analysis unit.

Hereinafter, a liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a diagram showing the configuration of a liquid crystal display device according to the present invention, and FIG. 4 is a diagram schematically showing the configuration of the liquid crystal panel of FIG. 3 .

3 and 4, the liquid crystal display device 100 of this embodiment may include a liquid crystal panel 110 and driving circuits for operating the liquid crystal panel 110, for example, a timing controller 140, a gate driver 120, a data driver 130, and a voltage generator 150.

The liquid crystal panel 110 may include a plurality of gate lines GL, a plurality of data lines DL, and a plurality of pixels P. Each of the plurality of pixels P may include R, G, and B sub-pixels SP. Each of the R, G, and B subpixels SP may be connected to the gate line GL and the data line DL through the thin film transistor T. Each of the R, G, and B sub-pixels SP may be charged with a pixel voltage corresponding to the data voltage supplied through the data line DL.

The liquid crystal panel 110 may be formed in a double rate driving (DRD) structure. In other words, the liquid crystal panel 110 may be formed in a DRD structure in which two sub-pixels SP connected to different gate lines GL are connected in a horizontal direction to one data line DL.

For example, in the liquid crystal panel 110, the R sub-pixel R and the G sub-pixel G adjacent to each other in the first horizontal column are disposed on the left and right sides of the first data line DL1, respectively. The R subpixel R is connected to the first gate line GL1 and the first data line DL1 through the thin film transistor T, and the G subpixel G is connected to the second gate line GL2 and the first data line DL1 through the thin film transistor T. Accordingly, the R subpixel R and the G subpixel G may receive data voltages from the data driver 130 through the first data line DL1.

As described above, since the liquid crystal panel 110 has a DRD structure, the number of data lines DL formed on the liquid crystal panel 110 is 1/2 the number of subpixels SP in the horizontal direction of the liquid crystal panel 110, and the number of gate lines GL can be twice the number of subpixels SP in the vertical direction of the liquid crystal panel 110.

The plurality of subpixels SP of the liquid crystal panel 110 can be charged with pixel voltages corresponding to data voltages provided through the plurality of data lines DL in the turn-on period of the thin film transistor T according to the gate signal provided through the plurality of gate lines GL. In this case, since the data voltage has either a positive polarity or a negative polarity, the pixel voltage charged in each subpixel SP may also have either a positive polarity or a negative polarity.

In addition, since the liquid crystal panel 110 has a DRD structure, the plurality of sub-pixels SP of the liquid crystal panel 110 can be charged with pixel voltages in various forms according to the operation of the data driver 130 . At this time, since the gate signals are sequentially supplied to the plurality of gate lines GL of the liquid crystal panel 110, the plurality of sub-pixels SP of the liquid crystal panel 110 can be charged with pixel voltages centered on the correspondingly connected data lines DL in a Z-inversion method.

For example, if the data driver 130 outputs data voltages to a plurality of data lines DL in a column inversion method during one frame of the liquid crystal panel 110, the plurality of subpixels SP horizontally adjacent to each other in the liquid crystal panel 110 are charged with pixel voltages by data voltages supplied with different polarities to each data line DL. Accordingly, the plurality of sub-pixels SP of the liquid crystal panel 110 are charged with positive and negative pixel voltages in a horizontal 2-dot inversion method during one frame of the liquid crystal panel 110 . At this time, as shown in FIG. 4 , the liquid crystal panel 110 is charged with pixel voltage in a Z-shape around one data line DL.

In addition, when the data driver 130 outputs data voltages to a plurality of data lines DL in a horizontal 2-dot inversion method during one frame of the liquid crystal panel 110, the plurality of sub-pixels SPs horizontally adjacent to the liquid crystal panel 110 are charged with pixel voltages of different polarities for each pair of sub-pixels SP connected to each data line DL. That is, each of the R sub-pixel R and the G sub-pixel G connected to the first data line DL1 of the liquid crystal panel 110 and horizontally adjacent to each other is charged with positive and negative pixel voltages, respectively. Accordingly, the plurality of sub-pixels SP of the liquid crystal panel 110 are charged with positive and negative pixel voltages in a column inversion method during one frame of the liquid crystal panel 110 . At this time, as shown in FIG. 4 , the liquid crystal panel 110 is charged with pixel voltage in a Z-shape around one data line DL.

The aforementioned liquid crystal panel 110 may include a liquid crystal layer (not shown) interposed between an array substrate (not shown) and a color filter substrate (not shown). A plurality of gate lines GL, a plurality of data lines DL, and a plurality of pixels P are formed on the array substrate, and a plurality of color filters (not shown) corresponding to the plurality of sub-pixels SP of the array substrate are formed on the color filter substrate. In such a liquid crystal panel 110, the light transmittance of the liquid crystal layer is adjusted by the pixel voltage charged in each sub-pixel (SP) according to the gate signal and data voltage applied to each sub-pixel (SP) through a plurality of gate lines (GL) and a plurality of data lines (DL), thereby displaying an image.

The timing controller 140 may generate a gate control signal GCS and a data control signal DCS using signals such as a timing signal TS input from an external system (not shown), for example, a data enable DE, a dot clock DCLK, a vertical sync signal Vsync, and a horizontal sync signal Hsync.

The gate control signal GCS includes a gate start pulse, a gate shift clock, a gate output enable, and the like. The data control signal DCS includes a source start pulse, a source sampling clock, a source output enable, and a polarity control signal POL.

Here, the polarity control signal POL may include a first polarity control signal and a second polarity control signal. The timing controller 140 may output one of the first polarity control signal and the second polarity control signal as the polarity control signal POL according to the operation of the image analyzer 145 .

In addition, the timing controller 140 rearranges the image signals RGB input from an external system to generate image data DATA, and outputs the image data DATA to the data driver 130 together with the data control signal DCS.

The timing controller 140 may further include an image analyzer 145 . The image analyzer 145 analyzes the image signal RGB input from an external system, and controls the operation of the data driver 130 according to the result to convert the output of the data voltage DATA or control the operation of the voltage generator 150. The image analysis unit 145 will be described in detail later with reference to the drawings.

The gate driver 120 may generate a gate signal from the gate high voltages VGH1 and VGH2 and the gate low voltage VGL provided from the voltage generator 150 according to the gate control signal GCS output from the timing controller 140. Gate signals may be sequentially output to the plurality of gate lines GL of the liquid crystal panel 110 .

The data driver 130 may sample and latch the image data DATA according to the data control signal DCS output from the timing controller 140 and convert the image data DATA into parallel data. Also, the data driver 130 may generate data voltages from the parallel data using a plurality of gamma voltages provided from the gamma voltage generator (not shown). Here, since the plurality of gamma voltages have one polarity of positive polarity and one of negative polarity, the data voltage also has one of positive polarity and negative polarity. The data driver 130 may be operated to output the data voltage DATA in a predetermined inversion method according to the polarity control signal POL of the data control signal DCS.

The voltage generator 150 may generate and output a plurality of driving voltages, for example, a first gate high voltage VGH1, a second gate high voltage VGH2, a gate low voltage VGL, and a common voltage VCOM according to the input voltage Vin input from an external system. The first gate high voltage VGH1 , the second gate high voltage VGH2 , and the gate low voltage VGL may be output to the gate driver 120 . The common voltage VCOM may be applied to a common electrode (not shown) of the liquid crystal panel 110 .

The voltage generator 150 may select one of the first gate high voltage VGH1 and the second gate high voltage VGH2 as the gate high voltage according to the mode control signal Mode output from the timing controller 140 and output the same to the gate driver 120 together with the gate low voltage VGL.

Figure 5a is a diagram showing the operation of the image analysis unit shown in Figure 3, Figure 5b is a diagram showing an example of a specific pattern input to the image analysis unit.

As shown in FIG. 5A , the image analyzer 145 analyzes the image signal RGB input from the external system, and controls the operation of the data driver 130 and the voltage generator 150 according to the result.

For example, when a video signal (RGB) in a general form is input from an external system to the image analyzer 145, the image analyzer 145 may output a data control signal (DCS) including a first polarity control signal (POL1) according to an analysis result of the image signal (RGB). The data driver 130 is operated in a column inversion method according to the first polarity control signal POL1 to output data voltages of polarity corresponding to each data line DL of the liquid crystal panel 110 .

As shown in FIG. 6 , the data driver 130 may output a positive first data voltage VD1 to the first data line DL1 of the liquid crystal panel 110 based on the common voltage VCOM. The data driver 130 may maintain the polarity of the first data voltage VD1 output to the first data line DL1 during one frame of the liquid crystal panel 110 .

Accordingly, whenever the plurality of gate lines GL are sequentially enabled by the gate driver 120, the first pixel voltage VP1 corresponding to the positive first data voltage VD1 is charged in the plurality of subpixels SP connected to the first data line DL1 and adjacent to each other in the vertical direction.

For example, as shown in FIG. 4 , the plurality of sub-pixels SP connected to the first data line DL1 and vertically adjacent to each other may be charged with a first pixel voltage VP1 of positive polarity corresponding to the first data voltage VD1 of positive polarity.

Also, the image analyzer 145 may output the first mode control signal MODE1 to the voltage generator 150 according to the analysis result of the image signal RGB. The voltage generator 150 may output the first gate high voltage VGH1 and the gate low voltage VGL to the gate driver 120 according to the first mode control signal MODE1 . Also, the gate driver 120 may sequentially output the gate signal VG according to the first gate high voltage VGH1 and the gate low voltage VGL to the plurality of gate lines GL.

In this way, the image analysis unit 145 of the present embodiment analyzes the video signal RGB of a general form when it is input from the outside, and the polarity control signal that causes the data driver 130 to operate in the column inversion method, i.e., the first polarity control signal POL1 can be output. Accordingly, in the liquid crystal display device 100, power consumption according to the operation of the data driver 130 can be reduced.

Meanwhile, a predetermined ripple, for example, a first ripple voltage Vrp1 is generated in the common voltage VCOM by the positive first data voltage VD1 output from the data driver 130 to the first data line DL1. The first ripple voltage Vrp1 is generated when the level of the first data voltage VD1 transitions, that is, when the first data voltage VD1 is applied to the R sub-pixel R connected to the first data line DL1 and the first gate line GL1.

Here, since the first data voltage VD1 output from the data driver 130 maintains its polarity during one frame of the liquid crystal panel 110, the first ripple voltage Vrp1 is generated only when the first data voltage VD1 is applied to the subpixels in the first horizontal column of the liquid crystal panel 110, that is, the R subpixels R connected to the first data line DL1 and the first gate line GL1. Therefore, the influence of the first ripple voltage Vrp1 will not be significant in the entire sub-pixel SP of the liquid crystal panel 110 .

As another example, an image signal (RGB) of a specific pattern from an external system may be input to the image analyzer 145 . As shown in FIG. 5B, the image signal RGB of a specific pattern may be an image in which the first region RB and the second region RC appear as background patterns of the same gray level, and a high luminance white box region RA of a predetermined size exists in the center.

The image analyzer 145 may output the data control signal DCS including the second polarity control signal POL2 to the data driver 130 according to the analysis result of the input image signal RGB of a specific pattern. The data driver 130 operates in a dot inversion method according to the second polarity control signal POL2 and outputs data voltages of polarity corresponding to each data line DL of the liquid crystal panel 110 .

As shown in FIG. 7 , the data driver 130 may output positive and negative second data voltages VD2 to the first data line DL1 of the liquid crystal panel based on the common voltage VCOM. The data driver 130 may invert the polarity of the second data voltage VD2 output to the first data line DL1 whenever the plurality of gate lines GL are sequentially enabled during one frame of the liquid crystal panel 110.

Accordingly, whenever the plurality of gate lines GL are sequentially enabled by the gate driver 120, the second pixel voltage VP2 corresponding to the second data voltage VD2 of different polarity is charged in the plurality of sub-pixels SP connected to the first data line DL1 and adjacent to each other in the vertical direction.

For example, as shown in FIG. 4 , the R subpixel R connected to the first gate line GL1 and the first data line DL1 is charged with the positive second pixel voltage VP2 corresponding to the positive second data voltage VD2 output from the data driver 130 when the first gate line GL1 is enabled. In addition, the R sub-pixel R connected to the second gate line GL2 and the first data line DL1 is charged with the negative second pixel voltage VP2 corresponding to the negative second data voltage VD2 output from the data driver 130 when the second gate line GL is enabled. In addition, the R sub-pixel R connected to the third gate line GL3 and the first data line DL1 is charged with the positive second pixel voltage VP2 corresponding to the positive second data voltage VD2 output from the data driver 130 when the third gate line GL is enabled.

In this way, when an image signal (RGB) of a specific pattern is input from the outside, the image analyzer 145 of this embodiment analyzes it and outputs a polarity control signal that causes the data driver 130 to operate in the dot inversion method, that is, the second polarity control signal POL2. Accordingly, in the liquid crystal display device 100, it is possible to prevent vertical crosstalk from being generated by the image signal RGB having a specific pattern.

On the other hand, when the data driver 130 is operated by the dot inversion method by the image analyzer 145, the ripple of the common voltage VCOM is increased by the image signal RGB of a specific pattern. As a result, horizontal crosstalk in which the gradation level increases in the form of a line in the horizontal direction at the boundary between the first region RB and the second region RC of the image signal RGB may occur.

Accordingly, the image analyzer 145 of the present embodiment can control the data driver 130 to operate in a dot inversion method and output the second mode control signal MODE2 to the voltage generator 150 . The voltage generator 150 may output the second gate high voltage VGH2 and the gate low voltage VGL to the gate driver 120 according to the second mode control signal MODE2 .

Here, the second gate high voltage VGH2 may have a higher level than the first gate high voltage VGH1. For example, the second gate high voltage VGH2 may be a voltage higher than the first gate high voltage VGH1 by an increment of about 7 to 10V (ΔV).

As the voltage generator 150 outputs the second gate high voltage VGH2 whose level is increased, the gate driver 120 may sequentially output the gate signal VG whose positive level is increased by the second gate high voltage VGH2 to the plurality of gate lines GL. Accordingly, in each sub-pixel SP of the liquid crystal panel 110, the channel region of the thin film transistor T is further activated, so that the pixel voltage charged in the sub-pixel SP, that is, the amount of charge of the second pixel voltage VP2 is increased.

Accordingly, the ripple, that is, the second ripple voltage Vrp2 generated in the common voltage VCOM by the positive and negative second data voltages VD2 output from the data driver 130 to the first data line DL1 has a low level, thereby preventing horizontal crosstalk from occurring in an image displayed on the liquid crystal panel 110.

In this way, when an image signal RGB of a specific pattern is input from the outside, the image analyzer 145 of the present embodiment analyzes it and controls the data driver 130 to operate in a dot inversion method, and controls the voltage generator 150 to output a gate-high voltage with an increased level, thereby preventing horizontal and vertical crosstalk caused by the image signal RGB of the specific pattern in the liquid crystal panel 110.

That is, the image analyzer 145 operates the data driver 130 in a column inversion method when a general pattern of image signals RGB is input, and operates the data driver 130 in a dot inversion method when a specific pattern of image signals RGB is input, and controls the level of the gate signal VG output from the gate driver 120 to increase.

Accordingly, the liquid crystal display device 100 of the present invention controls the operation of the data driver 130 and the voltage generator 150 according to the video signal RGB input from the outside, thereby reducing the power consumption of the liquid crystal display device 100 and preventing the occurrence of quality defects due to horizontal or vertical crosstalk.

Although many details have been specifically described in the foregoing description, this should be interpreted as an example of a preferred embodiment rather than limiting the scope of the invention. Therefore, the invention should not be defined according to the described examples, but should be defined according to the scope of the claims and the scope of the claims.

100: liquid crystal display device 110: liquid crystal panel
120: gate driving unit 130: data driving unit
140: timing control unit 145: image analysis unit
150: voltage generator

Claims (9)

liquid crystal panel;
an image analysis unit that analyzes an image signal input from the outside and outputs a polarity control signal and a mode control signal;
a voltage generator outputting one of a first gate high voltage and a second gate high voltage according to the mode control signal; and
A data driver outputting a data voltage to the liquid crystal panel in one of a column inversion method and a dot inversion method according to the polarity control signal;
The video analysis unit,
A liquid crystal display device that outputs a first polarity control signal and a first mode control signal when the image signal is a general pattern image, and outputs a second polarity control signal and a second mode control signal when the image signal is a specific pattern image. delete According to claim 1,
wherein the voltage generator outputs the first gate high voltage according to the first mode control signal and outputs the second gate high voltage according to the second mode control signal. According to claim 3,
The second gate high voltage has a higher level than the first gate high voltage. According to claim 1,
The data driver outputs the data voltage in a column inversion method according to the first polarity control signal and outputs the data voltage in a dot inversion method according to the second polarity control signal. According to claim 1,
The specific pattern image,
a first area and a second area appearing as a background pattern at the same gradation level; and
A liquid crystal display device including a high-brightness white box area appearing in a central portion of a predetermined size. According to claim 1,
The liquid crystal panel is a liquid crystal display device having a DRD structure. According to claim 1,
and a gate driver generating a gate signal according to the first gate high voltage and the second gate high voltage output from the voltage generator and outputting the gate signal to the liquid crystal panel.
According to claim 1,
The data driving unit,
A liquid crystal display device that outputs a higher gate high voltage among the first gate high voltage and the second gate high voltage when driven in the dot inversion method.