KR101246571B1 - 2 dot-inversion type liquid cristal display - Google Patents

Abstract

The present invention relates to a technique for preventing a horizontal line defect from appearing in a two-dot inversion driving type liquid crystal display device in which the data voltage charging sections of the odd-numbered line and the even-numbered line continue in different forms. The present invention, the liquid crystal panel; A two-dot inversion method for driving the liquid crystal cells on the liquid crystal panel, the data driver shifting one inversion line for each frame; This is accomplished by a timing controller that outputs a polarity signal to the data driver each time the frame is changed to shift the inversion line one by one for each frame.

Description

2 dot inversion liquid crystal display device {2 DOT-INVERSION TYPE LIQUID CRISTAL DISPLAY}

1 is a block diagram of a two-dot inversion type liquid crystal display device according to the prior art.

Figure 2 is an illustration of a two-dot inversion according to the prior art.

3 is an output timing diagram of each signal in a two-dot inversion scheme according to the prior art.

4 is a block diagram of a two-dot inversion liquid crystal display device according to the present invention;

Figure 5 is an illustration of a two-dot inversion according to the present invention.

6A and 6B are output timing diagrams of respective signals in the 2-dot inversion method according to the present invention.

*** Description of the symbols for the main parts of the drawings ***

41 liquid crystal panel 42 gate driver

43: data driver 44: timing controller

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving technology of a liquid crystal display device, and more particularly to a two-dot inversion liquid crystal display device capable of preventing a horizontal line phenomenon generated in a two-dot inversion driving method.

In general, the liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display includes a liquid crystal panel arranged in a matrix form and a driving circuit for driving the liquid crystal panel.

1 is a block diagram of a two-dot inversion type liquid crystal display device according to the prior art, as shown therein, a liquid crystal panel 11 in which liquid crystal cells are arranged in a matrix form; A gate driver 12 for driving the gate lines GL0 to GLn of the liquid crystal panel 11; A data driver 13 for driving the data lines DL1 to DLn of the liquid crystal panel 11; It is composed of a timing controller 14 for controlling the gate driver 12 and the data driver 13, the operation thereof will be described as follows.

The timing controller 14 controls the driving timing of the gate driver 12 and the data driver 13 in response to the main clock signal and the horizontal and vertical synchronization signals input from the outside, and the digital data signals R, G, and B. ) Is supplied to the data driver 13.

The gate driver 12 supplies the gate high voltage to the gate lines GL0 to GLn during the corresponding syringe period 1H in response to the gate control signal from the timing controller 14, and supplies the gate low voltage in the remaining period. Supply. In addition, the gate driver 12 applies a gate low voltage to the gate line GLO formed on the uppermost side of the first scan line for the storage capacitor Cst.

The data driver 13 converts the digital data signals R, G, and B from the timing controller 14 into analog signals in response to the data control signals input from the timing controller 14. Are supplied to the data lines DL1 to DLn every time. In this case, the data driver 13 converts the digital data signals R, G, and B into analog signals by using the gamma voltage from the gamma voltage generator (not shown). In addition, the data driver 13 converts an analog data signal using a negative polarity or a positive gamma voltage in response to the polarity inversion signal to determine the polarity of the data signals supplied to the data lines DL1 to DLn. do.

The liquid crystal panel 11 includes a thin film transistor TFT formed at an intersection of n + 1 gate lines GL0 to GLn and m data lines DL1 to DLn arranged in a matrix form. . The thin film transistor TFT supplies a data signal from the data lines DL1 to DLn to the liquid crystal cell in response to a gate high voltage from the gate lines GL0 to GLn. The liquid crystal cell may be equivalently represented by a liquid crystal capacitor Clc including a common electrode facing the liquid crystal and a pixel electrode connected to the thin film transistor TFT. Further, a storage capacitor Cst is further formed in the liquid crystal cell to hold the data signal charged in the liquid crystal capacitor Clc until the next data signal is charged, that is, while the gate low voltage is applied. The storage capacitor Cst is formed between the previous gate line and the pixel electrode. In such a liquid crystal cell, the arrangement of liquid crystals having dielectric anisotropy varies according to data signals charged through thin film transistors (TFTs), whereby light transmittance is controlled to realize gradation.

In the two-dot inversion liquid crystal display device, inversion driving methods such as a frame inversion method, a line column inversion method, and a dot inversion method are used to drive the liquid crystal cells on the liquid crystal panel 11. The liquid crystal panel driving method of the frame inversion method inverts the polarity of the data signal supplied to the liquid crystal cells on the liquid crystal panel every time the frame is changed. In the line inversion type liquid crystal panel driving method, polarities of data signals supplied to liquid crystal cells are inverted according to a line (column) on the liquid crystal panel. The dot-inversion liquid crystal panel driving method includes supplying pixel voltage signals having polarities opposite to data signals supplied to adjacent liquid crystal cells in the vertical and horizontal directions to each of the liquid crystal cells on the liquid crystal panel. In addition, the polarity of the data signals supplied to all liquid crystals on the liquid crystal panel is inverted for each frame. Of these inversion driving methods, the dot inversion method is characterized by providing an image of superior image quality compared to the frame and line inversion methods. This inversion driving is performed by the data driver 13 responding to the polarity inversion signal supplied from the timing controller 14 to the data driver 13.

In general, liquid crystal displays are driven at a frame frequency of 60 Hz, but in systems requiring low power consumption, such as notebook computers, it is required to lower the frame frequency to 50 to 30 Hz. However, as the frame frequency is lowered, the flicker phenomenon occurs in the dot inversion method that provides excellent image quality among the inversion methods. Accordingly, the liquid crystal panel driving method of the two-dot inversion method as shown in FIG.

That is, in the odd frame and even frame shown in FIG. 2, the two-dot inversion scheme changes the polarity of the data signal in the horizontal direction in the liquid crystal cell (dot) unit as in the conventional dot inversion scheme, while in the vertical direction. It can be seen that it is driven in units of 2 dots. The two-dot inversion method has the advantage that the flicker phenomenon is reduced compared to the dot inversion method in a commercial screen driven at a frame frequency of 50 Hz, but there is a problem in that horizontal lines are generated in two scan line periods according to the luminance difference between scan lines.

In other words, when driving vertical two-dot inversion, the odd-numbered lines (N) th and (N + 2) th correspond to the even-numbered lines (N + 1) th and (N + 3) th as shown in FIG. In comparison, the data voltage is charged longer, so that they appear relatively dark, so that the horizontal line defects at a predetermined interval appear in the entire screen.

As described above, in the prior art, when the 2-dot inversion driving operation, the data line is charged longer than the odd-numbered line in every frame, so that they appear relatively dark. There was a problem appearing.

Accordingly, an object of the present invention is to provide a two-dot inversion liquid crystal display device and a driving method thereof by shifting an inversion line by one frame for two-dot inversion driving so that relatively dark and bright lines alternately appear. In providing.

The present invention for achieving the above object, in driving the liquid crystal cells on the liquid crystal panel in a 2-dot inversion method, by shifting the inversion line for each frame so that the relatively dark and light lines alternately appear. A data driver; And a timing controller for controlling the driving of the data driver and outputting a polarity signal to the gate driver each time the frame is changed to shift the inversion line by one frame.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 4 is a block diagram of a two-dot inversion liquid crystal display device according to the present invention. As shown in FIG. 4, a liquid crystal panel 41 includes liquid crystal cells arranged in a matrix form; A gate driver 42 for driving the gate lines GL0 to GLn of the liquid crystal panel 41; In driving the liquid crystal cells on the liquid crystal panel 41 in a 2-dot inversion method, a data driver 43 shifts the inversion lines for each frame so that relatively dark and bright lines alternately appear; A timing controller for controlling the driving of the gate driver 42 and the data driver 43 and outputting a polarity signal to the data driver 43 each time a frame is changed to shift the inversion line by one frame. 44 to be described in detail with reference to FIGS. 5 and 6 attached to the operation of the present invention configured as described above.

The timing controller 44 controls the driving timing of the gate driver 42 and the data driver 43 in response to the main clock signal and the horizontal and vertical synchronization signals input from the outside, and the digital data signals R, G, and B. ) Is supplied to the data driver 43.

In addition, the timing controller 44 includes a polarity signal output unit 44A for shifting an inversion line for each frame one by one as shown in FIG. 5, and uses the data driver 43 whenever the frame is changed. Output the polarity signal to.

The gate driver 42 outputs a gate signal 63 as shown in FIG. 6 in response to a gate control signal from the timing controller 44. That is, the gate high voltage is supplied to the gate lines GL0 to GLn during the corresponding syringe period 1H, and the gate low voltage is supplied in the remaining period.

The data driver 43 converts the digital data signals R, G, and B from the timing controller 44 into analog signals in response to the data control signals input from the timing controller 44. Are supplied to the data lines DL1 to DLn every time. In this case, the data driver 43 converts the digital data signals R, G, and B into analog signals by using the gamma voltage from the gamma voltage generator (not shown). In addition, the data driver 43 converts the analog data signal using the negative polarity or the positive gamma voltage in response to the polarity inversion signal, so that the polarity of the data signals supplied to the data lines DL1 to DLn is two. The dot inversion method is reversed.

The data driver 43 outputs a 2-dot inversion pulse 61 in full gray as shown in FIG. 6, and outputs a data voltage in a high or low period thereof, which is the gate driver 42. ) Is charged to the pixel in an overlapping section of the “high” section of the gate signal 63 output from the corresponding section of the gate signal 63 and the corresponding section of the 2-dot inversion pulse 61.

In Fig. 6A, the odd-numbered lines (N) th and (N + 2) th have a longer charging period 62 of the data voltage than the even-numbered lines (N + 1) th and (N + 3) th, so that they are relatively Appears dark. As such, the charging interval 62 for the data voltages of the odd-numbered lines (N) th, (N + 2) th and the even-numbered lines (N + 1) th, (N + 3) th is different from each other. This is due to the characteristics of the output timing relationship between the data voltage and the gate signal and the rise or fall time during charging of the data voltage.

However, the data driver 43 sets the two-dot inversion pulse 61 and the data voltage to 1 based on the polarity signal input from the polarity signal output unit 44A of the timing controller 44 every frame. Output by line shifting. Accordingly, in the next frame, as shown in FIG. 6B, the odd-numbered lines (N) th and (N + 2) th have a charging period (the data voltage) compared to the even-numbered lines (N + 1) th and (N + 3) th. 62) appears briefly.

As a result, each time the frame is changed by the above process, the long charging section 62L and the short charging section 62S for the data voltage are set to the odd-numbered lines (N) th, (N + 2) th and even-numbered lines. Since they appear alternately in the lines (N + 1) th and (N + 3) th, horizontal line defects are prevented.

On the other hand, the liquid crystal panel 41 includes a thin film transistor TFT formed at an intersection of n + 1 gate lines GL0 to GLn and m data lines DL1 to DLn. Equipped. The thin film transistor TFT supplies a data signal from the data lines DL1 to DLn to the liquid crystal cell in response to a gate high voltage from the gate lines GL0 to GLn. The liquid crystal cell may be equivalently represented by a liquid crystal capacitor Clc including a common electrode facing the liquid crystal and a pixel electrode connected to the thin film transistor TFT. Further, a storage capacitor Cst is further formed in the liquid crystal cell to hold the data signal charged in the liquid crystal capacitor Clc until the next data signal is charged, that is, while the gate low voltage is applied. The storage capacitor Cst is formed between the previous gate line and the pixel electrode. The liquid crystal cell has a liquid crystal arrangement state having dielectric anisotropy according to a data signal charged through a thin film transistor (TFT), thereby adjusting light transmittance to realize grayscale.

As described in detail above, the present invention shifts one inversion line for each frame when the 2-dot inversion driving is performed in the liquid crystal display so that relatively dark and bright lines alternately appear, thereby preventing horizontal line defects. It works.

Claims (4)

A liquid crystal panel provided with a plurality of liquid crystal cells; The data voltage is applied to the plurality of liquid crystal cells in a 2-dot inversion method, but the inversion line is shifted by one line for each frame in response to the polarity signal, so that the charging period of the odd-numbered line and the even-numbered line are charged. A data driver for controlling the length of the interval to alternate; And A timing controller including a polarity signal output unit for outputting a polarity signal to the data driver every frame change. 2 dot inversion liquid crystal display device comprising a. delete delete The method of claim 1, The odd-numbered line and the even-numbered line are 2. A 2-dot inversion type liquid crystal display device characterized in that a horizontal line defect on a screen is prevented as the data voltage is alternately charged to a long charging section and a short charging section each time the frame is changed.

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