KR20070120351A - Signal control apparatus and liquid crystal display comprising the same - Google Patents

Abstract

A signal control apparatus and a liquid crystal display device the same are provided to suppress a flicker and an afterimage by compensating for a polarity signal according to a compared result between positive and negative data voltages. A signal control apparatus includes a signal generator(610) and a signal converter(620). The signal generator generates gate and data control signals for driving gate and data drivers, respectively. The signal generator generates a polarity signal for inverting a polarity of a data voltage with respect to a common voltage. The signal converter receives the polarity signal and counts the number of positive and negative data voltages for respective pixel groups having at least two pixels. The signal converter compares the positive and negative data voltage numbers with each other, compensates for the polarity signal according to the compared result, and provides a polarity compensation signal.

Description

Signal control apparatus and liquid crystal display including the same

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an internal block diagram of a signal controller according to an embodiment of the present invention.

3 is an internal block diagram of a signal converter according to an exemplary embodiment of the present invention.

4 illustrates polarities of data voltages applied to a pixel group according to an exemplary embodiment of the present invention.

5 is a flowchart illustrating an operation of a signal controller according to an embodiment of the present invention.

6 is a waveform diagram illustrating a polarity signal according to a horizontal synchronization start signal according to an exemplary embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

100: liquid crystal panel 200: drive voltage generator

300: gate driver 400: gamma voltage generator

500: data driver 600: signal controller

610: signal generator 620: signal converter

622: first counter portion 624: second counter portion

626: signal comparator 628: signal compensator

The present invention relates to a signal control device and a liquid crystal display device including the same, and more particularly, to a signal control device capable of preventing flicker phenomenon and an afterimage, and a liquid crystal display device including the same.

In general, a liquid crystal display is a desired image signal by applying an intensity-controlled electric field to a liquid crystal having an anisotropic dielectric constant injected between two substrates to control the amount of light transmitted through the substrate. To obtain the display device.

The LCD includes a plurality of gate lines and a plurality of data lines formed to intersect the gate lines and transfer image data, and are formed in a region surrounded by the gate lines and the data lines and connected through a thin film transistor serving as a switch. It includes a pixel electrode in the form of a matrix.

The method of applying image data to each pixel in such an LCD is as follows.

First, when the gate on / off signals are sequentially applied to the gate lines, the thin film transistors connected to the gate lines are sequentially turned on and off, and at the same time, an image signal to be applied to the pixel row corresponding to the gate line, that is, a data voltage is applied. It is supplied to each data line. Then, the image signal supplied to the data line is applied to each pixel electrode through the turned on thin film transistor. At this time, the gate signal is sequentially applied to all the data lines for one frame to apply the pixel signal to all the pixel rows.

In this case, when data voltages having the same polarity are continuously applied to the pixel electrodes, ionic impurities in the liquid crystal are precipitated due to the characteristics of the liquid crystal, resulting in electrochemical changes at the pixel electrode and the counter electrode, resulting in a decrease in luminance or an afterimage. . Therefore, it is necessary to drive by inverting the polarity of the data voltage with respect to the common voltage. Accordingly, dot inversion driving for inverting the polarity of each pixel is used. For example, if a positive data voltage is applied to one pixel electrode, a negative data voltage should be applied in the next frame. However, there is a problem in that the flicker is severe because the liquid crystal transmittance at the positive data voltage and the liquid crystal transmittance at the negative data voltage are large.

An object of the present invention is to provide a signal control device capable of preventing the flicker phenomenon and the afterimage.

An object of the present invention is to provide a liquid crystal display including a signal control device capable of preventing the flicker phenomenon and the afterimage.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

The signal control device according to an embodiment of the present invention for achieving the above technical problem, and generates a gate and data control signal for driving the gate driver and the data driver, the polarity for inverting the polarity of the data voltage with respect to the common voltage A number of positive and negative polarities of the data voltages is counted for each pixel group including at least two or more pixels in response to a signal generator for generating a signal and the polarity signal, and whether the number of the positive and negative polarities is the same; And a signal converter for correcting the polarity signal according to the result and providing the polarity correction signal.

According to an embodiment of the present invention, a liquid crystal panel including a plurality of unit pixels defined in an area where a plurality of gate lines and data lines intersect, a gate driver, and a data driver is driven. A data generator for generating a gate and a data control signal to generate a polarity signal for inverting the polarity of the data voltage with respect to the common voltage, and the data for each pixel group including the at least two pixels in response to the polarity signal; A signal control unit including a signal converter which counts the number of positive and negative polarities of voltages, compares whether the number of positive and negative polarities is equal, corrects the polarity signal according to the result, and provides a polarity correction signal; A driving voltage generator which receives a control signal and generates a plurality of driving voltages; And a gate driver for receiving the driving voltage and applying the data voltage to the gate line, and a data driver for applying a data voltage to the data line.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various forms, and the present embodiments are merely provided to make the disclosure of the present invention complete and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, the invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention;

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, the liquid crystal display according to the exemplary embodiment of the present invention includes a liquid crystal panel 100, a driving voltage generator 200, a gate driver 300, a gamma voltage generator 400, and a data driver. 500, the signal controller 600.

The liquid crystal panel 100 is connected to a plurality of display signal lines G1-Gn and D1 -Dm as viewed in an equivalent circuit, and includes a plurality of unit pixels arranged in a matrix form.

Here, the display signal lines G1-Gn and D1-Dm include a plurality of gate lines G1-Gn transferring gate signals and data lines D1-Dm transferring data signals. The gate lines G1-Gn extend in the row direction and are substantially parallel to each other, and the data lines D1-Dm extend in the column direction and are substantially parallel to each other.

Each unit pixel includes a switching element Q connected to the display signal lines G1-Gn, D1-Dm, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. The sustain capacitor Cst may be omitted as necessary.

The switching element Q is provided on the TFT substrate, and the control terminal and the input terminal thereof are connected to the gate lines G1-Gn and the data lines D1-Dm, respectively, and the output terminal is a liquid crystal capacitor. (Clc) and sustain capacitor (Cst).

The liquid crystal capacitor Clc has a pixel electrode of a TFT substrate and a common electrode of a color filter substrate as two terminals, and the liquid crystal layer between the two electrodes functions as a dielectric. The pixel electrode is connected to the switching element Q, and the common electrode is formed on the front surface of the color filter substrate and receives the common voltage Vcom. Here, the common electrode may be provided in the TFT substrate, in which case both electrodes are made in a linear or bar shape.

The sustain capacitor Cst is formed by superimposing a separate signal line (not shown) and a pixel electrode provided on the TFT substrate, and a predetermined voltage such as the common voltage Vcom is applied to the separate signal line (independent wiring method). However, the sustain capacitor Cst may be formed such that the pixel electrode overlaps the front end gate line directly above the insulator (shear gate method).

On the other hand, in order to implement color display, each unit pixel should be able to display color, which is possible by providing a red, green, or blue color filter in a region corresponding to the pixel electrode. Here, the color filter can be formed in the corresponding region of the color filter substrate, and can also be formed above or below the pixel electrode of the TFT substrate.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the TFT substrate and the color filter substrate of the liquid crystal panel 100.

The driving voltage generator 200 generates a plurality of driving voltages. For example, the driving voltage generator 200 generates a gate on voltage Von, a gate off voltage Voff, and a common voltage Vcom.

The gate driver 300 is connected to the gate lines G1-Gn of the liquid crystal panel 100 to receive a gate signal formed by a combination of a gate on voltage Von and a gate off voltage Voff from the outside. Applied to Gn).

The gamma voltage generator 400 may generate two sets of gamma voltages related to transmittance of a unit pixel. In other words, one of the two sets is the positive data voltage and the other is the negative data voltage. The positive data voltage and the negative data voltage mean voltages whose polarities of the data voltages are opposite to the common voltage Vcom, and are alternately provided to the liquid crystal panel during inversion driving.

The data driver 500 is connected to the data lines D1-Dm of the liquid crystal panel 100 and generates a plurality of data voltages based on the plurality of gamma voltages provided from the gamma voltage generator 400. The data voltage is selected and applied to the unit pixel as a data signal, and is usually composed of a plurality of integrated circuits.

The signal controller 600 generates control signals for controlling operations of the gate driver 300 and the data driver 500, and provides the corresponding control signals to the gate driver 300 and the data driver 500. Here, the signal controller 600 receives the polarity signal POL and counts the number of positive and negative polarities of the data voltages for each pixel group including at least two pixels, and determines whether the number of the positive and negative polarities is the same. The apparatus may further include a signal converter configured to provide a polarity correction signal by correcting the polarity signal according to the result after comparing the results. The description thereof will be described in detail with reference to FIG. 2.

Hereinafter, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 controls RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync. ), A main clock MCLK, a data enable signal DE, and the like. The signal controller 600 generates a gate control signal CONT1, a data control signal CONT2, and the like based on the control signal, and appropriately processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel 100. After that, the gate control signal CONT1 is provided to the gate driver 300, and the data control signal CONT2 and the processed image signals R ', G', and B 'are provided to the data driver 500.

Here, the gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV controlling the output timing of the gate on pulse, and a gate on. An output enable signal OE or the like that defines the width of the pulse. Among these, the output enable signal OE and the gate clock signal CPV are provided to the driving voltage generator 200.

The data control signal CONT2 is a horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and a load signal for applying a corresponding data voltage to the data lines D1-Dm. (LOAD), a polarity signal (POL) and a data clock signal that inverts the polarity of the data voltage with respect to the common voltage (VCOM) (hereinafter referred to as the polarity of the data voltage by reducing the polarity of the data voltage with respect to the common voltage). (HCLK) and the like.

The data driver 500 sequentially receives image data R ′, G ′, and B ′ corresponding to one row of unit pixels according to the data control signal CONT2 from the signal controller 600. By selecting data voltages corresponding to the image data R ', G', and B ', the image data R', G ', and B' are converted into the corresponding data voltages.

The gate driver 300 applies a gate-on voltage Von to the gate lines G1-Gn according to the gate control signal CONT1 from the signal controller 600, and is connected to the gate lines G1-Gn. Turn on (Q).

While a gate-on voltage Von is applied to one gate line G1-Gn, and a row of switching elements Q connected thereto is turned on (this period is '1H' or '1 horizontal period'). And the same as one period of the horizontal sync signal Hsync, the data enable signal DE, and the gate clock CPV], and the data driver 500 transmits each data voltage to the corresponding data line D1-Dm. Supply. The data voltage supplied to the data lines D1-Dm is applied to the corresponding unit pixel through the turned-on switching element Q.

The liquid crystal molecules change their arrangement according to the electric field generated by the pixel electrode and the common electrode, and thus the polarization of light passing through the liquid crystal layer changes. This change in polarization is represented by a change in light transmittance by a polarizer (not shown) attached to the TFT substrate and the color filter substrate.

In this manner, the gate-on voltages Von are sequentially applied to all the gate lines G1 -Gn during one frame to apply data voltages to all the unit pixels. When one frame ends, the next frame starts and the state of the polarity signal POL applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each unit pixel is opposite to that of the previous frame ('frame' reversal'). In this case, the polarity of the data voltage flowing through one data line may be changed ('line inversion') or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the polarity signal POL within one frame ( 'Dot reversal').

2 is an internal block diagram of a signal controller according to an embodiment of the present invention, FIG. 3 is an internal block diagram of a signal converter according to an embodiment of the present invention, and FIG. 4 is a pixel according to an embodiment of the present invention. Indicates the polarity of the data voltage applied to the group.

2, the signal controller 600 according to an embodiment of the present invention includes a signal generator 610 and a signal converter 620.

The signal generator 610 receives a control signal from the outside and generates a polarity signal POL that inverts the polarity of the data voltage with respect to the common voltage VCOM.

The signal converter 620 receives the polarity signal POL generated by the signal generator 610 and counts the number of positive and negative polarities of the data voltage for each pixel group including at least two pixels. The number of negative polarities is compared and the polarity signal POL is corrected according to the result, and the polarity correction signal POL_COM is output.

Here, as shown in FIG. 4, the pixel group includes at least two pixels connected to one gate line, wherein the pixel group 710 includes first, second, and third R, G, and B pixels, respectively. 4 pixels, that is, 12 pixels.

Referring to FIG. 3, the signal converter 620 according to an embodiment of the present invention includes first and second counters 622 and 624, a signal comparator 626, and a signal corrector 628. .

The first and second counter units 622 and 624 receive the polarity signal POL and count the number of positive and negative polarities of the data voltage for each pixel group including at least two pixels. In this case, the first counter unit 622 outputs a positive count signal POL_P indicating the number of positive polarities of the data voltage, and the second counter unit 624 provides a negative count indicating the number of negative polarities of the data voltage. Output the signal POL_N.

The signal comparison unit 626 compares whether the positive count signal POL_P and the negative count signal POL_N, which are output signals of the first and second counter units 622 and 624, are equal to each other, thereby comparing the polarity comparison signal POL_COMP. ) At this time, if the positive count signal POL_P and the negative count signal POL_N are the same, a low level signal is output, and in the opposite case, a high level signal is output.

The signal corrector 628 receives the polarity comparison signal POL_COMP and the polarity signal POL, and corrects the polarity signal POL such that the number of positive and negative polarities of the data voltages is the same according to the polarity comparison signal POL_COMP. After that, the polarity correction signal POL_COM is output as an output signal. Here, when the polarity comparison signal POL_COMP is at the low level, the polarity signal POL which is not corrected by the polarity correction signal POL_COM is output. When the polarity comparison signal POL_COMP is at the low level, the number of positive and negative polarities of the data voltage is the same. The polarity signal POL is corrected to output the polarity correction signal POL_COM.

5 is a flowchart illustrating an operation of a signal controller according to an embodiment of the present invention, and FIG. 6 is a waveform diagram illustrating a polarity signal according to a horizontal synchronization start signal according to an embodiment of the present invention.

Referring to FIG. 5, the signal controller 600 according to an embodiment of the present invention first transmits the polarity signal POL generated by the signal generator 610 to the signal converter 620. In this case, the polarity signal POL is a signal generated based on 12 pixel groups 710 as shown in FIG. 4.

Then, the signal converter 620 receives the polarity signal POL and transmits the polarity signal POL to the first and second counters 622 and 624, and the first and second counters 622 and 624 are grouped. A positive count signal POL_P and a negative count signal POL_N are output by counting the number of positive and negative polarities of the data voltage, respectively (S10). At this time, the positive count signal POL_P and the negative count signal POL_N represent the number of positive and negative polarities of the counted data voltages, respectively.

Subsequently, the signal comparison unit 626 compares whether the positive count signal POL_P and the negative count signal POL_N are equal and outputs the polarity comparison signal POL_COMP (S12). Depending on the comparison result, the polarity comparison signal POL_COMP outputs a low level or high level signal. In this case, when the number of positive and negative polarities of the data voltage is the same, that is, when the positive count signal POL_P and the negative count signal POL_N are the same, the signal comparison unit 626 may have a polarity comparison signal having a low level ( POL_COMP is output, and the signal correction unit 628 outputs the polarity signal POL not corrected with the polarity correction signal POL_COM (S14).

However, as shown in FIG. 6, when the number of positive and negative polarities of the data voltage is different, that is, when the positive count signal POL_P and the negative count signal POL_N are different, the signal comparator 626 maintains a high level. The polarity comparison signal POL_COMP is output, and the signal correction unit 628 corrects the polarity signal POL such that the number of positive and negative polarities of the data voltage is the same (S16) and outputs the polarity correction signal POL_COM. (S18). For example, since the number of positive polarities of the data voltage is seven and the number of negative polarities is five, the polarity signal POL of FIG. 6 does not have the same number of positive and negative polarities. Accordingly, the signal comparison unit 626 outputs the polarity comparison signal POL_COMP having a high level. The signal correcting unit 628 receives the polarity signal POL according to the polarity comparison signal POL_COMP having a high level, and corrects the portion "A" of FIG. The number of negative polarities is six, respectively, and output as a polarity correction signal POL_COM.

In the present invention, the number of the positive and negative polarities of the data voltages of the pixel group including 12 pixels has been described. However, the present invention is not limited thereto, and the number of pixels of the pixel group is located inside the signal controller. It may vary depending on memory capacity.

In the present invention, it is also possible to compare the number of positive and negative polarities of the data voltage for each frame. Here, when comparing the number of positive and negative polarities of the data voltages for each frame, the number of positive and negative polarities may be corrected by comparing the number of positive and negative polarities of the data voltages of the previous frame and the current frame. .

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive.

According to the signal control apparatus and the liquid crystal display including the same according to the present invention as described above, the flicker phenomenon by comparing the number of positive and negative polarities of the data voltage for each pixel group or frame and correcting the polarity signal according to the result Afterimage can be prevented.

Claims (12)

A signal generator for generating a gate and data control signal for driving the gate driver and the data driver, and generating a polarity signal for inverting the polarity of the data voltage with respect to the common voltage; And Receiving the polarity signal and counting the number of positive and negative polarities of the data voltage for each pixel group including at least two pixels, and comparing the number of positive and negative polarities, and comparing the polarity according to the result. And a signal converter configured to correct the signal to provide a polarity correction signal. The method of claim 1, The signal converter, A first counter unit receiving the polarity signal and counting the number of polarities of data voltages for each pixel group including at least two pixels to provide a positive count signal; A second counter unit receiving the polarity signal and counting the number of negative polarities of data voltages for each pixel group including at least two pixels to provide a negative count signal; A signal comparator which compares whether the positive and negative count signals are the same and provides a polarity comparison signal; And And a signal correcting unit configured to correct the polarity signal to provide a polarity correction signal such that the number of positive and negative polarities of the data voltages is the same according to the polarity comparison signal. The method of claim 2, The signal comparison unit outputs the polarity comparison signal having a low level if the number of positive and negative polarities of the data voltage is the same; And a polarity comparison signal having a high level when the number of positive and negative polarities of the data voltages is different. The method of claim 1, And the pixel group is at least two pixels connected to one gate line. The method of claim 1, The signal converter counts the number of positive and negative polarities of the data voltage for each frame, compares whether the number of the positive and negative polarities is the same, and corrects the polarity signal according to the result to provide a polarity correction signal. controller. The method of claim 5, The signal counter unit counts the number of positive and negative polarities of the data voltage of the previous frame and the current frame. A liquid crystal panel including a plurality of unit pixels defined in an area where a plurality of gate lines and data lines cross each other; A signal generator for generating a gate and data control signal for driving the gate driver and the data driver, the polarity signal for inverting the polarity of the data voltage with respect to the common voltage, and the polarity signal to receive at least two pixels. A signal conversion that counts the number of positive and negative polarities of the data voltages for each pixel group including the same, compares whether the number of the positive and negative polarities is the same, corrects the polarity signal according to the result, and provides a polarity correction signal. A signal controller comprising a portion; A driving voltage generator configured to receive the control signal and generate a plurality of driving voltages; A gate driver configured to receive the driving voltage and apply the driving voltage to the gate line; And And a data driver for applying a data voltage to the data line. The method of claim 7, wherein The signal converter, A first counter unit receiving the polarity signal and counting the number of polarities of data voltages for each pixel group including at least two pixels to provide a positive count signal; A second counter unit receiving the polarity signal and counting the number of negative polarities of data voltages for each pixel group including at least two pixels to provide a negative count signal; A signal comparator which compares whether the positive and negative count signals are the same and provides a polarity comparison signal; And And a signal correction unit configured to correct the polarity signal to provide a polarity correction signal such that the number of positive and negative polarities of the data voltages is the same according to the polarity comparison signal. The method of claim 8, The signal comparison unit outputs the polarity comparison signal having a low level if the number of positive and negative polarities of the data voltage is the same; And outputting the polarity comparison signal having a high level when the number of positive and negative polarities of the data voltages is different. The method of claim 7, wherein And the pixel group is at least two pixels connected to one gate line. The method of claim 7, wherein The signal converting unit counts the number of positive and negative polarities of the data voltage for each frame, compares whether the number of the positive and negative polarities is the same, and corrects the polarity signal according to the result, thereby providing a polarity correction signal. Display device. The method of claim 11, And the signal counter unit counts the number of positive and negative polarities of the data voltages of the previous frame and the current frame and compares the number of the positive and negative polarities.

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