KR20060020474A - Liquid crystal dislay panel having redunancy structure and method thereof - Google Patents

Abstract

The present invention relates to a liquid crystal display device having a redundancy structure and a method of manufacturing the same, the configuration of the present invention comprises an array substrate and a color filter substrate; A data line and a gate line intersected vertically and horizontally on the array substrate; A pixel region defined by the data line and the gate line and dividing a unit cell into a first pixel region and a second pixel region facing each other by the gate line; A driving thin film transistor comprising a source electrode extending from the data line, and a drain electrode spaced apart from the source electrode at a predetermined interval and connected to the first pixel region and the second pixel region, respectively; A dummy thin film transistor formed on a gate line away from the driving thin film transistor; And a liquid crystal layer arranged on the array substrate and the color filter substrate, thereby eliminating dot defects caused by a defect of a thin film transistor for driving a pixel.

Redundancy lines, laser welding, dummy thin film transistors, point defects

Description

Liquid crystal display device having redundancy structure and manufacturing method therefor {LIQUID CRYSTAL DISLAY PANEL HAVING REDUNANCY STRUCTURE AND METHOD THEREOF}

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram schematically showing a circuit configuration of a liquid crystal display device having a conventional redundancy line.

2 is a view illustrating a repair method using a redundancy line.

3 is a schematic view showing a liquid crystal display device according to the prior art.

4 is a cross-sectional view of a conventional liquid crystal display device without a redundancy structure, and is a cross-sectional view taken along the line IV-IV of FIG. 3.

5 is a schematic view of a liquid crystal display device having a redundancy TFT according to the present invention;

FIG. 6A schematically illustrates a liquid crystal display in a state before connecting a redundancy TFT according to the present invention. FIG.

FIG. 6C is a cross-sectional view of the liquid crystal display device in a state before connecting the redundancy TFT according to the present invention, and taken along line VIc-VIc in FIG. 6A; FIG.

7A is a schematic cross-sectional view of a liquid crystal display with a redundancy TFT connected in accordance with the present invention;

7B is a schematic cross-sectional view of a liquid crystal display with a redundancy TFT connected in accordance with the present invention;

FIG. 8 is a cross-sectional view of the liquid crystal display device with the redundancy TFT connected in accordance with the present invention, taken along the line VII-VII of FIG. 7A; FIG.

-Explanation of symbols for the main parts of the drawings-

121: array substrate 123: buffer layer

125: gate line 127: gate insulating film

129 semiconductor layer 131 data line

131a: source electrode 133: first drain electrode

135: second drain electrode 137: dummy source electrode

139: dummy drain electrode 141: interlayer insulating film

145: first pixel area 147: second pixel area

149: protective layer 151a, 151b: contact hole

153: redundancy line 200: driving thin film transistor portion

300: dummy thin film transistor unit

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a redundancy structure capable of eliminating dot defects caused by TFT defects by using a dummy thin film transistor as a redundancy structure and manufacturing thereof. It is about a method.

In general, a liquid crystal display (LCD) is a plurality of liquid crystal cells arranged in a matrix form and a plurality of control switches (TFT arrays) for switching a video signal to be supplied to each of the liquid crystal cells. And a control unit for controlling the driving ICs, and a driving integrated circuit (hereinafter referred to as IC) formed externally to drive the liquid crystal panel.

Here, the liquid crystal panel has a gate line formed in a row direction. Data lines are formed in the column direction.

In addition, a gate pad portion and a data pad portion for connecting to an external driving IC are provided at ends of the gate line and the data line.

In the conventional liquid crystal display, an active region is formed in a portion where the lower substrate and the upper substrate overlap, and a gate line and a data line are connected to an external driving IC in the lower substrate that does not overlap the upper substrate. A gate pad area and a data pad area for connection are formed.

Here, a plurality of gate driving ICs are connected to the gate pad region, and a plurality of data driving ICs are connected to the data pad region.

In the active region, pixels having a matrix form are provided at points where the first to nth gate lines G1 to Gn and the first to mth data lines D1 to Dm are orthogonal to each other.

In such a conventional liquid crystal display device, redundancy lines are formed to prevent defective thin film transistors or disconnection between lines.

Therefore, a conventional liquid crystal display device having such a redundancy line will be described in more detail with reference to FIG. 1.

1 is a diagram schematically showing a circuit configuration of a liquid crystal display device having a conventional redundancy line.

Referring to FIG. 1, a thin film transistor Tr is connected to each pixel to switch a video signal applied to the pixel in response to a gate signal.

In addition, a redundancy line 11 is provided so that each gate line G and data line D bypass the active region formed in a matrix form.

This redundancy line 11 is to repair the disconnection generated during the manufacturing process to produce a good product, thereby improving the process yield.

The recovery method of disconnection using such a redundancy line will be described with reference to FIG. 2.

2 is a view illustrating a repair method using a redundancy line.

Referring to FIG. 2, when an arbitrary data line Dm is disconnected, the video signal of the data line Dm may not be transmitted after the disconnection unit 13. That is, the video signal is not transmitted to the corresponding pixel after the disconnection unit 13 so that an image cannot be displayed.

Accordingly, welding is performed to the first and second intersections 15a and 105 in which the redundancy line 11 and the data line Dm are orthogonal to each other. In this case, the welding may short the redundancy line 11 and the data line Dm-1 by welding the redundancy line 13 and the data line Dm-1 vertically using a laser or the like. Electrical connection.

As a result, the video signal of the data line Dm-1 is transferred to the data line formed after the disconnection unit 13 via the first crossing portion 15a, the redundancy line 11, and the second crossing portion 15b. It is done.

The disconnected gate or data line is recovered by the same method as described above.

On the other hand, according to the conventional liquid crystal display, one thin film transistor (TFT) is used to drive one pixel.

By the way, in the case of a large area panel, when the pixel size is large, the pixels are divided by half and driven by each TFT.

A large area liquid crystal display according to the related art will be described with reference to FIG. 3 as follows.

3 is a view schematically showing a liquid crystal display according to the prior art.

4 is a cross-sectional view of a conventional liquid crystal display device without a redundancy structure, and is a cross-sectional view taken along the line IV-IV of FIG. 3.

Referring to FIG. 3, in the liquid crystal display according to the related art, the gate line 25 and the data line 31 are vertically and horizontally arranged on an insulating substrate (not shown) to form a unit cell with the first pixel area 41 and the first pixel area. A pixel area divided into two pixel areas 43 is defined. In the actual liquid crystal display device, n gate lines and m data lines cross each other, and there are n × m pixels. However, in the drawings, only one pixel is shown as an example for simplicity.                         

In addition, the case where a large pixel size is large in the case of a large area panel here is demonstrated as an example.

As shown in FIG. 3, a horizontal gate line 25 and a vertical data line 31 are vertically and horizontally arranged to define one unit cell region, and the gate line 25 is the unit cell region, that is, The first pixel region 41 and the second pixel region 43 are divided into two sides and arranged to correspond to each other.

In addition, the drain electrode is spaced apart from the source electrode 31a by a predetermined distance on the gate line 25 and is connected to the pixel electrodes of both pixel regions with the source electrode 31a extending from the data line 31. The electrodes 33 and 35 are arranged. Here, the source electrode 31a and the drain electrode 33, 35 arranged on the gate line 25 constitute a driving thin film transistor.

On the other hand, the configuration of the liquid crystal display device according to the prior art will be described in detail with reference to FIG.

Referring to FIG. 4, a buffer layer 23 is formed on an array substrate 21, and a gate line 25 used as a gate electrode is formed on the buffer layer 23.

In addition, a gate insulating film 27 is formed on the entire substrate including the gate line 25, and a semiconductor layer 29 is formed on the gate insulating film 27 on which the gate line 25 is located.

The first drain electrode 33 and the second drain electrode 35 are formed on the semiconductor layer 27 on the gate electrode 25 so as to face each other at a predetermined interval. In this case, a source electrode 31A extending from the data line 31 is formed at the center of the gate electrode 25 between the first drain electrode 33 and the second drain electrode 35.

In addition, the first and second drain electrodes 33 and 35 may include a first pixel electrode 41 and a second pixel electrode which constitute first and second pixel regions that constitute a unit cell divided into the two regions. Is connected to 43.

Although not shown, the common electrode is formed at the same time as the gate line and connected to the common line.

In addition, although not shown in the drawing, the upper substrate, that is, the color substrate, is formed with a color filter for realizing a black matrix and color to prevent light leakage from the thin film transistor, the gate line, and the data line. An overcoat film for planarizing is applied.

On the opposite surface of the array substrate and the color substrate, an alignment film for determining the initial alignment direction of the liquid crystal is coated.

Although not shown in the drawings, a liquid crystal layer is formed between the array substrate and the color substrate to control light transmittance by voltages applied to the common electrode and the pixel electrode.

According to the conventional liquid crystal display device configured as described above, when a thin film transistor (TFT) defect, for example, a disconnection occurs in the gate line or the data line, the entire gate line or the data line does not operate and thus the thin film transistor does not operate. Dot defects occur.                         

Therefore, since the defects of the thin film transistors, that is, the driving thin film transistors do not operate, a new method for recovering them is urgently needed.

However, a liquid crystal display device using a single TFT for a conventional pixel or a liquid crystal display device having a large pixel size does not include a redundancy structure for thin film transistor (TFT) defects.

Accordingly, the present invention has been made to solve the above problems of the prior art, and a liquid crystal display device having a redundancy structure capable of eliminating dot defects caused by a defect of a thin film transistor driving a pixel. The purpose is to provide a manufacturing method.

A liquid crystal display device having a redundancy structure according to the present invention for achieving the above object includes an array substrate and a color filter substrate; A data line and a gate line intersected vertically and horizontally on the array substrate; A pixel region defined by the data line and the gate line and dividing a unit cell into a first pixel region and a second pixel region facing each other by the gate line; A driving thin film transistor comprising a source electrode extending from the data line and a drain electrode spaced apart from the source electrode and connected to the first pixel region and the second pixel region, respectively; A dummy thin film transistor formed on a gate line away from the driving thin film transistor; And a liquid crystal layer filled between the array substrate and the color filter substrate.                         

In addition, a method of manufacturing a liquid crystal display device having a redundancy line according to the present invention for achieving the above object comprises the steps of providing an array substrate and a color filter substrate; Cross-aligning data lines and gate lines vertically and horizontally on the array substrate to divide the unit cells into first and second pixel regions facing each other by the gate lines; Forming a driving thin film transistor including a source electrode extending from the data line and a drain electrode spaced apart from the source electrode and connected to the first pixel region and the second pixel region, respectively; Forming a dummy thin film transistor on a gate line away from the driving thin film transistor; And filling a liquid crystal layer between the array substrate and the color filter substrate.

Hereinafter, a liquid crystal display having a redundancy structure and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a view schematically showing a liquid crystal display device having a redundancy TFT according to the present invention.

Referring to FIG. 5, in the liquid crystal display according to the present invention, the gate line 125 and the data line 131 are vertically and horizontally arranged on an array substrate to define a unit cell region. In an actual liquid crystal display device, n gate lines 125 and m data lines 131 intersect with n x m pixels. However, in the drawing, only one pixel is described as an example to simplify the description.

In the case of a large-area panel, a case in which the pixel is large and the pixel is divided by half and driven by each TFT is described as an example.

Referring to FIG. 5, a horizontal gate line 125 and a vertical data line 131 are vertically and horizontally arranged to define a pixel area that is one unit cell, and the pixel areas are both sides, that is, the first pixel area. The gate line 125 is arranged in the horizontal direction at the center of one unit cell region so as to be divided into 145 and the second pixel region 147 and face each other.

In addition, a source electrode 131a extending from the data line 131 is arranged on the gate line 125, and both sides of the gate line 125 are spaced apart from the source electrode 131a by a predetermined distance. First and second drain electrodes 133 and 135 connected to the pixel electrodes of the first and second pixel regions 145 and 147 are arranged.

Here, the source electrode 131a and the first and second drain electrodes 133 and 135 arranged on the gate line 125 together with the gate line 125 constitute a driving thin film transistor 200.

In addition, a dummy source electrode 137 and a dummy drain electrode 139 are arranged on the gate line 125 spaced apart from the thin film transistor by a predetermined distance to face each other. Here, the dummy source electrode 137 is not connected to the pixel electrode positioned in the first pixel region 145, and the dummy drain electrode 139 is connected to the second pixel region 147. That is, the dummy source electrode 137 is arranged in a state in which the dummy source electrode 137 is not connected to the pixel electrode while a defect of the thin film transistor is not generated. In addition, the dummy source electrode 137 and the dummy drain electrode 139 form a dummy thin film transistor 300 together with the gate line 125.                     

In addition, when the driving thin film transistor unit 200 that drives the pixel is not driven due to a defect, the dummy source electrode 137 of the dummy thin film transistor unit 300 by a laser repair method. The redundancy line 153 shorts the data line 131, thereby driving the dummy thin film transistor unit 300 to enable pixel driving.

Meanwhile, a method of manufacturing a liquid crystal display device having a redundancy structure according to the present invention will be described in detail with reference to FIGS. 6 to 8.

6A is a view schematically showing a liquid crystal display device in a state before connecting the redundancy TFT according to the present invention, and FIG. 6B is a cross-sectional view of the liquid crystal display device in a state before connecting the redundancy TFT according to the present invention. Sectional drawing along the VIc-VIc line of.

FIG. 7A is a schematic cross-sectional view of a liquid crystal display device in which a redundancy TFT is connected according to the present invention, and FIG. 7B is a schematic cross-sectional view of a liquid crystal display device in a state in which a redundancy TFT is connected according to the present invention.

FIG. 8 is a cross-sectional view of the liquid crystal display device with the redundancy TFT connected in accordance with the present invention, taken along the line VII-VII of FIG. 7A.

6A and 6B, after forming the buffer layer 123 on the array substrate 121, the gate line 125 is formed on the buffer layer 123. Although not shown in the drawing, the bottom electrode of the storage capacitor is formed at the same time when the gate line 125 is formed.

Next, a gate insulating film 127 is deposited on the gate line 125, and a material layer such as polysilicon is deposited on the gate insulating film 127, and then selectively patterned to cover the gate line 125. The semiconductor layer 127 is formed.

Subsequently, after depositing a conductive material layer, such as a metal, on the entire substrate including the semiconductor layer 127 and selectively removing the first layer to form a driving thin film transistor at a predetermined distance above the gate line 125. The drain electrode 133 and the second drain electrode 135 are formed. In this case, the source electrode 131a constituting the driving thin film transistor is formed at the same time as the data line 131, and the source electrode 131a extends from the data line 131 and overlaps the gate line 125. The first and second drain electrodes 133 and 135 are arranged to be spaced apart from the source electrode 131a by a predetermined distance and connected to the first and second pixel regions 145 and 147. The dummy source electrode 137 and the dummy drain electrode 139 constituting the second thin film transistor, that is, the dummy thin film transistor, are spaced apart from each other by a predetermined distance with respect to the gate line 125. The source electrode 137 is not connected to the first pixel region 145, and the dummy drain electrode 139 is connected to the second pixel region 147 in a subsequent process.

Next, an interlayer insulating film 141 is deposited on the entire substrate including the dummy source electrode 137 and the dummy drain electrode 139, and the interlayer insulating film 141 is selectively removed to form the thin film transistor unit 200 and the dummy. Contact holes are formed to expose the drain electrodes of the thin film transistor unit 300, respectively.

Subsequently, a conductive material layer is deposited on the interlayer insulating layer 141 including the contact hole and then selectively patterned to form a pixel electrode, that is, a first pixel electrode 145 and a second pixel electrode 147. In this case, the first pixel electrode 145 is connected to the first drain electrode 133 of the thin film transistor unit 200, and the second pixel electrode has a redundancy function with the second drain electrode 135 of the thin film transistor unit. The dummy drain electrode 139 of the dummy thin film transistor unit 300 to be performed is connected.

Next, as shown in FIGS. 7A and 7B, a protective film 149 is deposited on the entire substrate including the dummy thin film transistor unit 300.

Subsequently, as shown in FIG. 8, a redundancy line 153 is formed on the passivation layer 149. The redundancy line 153 is connected to the drain electrode 139 of the data line and the dummy thin film transistor unit 300. In the case of electrical insulation, when the vertical welding is performed using a laser, the redundancy line 153 is vertically shorted with the drain electrode 139 of the data line 131 and the dummy thin film transistor unit 300 to be electrically connected. By being connected, the dummy thin film transistor unit 300 is driven instead of the defective thin film transistor unit 200. In this case, a redundancy line 153 is formed in the passivation layer 149 positioned on a portion of the data line 131 connected to the redundancy line 153 and a portion of the drain electrode 139 of the dummy thin film transistor unit 300. Contact holes 151a and 151b are formed to facilitate vertical welding of the data line 131, the redundancy line 153, and the dummy source electrode 137 of the dummy thin film transistor unit 300 using a laser. . In this case, the protective layer 149 having the contact holes 151a and 151b includes the redundancy line 153 and the data line 131 or the redundancy line 153 and the dummy drain electrode of the dummy thin film transistor unit 300. 139 to electrically insulate.                     

As described above, when the dummy thin film transistor further formed is used as a support layer for maintaining a cell gap, that is, a bumper, and a defect occurs in the driving thin film transistor for driving the pixel, a method such as laser repair is used. The driving thin film transistor is opened and the redundancy line is shorted with the display part, that is, the pixel part, so that the pixel is driven by using the dummy thin film transistor formed as a new driving thin film transistor.

On the other hand, although not shown in the drawing, the upper substrate, ie, the color substrate, which constitutes the liquid crystal display device, has a black matrix and a color filter for realizing black matrix to prevent light leakage from the thin film transistor, the gate line and the data line. An overcoat film for flattening the color filter is formed thereon. On the opposite surface of the array substrate and the color substrate, an alignment film for determining the initial alignment direction of the liquid crystal is coated.

In addition, a liquid crystal layer is inserted between the array substrate and the color substrate to control light transmittance by voltages applied to the common electrode and the pixel electrode.

As described above, according to the liquid crystal display device having a redundancy structure according to the present invention, a dummy thin film transistor is additionally formed on a substrate to prepare a liquid crystal display device and used as a support layer for maintaining a cell gap. If a defect occurs, short-circuits may be caused by disconnecting the thin film transistor that has been used previously using a method such as laser repair, shorting the display unit, that is, the pixel part, and driving the pixel using the dummy thin film transistor as a new driving thin film transistor (dot defect). Can improve redundancy.

In addition, according to the liquid crystal display device having a redundancy structure according to the present invention, a large-area cell gap uniformity is improved by additionally forming a dummy thin film transistor as a support layer for maintaining a cell gap, that is, a bumper.

In addition, according to the liquid crystal display device having the redundancy structure according to the present invention, the additionally formed dummy thin film transistor may be used as a structure to prevent the touch defects, thereby improving the touch defects.

Furthermore, according to the present invention, since the dummy thin film transistor is not connected to a wire, problems such as increase of parasitic capacitance do not occur.

On the other hand, while described above with reference to a preferred embodiment of the present invention, those skilled in the art various modifications of the present invention without departing from the spirit and scope of the invention described in the claims below And can be changed.

Claims (15)

Array substrate and color filter substrate; A data line and a gate line intersected vertically and horizontally on the array substrate; A pixel region defined by the data line and the gate line and dividing a unit cell into a first pixel region and a second pixel region facing each other by the gate line; A driving thin film transistor comprising a source electrode extending from the data line, and a drain electrode spaced apart from the source electrode at a predetermined interval and connected to the first pixel region and the second pixel region, respectively; A dummy thin film transistor formed on a gate line away from the driving thin film transistor; And And a liquid crystal layer filled between the array substrate and the color filter substrate. The liquid crystal display of claim 1, wherein a source electrode extending from the data line overlaps a gate line. The liquid crystal display device according to claim 1, wherein the first pixel area and the second pixel area constitute one unit pixel. The liquid crystal display of claim 1, wherein the dummy thin film transistor comprises a drain electrode connected to one of a first pixel region and a second pixel region, and a source electrode connected to the data line. The liquid crystal display of claim 1, wherein a source electrode of the data line and the dummy thin film transistor is connected by a redundancy line. 6. The liquid crystal display of claim 5, wherein the redundancy line is electrically shorted to a source electrode of the data line and the dummy thin film transistor by laser welding. 6. The liquid crystal display device according to claim 5, wherein the dummy thin film transistor is used as a cell gap retention support layer or a driving thin film transistor. Providing an array substrate and a color filter substrate; Cross-aligning data lines and gate lines vertically and horizontally on the array substrate to divide the unit cells into first and second pixel regions facing each other by the gate lines; Forming a driving thin film transistor comprising a source electrode extending from the data line and a drain electrode spaced apart from the source electrode and connected to the first pixel region and the second pixel region, respectively; Forming a dummy thin film transistor on a gate line away from the driving thin film transistor; And Filling the liquid crystal layer between the array substrate and the color filter substrate; and a method of manufacturing a liquid crystal display device having a redundancy structure. 10. The method of claim 8, wherein the source electrode extending from the data line is formed to overlap the gate line. The liquid crystal having a redundancy structure according to claim 8, wherein the dummy thin film transistor includes a drain electrode connected to one of a first pixel region and a second pixel region and a source electrode connected to the data line. Method for manufacturing a display device. The method of claim 8, further comprising electrically connecting the data line and the source electrode of the dummy thin film transistor by a redundancy line. 12. The method of claim 11, wherein the step of electrically connecting the data line and the source electrode of the dummy thin film transistor by a redundancy line is performed by laser welding. 10. The method of claim 8, wherein the dummy thin film transistor is used as a cell gap holding support layer or a driving thin film transistor. 10. The method of claim 8, wherein the dummy thin film transistor is not connected to each other during pixel driving. The method of claim 8, wherein the redundancy line is electrically insulated from the first drain electrode of the driving thin film transistor.

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