JPH11119253A - Active matrix type liquid crystal display device and its defect correcting method - Google Patents
Active matrix type liquid crystal display device and its defect correcting methodInfo
- Publication number
- JPH11119253A JPH11119253A JP28538097A JP28538097A JPH11119253A JP H11119253 A JPH11119253 A JP H11119253A JP 28538097 A JP28538097 A JP 28538097A JP 28538097 A JP28538097 A JP 28538097A JP H11119253 A JPH11119253 A JP H11119253A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- tft
- liquid crystal
- active matrix
- display device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、例えばコンピュー
タやテレビなどのディスプレイに利用され、表示用の画
素電極にスイッチング素子を介して駆動信号を印加する
ことにより、表示を行うアクティブマトリクス型液晶表
示装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device which is used for a display such as a computer or a television and performs display by applying a drive signal to a pixel electrode for display via a switching element. It is about.
【０００２】[0002]
【従来の技術】図７に、スイッチング素子として薄膜ト
ランジスタを備えたアクティブマトリクス型液晶表示装
置のアクティブマトリクス基板の等価回路図を示す。こ
のアクティブマトリクス基板は、マトリクス状に形成さ
れたスイッチング素子である薄膜トランジスタ（以下、
ＴＦＴと呼ぶ）１と、各ＴＦＴ１に対応して、マトリク
ス状に形成された複数の画素電極４と、これらの行方向
および列方向に対応して直交するように形成された走査
配線であるゲート配線２および信号配線であるソース配
線３とを有している。2. Description of the Related Art FIG. 7 shows an equivalent circuit diagram of an active matrix substrate of an active matrix type liquid crystal display device having a thin film transistor as a switching element. This active matrix substrate is a thin film transistor (hereinafter, referred to as a switching element) formed in a matrix.
TFTs 1), a plurality of pixel electrodes 4 formed in a matrix corresponding to each TFT 1, and gates as scanning wirings formed so as to be orthogonal to each other in the row direction and the column direction. It has a wiring 2 and a source wiring 3 which is a signal wiring.
【０００３】ここで、ゲート配線２は、その上に構成さ
れたＴＦＴ１のゲート電極１０を兼ね、それに走査信号
を与えることによりＴＦＴ１を駆動制御する。一方、ソ
ース配線３は各ＴＦＴ１のソース電極５に接続され、Ｔ
ＦＴ１の駆動時にＴＦＴ１を介してデータ信号を画素電
極４に与える。また、ＴＦＴ１のドレイン電極６は画素
電極４および付加容量７の一方の端子に接続され、付加
容量７のもう一方の端子は付加容量配線８に接続され、
対向基板上の対向電極に接続される。Here, the gate wiring 2 also serves as the gate electrode 10 of the TFT 1 formed thereon, and drives and controls the TFT 1 by supplying a scanning signal thereto. On the other hand, the source wiring 3 is connected to the source electrode 5 of each TFT 1 and
When driving the FT1, a data signal is applied to the pixel electrode 4 via the TFT1. Further, the drain electrode 6 of the TFT 1 is connected to the pixel electrode 4 and one terminal of the additional capacitance 7, and the other terminal of the additional capacitance 7 is connected to the additional capacitance wiring 8,
It is connected to the counter electrode on the counter substrate.
【０００４】[0004]
【発明が解決しようとする課題】ところで、高精細な液
晶表示装置を製造しようとした場合、画素電極を小さく
して画素電極数を増やさなくてはならない。それにとも
ない、ＴＦＴも小さくして数を増やさなくてはならな
い。こうなると、アクティブマトリクス基板の製造にお
いて、製造装置の精度やダストのなどの理由で、ＴＦＴ
の特性不良、画素電極と各配線、配線間どうしの電気的
リークが起こる可能性が高くなる。液晶表示装置として
点灯した場合、点欠陥あるいは線欠陥として見え、表示
品位上好ましくない。When manufacturing a high-definition liquid crystal display device, the number of pixel electrodes must be increased by reducing the size of the pixel electrodes. Accordingly, the number of TFTs must be reduced to increase the number. In such a case, in the manufacture of the active matrix substrate, TFTs may be removed due to the accuracy of the manufacturing apparatus or dust.
And the possibility of electrical leakage between the pixel electrode and each wiring and between the wirings increases. When turned on as a liquid crystal display device, it appears as a point defect or a line defect, which is not preferable in display quality.
【０００５】ノーマリーホワイトのアクティブマトリク
ス型液晶表示装置において、信号配線の信号が画素電極
に正常に伝わらない場合、輝点となって見え、表示上目
立ってしまう。この欠陥の修正方法は、リーク箇所を特
定し、レーザー照射によりその部分を切断するという方
法をとっている。In a normally white active matrix type liquid crystal display device, when a signal of a signal line is not transmitted to a pixel electrode normally, it appears as a luminescent spot and is conspicuous in display. The method of correcting this defect employs a method of specifying a leak portion and cutting the portion by laser irradiation.
【０００６】しかし、この欠陥は場所的には表示画面の
周辺部は許容できても、中央部は許容できない。色でい
うならば、視覚上赤、緑、青の内一番明るい緑の輝点許
容数は厳しいなど制限がある。さらに、２画素電極、３
画素電極にまたがる欠陥であるならば、なおさら許容し
難くなる。このような場合、欠陥箇所が明確であると、
レーザー照射により容易に欠陥を修正できる。その一
方、欠陥が特定できないため、修正できない場合の方が
多い。However, this defect can be tolerated at the periphery of the display screen but not at the center in terms of location. In terms of color, there is a limit such as the strictest allowable number of bright spots of the brightest green among red, green and blue visually. Furthermore, two pixel electrodes, three
If the defect straddles the pixel electrode, it becomes even more unacceptable. In such cases, if the defect is clear,
Defects can be easily corrected by laser irradiation. On the other hand, in many cases, the defect cannot be identified and thus cannot be corrected.
【０００７】しかしながら、ゲート配線上にＴＦＴが構
成されていると、輝点となっている画素電極につながっ
ているＴＦＴのソース電極とゲート配線、ドレイン電極
とゲート配線との間で切断ができず、ソース電極とドレ
イン電極を導通させることができないため、欠陥を修正
することができない。However, if the TFT is formed on the gate wiring, it cannot be cut between the source electrode and the gate wiring and the drain electrode and the gate wiring of the TFT connected to the pixel electrode which is a bright spot. Since the source electrode and the drain electrode cannot be conducted, the defect cannot be corrected.
【０００８】本発明は、ゲート配線上にＴＦＴが構成さ
れているアクティブマトリクス型液晶表示装置におい
て、輝点となっている欠陥を容易に修正できる構成およ
びその修正方法を提供するものである。An object of the present invention is to provide an active matrix type liquid crystal display device in which a TFT is formed on a gate wiring, a structure capable of easily correcting a defect serving as a luminescent spot, and a method for correcting the same.
【０００９】[0009]
【課題を解決するための手段】請求項１記載の液晶液晶
表示装置は、基板上に設けられた複数の走査配線と、前
記走査配線と直交するように構成された複数の信号配線
と、前記走査配線と信号配線との交差部近傍にスイッチ
ング素子とが設けられ、画素電極がス前記スイッチング
素子のドレイン電極に接続されたアクティブマトリクス
型液晶表示装置において、前記走査配線と信号配線との
交差部で、前記信号配線を挟んで両側の領域に、開口部
を有する前記走査配線が形成され、前記開口部は絶縁膜
に覆われ、前記絶縁膜に覆われた前記開口部の領域に
は、前記スイッチング素子の一部または前記信号配線に
覆われている箇所が存在することを特徴とする。According to a first aspect of the present invention, there is provided a liquid crystal display device, comprising: a plurality of scanning wirings provided on a substrate; a plurality of signal wirings orthogonal to the scanning wirings; In an active matrix type liquid crystal display device in which a switching element is provided near an intersection between a scanning wiring and a signal wiring and a pixel electrode is connected to a drain electrode of the switching element, an intersection between the scanning wiring and the signal wiring is provided. In the area on both sides of the signal wiring, the scanning wiring having an opening is formed, the opening is covered with an insulating film, and the area of the opening covered with the insulating film is It is characterized in that there is a part of the switching element or a portion covered with the signal wiring.
【００１０】請求項２記載の欠陥修正方法は、請求項１
記載のアクティブマトリクス型液晶表示装置において、
スイッチング素子の特性不良、またはスイッチング素子
近傍の前記走査配線と信号配線との交差部で欠陥が生じ
たとき、または前記信号配線と画素電極との間で欠陥が
生じたとき、前記開口部の前記スイッチング素子側の領
域にある前記走査配線を、前記開口部の両側で切断し、
前記切断された走査配線を介して、前記信号配線と前記
画素電極を接続することを特徴とする。According to a second aspect of the present invention, there is provided a method of repairing a defect.
In the active matrix type liquid crystal display device described in the above,
When a defect in the characteristics of the switching element, or when a defect occurs at the intersection of the scanning wiring and the signal wiring in the vicinity of the switching element, or when a defect occurs between the signal wiring and the pixel electrode, Cutting the scanning wiring in the region on the switching element side on both sides of the opening;
The signal wiring and the pixel electrode are connected via the cut scanning wiring.
【００１１】請求項３記載の欠陥修正方法は、請求項１
記載のアクティブマトリクス型液晶表示装置において、
非スイッチング素子側で前記走査配線と前記信号配線と
の交差部で欠陥が生じたとき、前記開口部の前記非スイ
ッチング素子側の領域にある前記走査配線を、前記開口
部の両側で切断することを特徴とする。According to a third aspect of the present invention, there is provided a defect repairing method.
In the active matrix type liquid crystal display device described in the above,
When a defect occurs at the intersection of the scanning wiring and the signal wiring on the non-switching element side, the scanning wiring in a region of the opening on the non-switching element side is cut on both sides of the opening. It is characterized by.
【００１２】上記構成による作用を説明する。請求項１
記載の液晶表示装置の構成によれば、工程内でのダス
ト、製造装置の精度により起こるＴＦＴの特性不良、ま
たはＴＦＴ近傍のゲート配線とソース配線との交差部で
のリークが生じたとき、またはソース配線と画素電極と
の間で欠陥が生じたとき、画素電極に正常な信号が伝わ
らなくて、黒画面、単色画面にて輝点となる画素電極を
修正することにより、その画素電極が正常なソース配線
の信号と連動させ、輝点という状態を解除できる。The operation of the above configuration will be described. Claim 1
According to the configuration of the liquid crystal display device described above, when dust in the process, poor TFT characteristics caused by the accuracy of the manufacturing apparatus, or leakage occurs at the intersection of the gate wiring and the source wiring near the TFT, or When a defect occurs between the source wiring and the pixel electrode, a normal signal is not transmitted to the pixel electrode, and the pixel electrode that becomes a luminescent spot on a black screen or a monochrome screen is corrected, so that the pixel electrode becomes normal. The state of a bright spot can be canceled by interlocking with a signal of a suitable source wiring.
【００１３】請求項２の欠陥修正方法によれば、ＴＦＴ
の特性不良、またはＴＦＴ近傍のゲート配線とソース配
線との交差部で欠陥（Ｓ−Ｇリーク）が生じたとき、ま
たはソース配線と画素電極との間で欠陥が生じたとき、
ＴＦＴを有するゲート配線の開口部の上側で、その画素
電極のＴＦＴを挟むように、開口部の上側の両側２箇所
でレーザー照射を行い、ゲート配線を切断する。さら
に、そのＴＦＴのソース電極、ドレイン電極をそれぞれ
切断されたゲート配線を介して、レーザー照射にて溶接
して、導通させる。これで、ソース配線が、切断された
ゲート配線を介して、画素電極と接続されることにな
る。従って、その画素電極はソース信号と連動するた
め、黒画面、単色画面では輝点となって見えることはな
くなる。According to the defect repair method of the second aspect, the TFT
Characteristic failure, or when a defect (SG leakage) occurs at the intersection of the gate wiring and the source wiring near the TFT, or when a defect occurs between the source wiring and the pixel electrode,
Above the opening of the gate wiring having the TFT, laser irradiation is performed at two places on both sides above the opening so as to sandwich the TFT of the pixel electrode, and the gate wiring is cut. Further, the source electrode and the drain electrode of the TFT are welded by laser irradiation via the cut gate wirings to conduct. Thus, the source wiring is connected to the pixel electrode via the cut gate wiring. Therefore, since the pixel electrode is linked with the source signal, it does not appear as a bright point on a black screen or a monochrome screen.
【００１４】請求項３の欠陥修正方法によれば、ＴＦＴ
から離れた非ＴＦＴ側のソース配線とゲート配線の交差
部で欠陥（Ｓ−Ｇリーク）が生じたとき、非ＴＦＴ側で
あるゲート配線の開口部の下側で、開口部の下側の両側
２箇所でレーザー照射を行い、ゲート配線を切断する。
従って、この修正方法により、この画素電極は正常に動
作するため、黒画面、単色画面では輝点となって見える
ことはなくなる。According to a third aspect of the present invention, there is provided a method of repairing a TFT.
When a defect (SG leak) occurs at the intersection of the source wiring and the gate wiring on the non-TFT side, which is away from the gate electrode, both sides below the opening below the opening of the gate wiring on the non-TFT side Laser irradiation is performed at two places to cut the gate wiring.
Therefore, since the pixel electrode operates normally by this correction method, it does not appear as a bright point on a black screen or a monochrome screen.
【００１５】上記の２つの修正方法では、容易に常時輝
点となる状態が解除できる。さらにこの修正方法によ
り、例えば欠陥の場所、色、個数、欠陥の連なりなどに
関して良品となる基準を満たす可能性が高まり、良品率
が向上する。According to the above two correction methods, the state of always being a bright spot can be easily canceled. Further, this repair method increases the possibility of satisfying the criteria for non-defective products with respect to, for example, the location, color, number of defects, and the sequence of defects, and improves the non-defective product rate.
【００１６】[0016]
【発明の実施の形態】本発明の実施の形態を図面に基づ
いて説明する。 （実施形態１）ノーマリーホワイトのアクティブマトリ
クス型液晶表示装置であるアクティブマトリクス基板の
平面図を図１に、図１のＸ−Ｘ断面図を図２、図１のＹ
−Ｙ断面図を図３、図１のＺ−Ｚ断面図を図４に示す。Embodiments of the present invention will be described with reference to the drawings. (Embodiment 1) FIG. 1 is a plan view of an active matrix substrate which is a normally white active matrix type liquid crystal display device, FIG. 2 is a sectional view taken along line XX of FIG. 1, and FIG.
FIG. 3 is a sectional view taken along the line -Y, and FIG. 4 is a sectional view taken along the line ZZ of FIG.
【００１７】透明な絶縁性基板９の上に、ゲート配線２
とソース配線３が縦横方向に交差するように形成されて
いる。各画素電極４には、これを表示駆動するＴＦＴ１
が接続されている。ＴＦＴ１のドレイン電極６と画素電
極４が接続され、ソース電極５はソース配線３と接続さ
れている。なお、ＴＦＴ１はゲート配線２上に形成され
ている。また、ゲート配線２はソース配線３との交差部
付近で開口部２０を有している。この開口部２０の領域
にはＴＦＴ１のソース電極５の一部、ソース配線３など
が存在している。また、隣接するゲート配線２間には、
ゲート配線２と平行に付加容量配線８が形成されてい
る。On a transparent insulating substrate 9, a gate wiring 2 is provided.
And source lines 3 are formed so as to intersect in the vertical and horizontal directions. Each pixel electrode 4 has a TFT 1 for driving and displaying it.
Is connected. The drain electrode 6 of the TFT 1 is connected to the pixel electrode 4, and the source electrode 5 is connected to the source line 3. Note that the TFT 1 is formed on the gate wiring 2. The gate wiring 2 has an opening 20 near the intersection with the source wiring 3. In the region of the opening 20, a part of the source electrode 5 of the TFT 1, the source wiring 3, and the like are present. Further, between the adjacent gate wirings 2,
An additional capacitance line 8 is formed in parallel with the gate line 2.
【００１８】なお、ゲート配線２とソース配線３との交
差部付近でゲート配線２が広くなっているのは、ゲート
配線２の幅を同じようにするために突出させているので
あり、容量を減らさず、信号遅延をおこさないようにす
るために設けている。The reason why the width of the gate wiring 2 is wide near the intersection of the gate wiring 2 and the source wiring 3 is that the gate wiring 2 is made to protrude in order to make the width of the gate wiring 2 the same. It is provided so as not to reduce the signal and to prevent signal delay.
【００１９】次に、図２に基づいて、ＴＦＴ１の断面構
造およびゲート配線２の開口部２０の断面について説明
する。ガラスなどの透明な絶縁性基板９上に、ゲート配
線２とソース配線３との交差部付近で開口部２０を有す
るゲート配線２が形成されている。ゲート配線２は、そ
の上に構成されたＴＦＴ１のゲート電極を兼ねている。
この配設されたゲート配線２を覆って、酸化タンタル
（Ｔａ2Ｏ5）からなる第１のゲート絶縁膜１１が形成さ
れ、第１のゲート絶縁膜１１の上全面を覆って、窒化シ
リコン（ＳｉＮｘ）からなる第２のゲート絶縁膜１２が
形成されている。第２のゲート絶縁膜１２上でゲート配
線２の形成位置と一部重なるように真性アモルファスシ
リコン（以下、ａ−Ｓｉ（ｉ）とする）からなる半導体
層１３が形成されている。半導体層１３の中央部には、
ＳｉＮｘからなるエッチングストッパ層１５が形成され
ている。半導体層１３のエッチングストッパ層１５を挟
んで両側上には、ｎ+型アモルファスシリコン（以下、
ａ−Ｓｉ（ｎ+）とする）からなるコンタクト層１４が
エッチングストッパ層１５上で分断されて形成されてい
る。コンタクト層１４の一方を覆ってソース配線３およ
びソース電極５が形成されており、コンタクト層１４の
他方を覆って、ドレイン電極６が形成され、第２のゲー
ト絶縁膜１２上に形成された酸化インジウム・スズ（Ｉ
ＴＯ）からなる画素電極４と接続されている。Next, a cross-sectional structure of the TFT 1 and a cross-section of the opening 20 of the gate wiring 2 will be described with reference to FIG. On a transparent insulating substrate 9 made of glass or the like, the gate wiring 2 having an opening 20 near the intersection of the gate wiring 2 and the source wiring 3 is formed. The gate wiring 2 also serves as a gate electrode of the TFT 1 formed thereon.
A first gate insulating film 11 made of tantalum oxide (Ta 2 O 5 ) is formed to cover the arranged gate wiring 2, and to cover the entire upper surface of the first gate insulating film 11, A second gate insulating film 12 made of SiNx) is formed. A semiconductor layer 13 made of intrinsic amorphous silicon (hereinafter referred to as a-Si (i)) is formed on the second gate insulating film 12 so as to partially overlap the position where the gate wiring 2 is formed. In the center of the semiconductor layer 13,
An etching stopper layer 15 made of SiNx is formed. On both sides of the etching stopper layer 15 of the semiconductor layer 13, n + -type amorphous silicon (hereinafter, referred to as
A contact layer 14 made of a-Si (n + ) is divided on the etching stopper layer 15 and formed. The source line 3 and the source electrode 5 are formed to cover one of the contact layers 14, and the drain electrode 6 is formed to cover the other of the contact layer 14, and the oxidation formed on the second gate insulating film 12 is performed. Indium tin (I
TO) is connected to the pixel electrode 4.
【００２０】図２にゲート配線２の開口部２０のＸ−Ｘ
断面を示す。開口部２０のＸ−Ｘ断面は、ＴＦＴ１のソ
ース電極５、ソース配線３、第１および第２のゲート絶
縁膜１１、１２に覆われている。図３にゲート配線２の
開口部２０のＹ−Ｙ断面を示す。開口部２０のＹ−Ｙ断
面は、ソース配線３、第１および第２のゲート絶縁膜１
１、１２に覆われている。図４にゲート配線２の開口部
２０のＺ−Ｚ断面を示す。開口部２０のＺ−Ｚ断面は、
第１および第２のゲート絶縁膜１１、１２に覆われてい
る。このように、ゲート配線２の開口部２０は場所によ
り、ＴＦＴ１の一部、ソース配線３、第１および第２の
ゲート絶縁膜１１、１２に覆われている。FIG. 2 shows XX of the opening 20 of the gate wiring 2.
3 shows a cross section. The XX cross section of the opening 20 is covered with the source electrode 5 and the source wiring 3 of the TFT 1 and the first and second gate insulating films 11 and 12. FIG. 3 shows a YY cross section of the opening 20 of the gate wiring 2. The YY cross section of the opening 20 is formed by the source wiring 3, the first and second gate insulating films 1.
1 and 12. FIG. 4 shows a ZZ cross section of the opening 20 of the gate wiring 2. The ZZ cross section of the opening 20 is
It is covered with first and second gate insulating films 11 and 12. As described above, the opening 20 of the gate wiring 2 is partially covered by the TFT 1, the source wiring 3, and the first and second gate insulating films 11 and 12.
【００２１】上記構造を有するアクティブマトリクス基
板の製造方法を図２に基づいて説明する。まず、ガラス
などの透明な絶縁性基板９上に、Ｔａを堆積させて、ゲ
ート配線２とソース配線３との交差部付近で開口部２０
を有するゲート配線２をパターンニングする。ゲート配
線２の表面を陽極酸化して、第１のゲート絶縁膜１１を
形成する。次に、ＳｉＮｘ層を、第２のゲート絶縁膜１
２、ａ−Ｓｉ（ｉ）層となる半導体層１３およびエッチ
ングストッパ層１５の順に連続的に被着して、パターン
ニングして、各層を形成する。このような状態の基板上
に、コンタクト層１４となるａ−Ｓｉ（ｎ+）を被着さ
せ、上記のａ−Ｓｉ（ｉ）とともに、パターンニング
し、半導体層１３およびコンタクト層１４を形成する。A method for manufacturing an active matrix substrate having the above structure will be described with reference to FIG. First, Ta is deposited on a transparent insulating substrate 9 such as glass, and an opening 20 is formed in the vicinity of the intersection between the gate wiring 2 and the source wiring 3.
Is patterned. The surface of the gate wiring 2 is anodized to form a first gate insulating film 11. Next, an SiNx layer is formed on the second gate insulating film 1.
2. A semiconductor layer 13 to be an a-Si (i) layer and an etching stopper layer 15 are successively applied in this order and patterned to form each layer. On the substrate in such a state, a-Si (n + ) serving as the contact layer 14 is applied and patterned together with the a-Si (i) to form the semiconductor layer 13 and the contact layer 14. .
【００２２】次に、ＩＴＯをスパッタ法で成膜し、パタ
ーンニングして、画素電極４を形成する。さらに、Ｔｉ
をスパッタ法により成膜し、パターンニングして、ソー
ス配線３、ソース電極５およびドレイン電極６を形成す
る。なお、実施形態１ではエッチングストッパ層１５を
設けた構造としているが、エッチングストッパ層１５が
なくても良い。Next, a pixel electrode 4 is formed by forming a film of ITO by sputtering and patterning it. Furthermore, Ti
Is formed by sputtering and patterned to form a source wiring 3, a source electrode 5, and a drain electrode 6. Although the structure in which the etching stopper layer 15 is provided in the first embodiment, the etching stopper layer 15 may not be provided.
【００２３】このような構成により、ゲート配線２上に
ＴＦＴ１が構成されているアクティブマトリクス型液晶
表示装置において、輝点となっいている欠陥を容易に修
正できる。With such a configuration, in the active matrix type liquid crystal display device in which the TFT 1 is formed on the gate wiring 2, it is possible to easily correct a defect which is a bright spot.
【００２４】また、次に説明するように、ゲート配線と
ソース配線間でのリークを発生し難くするために、ゲー
ト配線を電気化学的手段などによって表面に陽極酸化膜
のような膜を形成して不働態化を行い、なおかつ、絶縁
膜を形成するという手法が用いられている。しかし本発
明により、発生したリーク箇所を容易に回避できること
から、表面を不働態化する必要もなくなるため、プロセ
スの短縮化が図られ、コスト低減につながる。As described below, in order to prevent a leak between the gate wiring and the source wiring from occurring, a film such as an anodic oxide film is formed on the surface of the gate wiring by electrochemical means or the like. A technique of performing passivation and forming an insulating film has been used. However, according to the present invention, since a generated leak portion can be easily avoided, it is not necessary to passivate the surface, so that the process can be shortened and the cost can be reduced.
【００２５】（実施形態２）次に、ノーマリーホワイト
のアクティブマトリクス型液晶表示装置である実施形態
１において、ＴＦＴ特性不良、画素電極と信号配線との
リーク、ＴＦＴ近傍の走査配線と信号配線との交差部で
発生するリークなどにより、黒画面、単色画面で輝点と
なって見える画素電極の欠陥修正方法について図５を用
いて説明する。(Embodiment 2) Next, in Embodiment 1, which is a normally white active matrix type liquid crystal display device, a TFT characteristic defect, a leak between a pixel electrode and a signal wiring, a scanning wiring and a signal wiring near a TFT, and so on. A method for correcting a defect of a pixel electrode that appears as a bright spot on a black screen or a monochrome screen due to a leak or the like generated at the intersection of the above will be described using FIG.
【００２６】上記の輝点を探し、欠陥の画素電極４を特
定する。そして、ＴＦＴ１を有するゲート配線２の開口
部２０の上側で、その画素電極４のＴＦＴ１を挟むよう
に、開口部２０の上側の両側２箇所（図５のＡ）でレー
ザー照射を行い、Ａ−Ａ間でゲート配線を切断する。こ
の切断されたゲート配線を２１とする。さらに、そのＴ
ＦＴ１のソース電極５、ドレイン電極６をそれぞれ切断
されたゲート配線２１を介して、レーザー照射により溶
接して、導通させる。開口部２０の上側とは、図５のＡ
側の方向である。The above-mentioned bright spot is searched for, and the defective pixel electrode 4 is specified. Then, laser irradiation is performed at two places (A in FIG. 5) on both sides above the opening 20 so as to sandwich the TFT 1 of the pixel electrode 4 above the opening 20 of the gate wiring 2 having the TFT 1. The gate wiring is cut between A. The cut gate wiring is designated as 21. Furthermore, the T
The source electrode 5 and the drain electrode 6 of the FT 1 are welded by laser irradiation via the cut gate wiring 21 to conduct. The upper side of the opening 20 corresponds to A in FIG.
Side direction.
【００２７】この修正方法では、ソース配線３が切断さ
れたゲート配線２１を介して、画素電極４と接続される
ことになる。従って、その画素電極４はソース信号と連
動するため、黒画面、単色画面では輝点となって見える
ことはなくなる。従って、この修正方法では、容易に常
時輝点と状態が解除できる。さらにこの修正方法によ
り、例えば欠陥の場所、色、個数、欠陥の連なりなどに
関して良品となる基準を満たす可能性が高まり、良品率
が向上する。In this correction method, the source line 3 is connected to the pixel electrode 4 via the cut gate line 21. Therefore, since the pixel electrode 4 is linked with the source signal, it does not appear as a bright point on a black screen or a monochrome screen. Therefore, with this correction method, the bright spot and the state can always be canceled easily. Further, this repair method increases the possibility of satisfying the criteria for non-defective products with respect to, for example, the location, color, number of defects, and the sequence of defects, and improves the non-defective product rate.
【００２８】（実施形態３）次に、ノーマリーホワイト
のアクティブマトリクス型液晶表示装置である実施形態
１において、ソース配線２とゲート配線３の交差部で発
生すリークにより、黒画面、単色画面で輝点となって見
える画素の欠陥修正方法について、図６を用いて説明す
る。(Embodiment 3) Next, in Embodiment 1 which is a normally white active matrix type liquid crystal display device, a black screen and a monochrome screen are displayed due to a leak generated at the intersection of the source wiring 2 and the gate wiring 3. A method for correcting a defect of a pixel which appears as a bright spot will be described with reference to FIG.
【００２９】図６に示すように、ゲート配線２とソース
配線３の交差部で、開口部２０の下側の箇所Ｃでリーク
が発生しているために、輝点となっている。この場合、
非ＴＦＴ１側であるゲート配線２の開口部２０の下側
で、開口部２０の下側の両側２箇所（図６のＢ）でレー
ザー照射を行い、Ｂ−Ｂ間でゲート配線を切断する。こ
の切断されたゲート配線を２２とする。開口部２０の下
側とは、図６のＢ側の方向である。As shown in FIG. 6, at the intersection of the gate wiring 2 and the source wiring 3, a leak has occurred at a location C below the opening 20, so that it is a bright spot. in this case,
Laser irradiation is performed at two places (B in FIG. 6) on both sides below the opening 20 of the gate wiring 2 on the non-TFT 1 side, and the gate wiring is cut between BB. The cut gate wiring is designated as 22. The lower side of the opening 20 is the direction of the side B in FIG.
【００３０】この修正方法により、この画素電極４は正
常に動作するため、黒画面、単色画面では輝点となって
見えることはなくなる。従って、この修正方法では、容
易に常時輝点となる状態が解除できる。さらにこの修正
方法により、例えば欠陥の場所、色、個数、欠陥の連な
りなどに関して良品となる基準を満たす可能性が高ま
り、良品率が向上する。According to this correction method, since the pixel electrode 4 operates normally, it does not appear as a bright point on a black screen or a monochrome screen. Therefore, according to this correction method, the state that always becomes a bright spot can be easily released. Further, this repair method increases the possibility of satisfying the criteria for non-defective products with respect to, for example, the location, color, number of defects, and the sequence of defects, and improves the non-defective product rate.
【００３１】上記の実施形態１から３では、ノーマリー
ホワイトのアクティブマトリクス型液晶表示装置につい
て説明したが、ノーマリーブラックのアクティブマトリ
クス型液晶表示装置でも、本発明は実施可能である。ま
た、上記の実施形態１から３では、付加容量配線が対向
電極に接続されている構造であるが、付加容量が隣のゲ
ート配線とで形成されている構造（Ｃｓ ｏｎ Ｇａｔ
ｅ）でも、本発明は実施可能である。In the first to third embodiments, a normally white active matrix type liquid crystal display device has been described. However, the present invention can also be implemented in a normally black active matrix type liquid crystal display device. In the first to third embodiments, the additional capacitance line is connected to the counter electrode. However, the structure in which the additional capacitance is formed with the adjacent gate line (Cs on Gat) is used.
Even in e), the present invention can be implemented.
【００３２】[0032]
【発明の効果】本発明の構成によれば、工程内でのダス
ト、製造装置の精度により起こるＴＦＴの特性不良、ま
たはＴＦＴ近傍のゲート配線とソース配線との交差部で
リークが生じたとき、またはソース配線と画素電極との
間で欠陥が生じたとき、画素電極に正常な信号が伝わら
なくて、黒画面、単色画面にて輝点となる画素電極を、
修正することにより、その画素電極が正常なソース配線
の信号と連動させ、輝点という状態を解除できる。According to the structure of the present invention, when dust in the process, defective characteristics of the TFT caused by the precision of the manufacturing apparatus, or leakage occurs at the intersection between the gate wiring and the source wiring near the TFT, Or, when a defect occurs between the source wiring and the pixel electrode, a normal signal is not transmitted to the pixel electrode, and a black screen, a pixel electrode that becomes a bright spot on a monochrome screen,
By performing the correction, the pixel electrode is linked with the signal of the normal source wiring, and the state of the bright spot can be released.
【００３３】ＴＦＴの特性不良、またはＴＦＴ近傍のゲ
ート配線とソース配線との交差部で欠陥（Ｓ−Ｇリー
ク）が生じたとき、またはソース配線と画素電極との間
で欠陥が生じたとき、ＴＦＴを有するゲート配線の開口
部の上側で、その画素電極のＴＦＴを挟むように、開口
部の上側の両側２箇所でレーザー照射を行い、ゲート配
線を切断する。さらに、そのＴＦＴのソース電極、ドレ
イン電極をそれぞれ切断されたゲート配線を介して、レ
ーザー照射にて溶接して、導通させる。これで、ソース
配線が、切断されたゲート配線を介して、画素電極と接
続されることになる。従って、その画素電極はソース信
号と連動するため、黒画面、単色画面では輝点となって
見えることはなくなる。When a TFT characteristic defect or a defect (SG leak) occurs at the intersection of the gate line and the source line near the TFT, or when a defect occurs between the source line and the pixel electrode, Above the opening of the gate wiring having the TFT, laser irradiation is performed at two places on both sides above the opening so as to sandwich the TFT of the pixel electrode, and the gate wiring is cut. Further, the source electrode and the drain electrode of the TFT are welded by laser irradiation via the cut gate wirings to conduct. Thus, the source wiring is connected to the pixel electrode via the cut gate wiring. Therefore, since the pixel electrode is linked with the source signal, it does not appear as a bright point on a black screen or a monochrome screen.
【００３４】ＴＦＴから離れた非ＴＦＴ側のソース配線
とゲート配線の交差部で欠陥（Ｓ−Ｇリーク）が生じた
とき、非ＴＦＴ側であるゲート配線の開口部の下側で、
開口部の下側の両側２箇所でレーザー照射を行い、ゲー
ト配線を切断する。従って、この修正方法により、この
画素電極は正常に動作するため、黒画面、単色画面では
輝点となって見えることはなくなる。When a defect (SG leak) occurs at the intersection of the source line and the gate line on the non-TFT side, which is remote from the TFT, when a defect (SG leakage) occurs below the opening of the gate line on the non-TFT side,
Laser irradiation is performed at two places on both sides below the opening to cut the gate wiring. Therefore, since the pixel electrode operates normally by this correction method, it does not appear as a bright point on a black screen or a monochrome screen.
【００３５】上記の２つの修正方法では、容易に常時輝
点となる状態が解除できる。さらにこの修正方法によ
り、例えば欠陥の場所、色、個数、欠陥の連なりなどに
関して良品となる基準を満たす可能性が高まり、良品率
が向上する。With the above-described two correction methods, the state that always becomes a bright spot can be easily canceled. Further, this repair method increases the possibility of satisfying the criteria for non-defective products with respect to, for example, the location, color, number of defects, and the sequence of defects, and improves the non-defective product rate.
【図１】実施形態１のアクティブマトリクス基板の一画
素電極の平面図である。FIG. 1 is a plan view of one pixel electrode of an active matrix substrate according to a first embodiment.
【図２】図１のＸ−Ｘ断面図である。FIG. 2 is a sectional view taken along line XX of FIG.
【図３】図１のＹ−Ｙ断面図である。FIG. 3 is a sectional view taken along line YY of FIG. 1;
【図４】図１のＺ−Ｚ断面図である。FIG. 4 is a sectional view taken along the line ZZ of FIG. 1;
【図５】実施形態２の修正方法を示す図である。FIG. 5 is a diagram illustrating a correction method according to a second embodiment.
【図６】実施形態３の修正方法を示す図である。FIG. 6 is a diagram illustrating a correction method according to a third embodiment.
【図７】アクティブマトリクス型液晶表示装置の等価回
路図を示す。FIG. 7 shows an equivalent circuit diagram of an active matrix liquid crystal display device.
１ ＴＦＴ ２ ２１ ２２ ゲート配線 ３ ソース配線 ４ 画素電極 ５ ソース電極 ６ ドレイン電極 ７ 付加容量 ８ 付加容量配線 ９ 絶縁性基板 １０ ゲート電極 １１ 第１のゲート絶縁膜 １２ 第２のゲート絶縁膜 １３ 半導体層 １４ コンタクト層 １５ エッチングストッパ層 ２０ 開口部 DESCRIPTION OF SYMBOLS 1 TFT 2 21 22 Gate wiring 3 Source wiring 4 Pixel electrode 5 Source electrode 6 Drain electrode 7 Additional capacitance 8 Additional capacitance wiring 9 Insulating substrate 10 Gate electrode 11 First gate insulating film 12 Second gate insulating film 13 Semiconductor layer 14 contact layer 15 etching stopper layer 20 opening
Claims (3)
前記走査配線と直交するように構成された複数の信号配
線と、前記走査配線と前記信号配線との交差部近傍にス
イッチング素子とが設けられ、画素電極が前記スイッチ
ング素子のドレイン電極に接続されたアクティブマトリ
クス型液晶表示装置において、 前記走査配線と前記信号配線との交差部で、前記信号配
線を挟んで両側の領域に開口部を有する前記走査配線が
形成され、 前記開口部は絶縁膜に覆われ、 前記絶縁膜に覆われた前記開口部の領域には、前記スイ
ッチング素子の一部または前記信号配線に覆われている
箇所が存在することを特徴とするアクティブマトリクス
型液晶表示装置。A plurality of scanning lines provided on a substrate;
A plurality of signal wirings configured to be orthogonal to the scanning wirings, a switching element is provided near an intersection of the scanning wirings and the signal wirings, and a pixel electrode is connected to a drain electrode of the switching element. In the active matrix type liquid crystal display device, at the intersection of the scanning wiring and the signal wiring, the scanning wiring having openings in regions on both sides of the signal wiring is formed, and the opening is covered with an insulating film. The active matrix type liquid crystal display device, wherein a part of the switching element or a portion covered by the signal wiring exists in a region of the opening covered by the insulating film.
型液晶表示装置の欠陥修正方法であって、前記スイッチ
ング素子の特性不良、または前記スイッチング素子近傍
の前記走査配線と前記信号配線との交差部で欠陥が生じ
たとき、または前記信号配線と前記画素電極との間で欠
陥が生じたとき、前記開口部の前記スイッチング素子側
の領域にある前記走査配線を、前記開口部の両側で切断
し、 前記切断された走査配線を介して、前記信号配線と前記
画素電極を接続することを特徴とするアクティブマトリ
クス型液晶表示装置の欠陥修正方法。2. The method for repairing defects in an active matrix type liquid crystal display device according to claim 1, wherein a defective characteristic of the switching element or an intersection between the scanning wiring and the signal wiring near the switching element. When a defect occurs, or when a defect occurs between the signal wiring and the pixel electrode, the scanning wiring in the area of the opening on the switching element side is cut on both sides of the opening, A defect repair method for an active matrix type liquid crystal display device, wherein the signal wiring and the pixel electrode are connected via the cut scanning wiring.
型液晶表示装置の欠陥修正方法であって、非スイッチン
グ素子側で前記走査配線と前記信号配線との交差部で欠
陥が生じたとき、前記開口部の前記非スイッチング素子
側の領域にある前記走査配線を、前記開口部の両側で切
断することを特徴とするアクティブマトリクス型液晶表
示装置の欠陥修正方法。3. The defect correcting method for an active matrix type liquid crystal display device according to claim 1, wherein, when a defect occurs at an intersection between the scanning wiring and the signal wiring on a non-switching element side, the opening is formed. A method of repairing a defect in an active matrix liquid crystal display device, wherein the scanning wiring in a region of the portion on the non-switching element side is cut on both sides of the opening.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28538097A JP3335567B2 (en) | 1997-10-17 | 1997-10-17 | Active matrix type liquid crystal display device and its defect repair method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28538097A JP3335567B2 (en) | 1997-10-17 | 1997-10-17 | Active matrix type liquid crystal display device and its defect repair method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11119253A true JPH11119253A (en) | 1999-04-30 |
| JP3335567B2 JP3335567B2 (en) | 2002-10-21 |
Family
ID=17690805
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28538097A Expired - Fee Related JP3335567B2 (en) | 1997-10-17 | 1997-10-17 | Active matrix type liquid crystal display device and its defect repair method |
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| Country | Link |
|---|---|
| JP (1) | JP3335567B2 (en) |
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| US7072005B2 (en) | 2002-08-21 | 2006-07-04 | Chi Mei Optoelectronics Corp. | IPS LCD and repair method of cutting defective pixel electrode by forming window in capacitor storage circuit |
| JP2008268860A (en) * | 2007-04-17 | 2008-11-06 | Beijing Boe Optoelectronics Technology Co Ltd | Liquid crystal display, and manufacturing method and repairing method thereof |
| WO2009001578A1 (en) * | 2007-06-28 | 2008-12-31 | Sharp Kabushiki Kaisha | Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, and method of manufacturing liquid crystal panel |
| JPWO2007097068A1 (en) * | 2006-02-24 | 2009-07-09 | シャープ株式会社 | Active matrix substrate, display device, television receiver |
| JP2009186986A (en) * | 2008-02-04 | 2009-08-20 | Beijing Boe Optoelectronics Technology Co Ltd | Pixel structure of array substrate of thin film transistor liquid crystal display |
| JP2009265348A (en) * | 2008-04-24 | 2009-11-12 | Ips Alpha Technology Ltd | Display device and method of manufacturing the same |
| EP2120089A1 (en) * | 2007-02-09 | 2009-11-18 | Sharp Kabushiki Kaisha | Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, active matrix substrate manufacturing method, and liquid crystal panel manufacturing method |
| US8168980B2 (en) | 2006-02-24 | 2012-05-01 | Sharp Kabushiki Kaisha | Active matrix substrate, display device, television receiver, manufacturing method of active matrix substrate, forming method of gate insulating film |
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