KR20050046058A - 반도체 소자의 금속 배선 형성 방법 - Google Patents
반도체 소자의 금속 배선 형성 방법 Download PDFInfo
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- KR20050046058A KR20050046058A KR1020030080036A KR20030080036A KR20050046058A KR 20050046058 A KR20050046058 A KR 20050046058A KR 1020030080036 A KR1020030080036 A KR 1020030080036A KR 20030080036 A KR20030080036 A KR 20030080036A KR 20050046058 A KR20050046058 A KR 20050046058A
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- film
- gas
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- hard mask
- dielectric constant
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (6)
- 콘택 플러그가 형성된 반도체 기판상에 식각 정지막, 저 유전율 절연막, 캐핑막, 금속 하드 마스크막 및 감광막 패턴을 순차적으로 형성하는 단계;상기 금속 하드 마스크막을 제거하는 단계;상기 캐핑막 및 상기 저 유전율 절연막을 순차적으로 제거하여 트렌치를 형성하는 단계;상기 트렌치 하부의 상기 식각 정지막을 제거하는 단계;상기 트렌치를 구리막으로 매립하는 단계; 및평탄화 공정을 실시하여 상기 캐핑막 상의 상기 금속 하드 마스크막 및 상기 구리막을 제거하여 금속배선을 형성하는 단계를 포함하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서,상기 금속 하드 마스크막은 300 내지 800Å 두께의 TiN막을 사용하고, 상기 캐핑막은 1000 내지 1500Å두께의 산화막을 사용하고, 상기 저 유전율막은 유전율이 2 내지 4인 OSG막을 사용하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서,상기 금속 하드 마스크막은 플라즈마 식각을 통해 제거하되, 500 내지 800Watt의 파워와 10 내지 50mT의 압력하에서 30 내지 50sccm의 Cl가스, 40 내지 60sccm의 BCl3가스 및 20 내지 40sccm의 N2가스를 유입하여 실시하는 반도체 소자의 금속배선 형성 방법.
- 제 1 항에 있어서,상기 캐핑막은 C/F율이 높은 건식 식각을 통해 제거하되, 30 내지 100mT의 압력과 1500 내지 2000Watt의 상부 파워와 1000 내지 1500Watt의 하부 파워하에서 10 내지 20sccm의 C4F8가스, 5 내지 15sccm의 O2가스 및 300 내지 600sccm의 Ar가스를 유입하여 실시하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서,상기 저 유전율막의 제거는 30 내지 50mT의 압력과 1000 내지 1500Watt의 상부 파워와 1500 내지 2000Watt의 하부 파워하에서 3 내지 5sccm의 C4F8가스, 100 내지 200sccm의 N2가스 및 300 내지 600sccm의 Ar가스를 유입하여 실시하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서, 상기 트렌치 하부의 상기 식각 정지막 제거후,상기 감광막 패턴을 바이어스드 O2 플라즈마를 이용한 건식식각을 통해 제거하는 단계를 더 포함하는 반도체 소자의 금속 배선 형성 방법.
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Application Number | Priority Date | Filing Date | Title |
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KR10-2003-0080036A KR100539153B1 (ko) | 2003-11-13 | 2003-11-13 | 반도체 소자의 금속 배선 형성 방법 |
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KR10-2003-0080036A KR100539153B1 (ko) | 2003-11-13 | 2003-11-13 | 반도체 소자의 금속 배선 형성 방법 |
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KR20050046058A true KR20050046058A (ko) | 2005-05-18 |
KR100539153B1 KR100539153B1 (ko) | 2005-12-26 |
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KR10-2003-0080036A KR100539153B1 (ko) | 2003-11-13 | 2003-11-13 | 반도체 소자의 금속 배선 형성 방법 |
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Cited By (1)
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KR100698743B1 (ko) * | 2005-12-14 | 2007-03-23 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100698743B1 (ko) * | 2005-12-14 | 2007-03-23 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
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