KR20040059925A - Method for forming tungsten hard mask for oxide etching - Google Patents

Method for forming tungsten hard mask for oxide etching Download PDF

Info

Publication number
KR20040059925A
KR20040059925A KR1020020086430A KR20020086430A KR20040059925A KR 20040059925 A KR20040059925 A KR 20040059925A KR 1020020086430 A KR1020020086430 A KR 1020020086430A KR 20020086430 A KR20020086430 A KR 20020086430A KR 20040059925 A KR20040059925 A KR 20040059925A
Authority
KR
South Korea
Prior art keywords
tungsten
etching
hard mask
etched
oxide layer
Prior art date
Application number
KR1020020086430A
Other languages
Korean (ko)
Other versions
KR100928528B1 (en
Inventor
권일영
Original Assignee
주식회사 하이닉스반도체
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1020020086430A priority Critical patent/KR100928528B1/en
Publication of KR20040059925A publication Critical patent/KR20040059925A/en
Application granted granted Critical
Publication of KR100928528B1 publication Critical patent/KR100928528B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: A method for forming a tungsten hard mask is provided to prevent damage of tungsten sidewall by etching an oxide layer using the tungsten hard mask. CONSTITUTION: A substance layer without containing oxygen source is deposited on an oxide layer as an etch object layer. A tungsten film is deposited on the substance layer. The tungsten film is partially etched using a photoresist pattern as a mask. The lower of the tungsten film is etched using chemical solutions without damage of the tungsten sidewall, thereby forming a tungsten hard mask.

Description

산화막 식각을 위한 텅스텐 하드마스크 형성방법{Method for forming tungsten hard mask for oxide etching}Method for forming tungsten hard mask for oxide etching

본 발명은 반도체소자의 제조공정에 관한 것으로, 특히 산화막 식각을 위한 텅스텐 하드마스크 형성방법에 관한 것이다.The present invention relates to a manufacturing process of a semiconductor device, and more particularly, to a method of forming a tungsten hard mask for etching an oxide film.

현재 반도체 제조공정중 산화막 식각시 사용가능한 배리어(Barrier)로는 포토레지스트와 폴리실리콘이 이용되고 있다. 근래에 들어서는 텅스텐 및 TiN과 같은 금속배리어가 대두되고 있다. 그러나 텅스텐을 바로 산화막위에 증착하여 식각을 할때는 산소가 산화막에서 빠져나와(out-gassing) 텅스텐박에 손상을 주게 되어 배리어로서의 역할을 할 수 없게 된다.Currently, photoresists and polysilicon are used as barriers that can be used to etch oxides in semiconductor manufacturing processes. In recent years, metal barriers such as tungsten and TiN have emerged. However, when tungsten is directly deposited on the oxide film and etched, oxygen is released from the oxide film (out-gassing) and damages the tungsten foil, so that it cannot serve as a barrier.

종래의 기술에 있어서는 도1에 보이는 바와 같이 하부에 심한 손상이 발생함을 알 수 있다. 이에 대한 해결책으로 전통적으로 사용되고 있는 방법으로서SF6/N2에 Cl을 첨가하는 방법이 있으나, 포토레지스트 배리어로 식각해야 하는 상황에서는 포토레지스트 선택비가 작아 텅스텐 자체가 무너지는 문제가 있다.In the prior art, it can be seen that severe damage occurs in the lower part as shown in FIG. As a solution to this problem, there is a method of adding Cl to SF6 / N2 as a conventional method. However, in the situation where etching is required as a photoresist barrier, the selectivity of the photoresist is small and tungsten itself collapses.

본 발명은 상기 문제점을 해결하기 위한 것으로써, 텅스텐을 배리어로 이용하여 산화막을 식각할 수 있도록 하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법을 제공하는 것을 그 목적으로 한다.An object of the present invention is to provide a method of forming a tungsten hard mask for etching an oxide film to enable etching of the oxide film using tungsten as a barrier.

도1은 종래기술의 문제점을 도시한 도면.1 shows a problem of the prior art;

상기 목적을 달성하기 위한 본 발명의 산화막 식각을 위한 텅스텐 하드마스크 형성방법은 식각할 산화막위에 산소 소오스가 없는 물질을 증착한 후, 이위에 하드마스크로 사용할 텅스텐을 증착하는 단계와 상기 텅스텐위에 소정의 포토레지스트패턴을 형성하는 단계, 상기 포토레지스트패턴을 배리어로 이용하여 텅스텐을 식각하는 단계 및 텅스텐 측벽을 손상시키지 않는 화학물질을 이용하여 텅스텐 하부막을 식각하는 단계를 포함하여 이루어지는 것을 특징으로 한다.In order to achieve the above object, a method of forming a tungsten hard mask for etching an oxide layer of the present invention includes depositing a material free of oxygen source on an oxide layer to be etched, and then depositing tungsten for use as a hard mask on the oxide layer to be etched. Forming a photoresist pattern; etching the tungsten using the photoresist pattern as a barrier; and etching the tungsten underlayer using a chemical that does not damage the tungsten sidewalls.

이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부된 도면을 참조하여 설명하기로 한다.DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

본 발명은 산화막 식각시 산소(Oxygen) 소오스가 없는 Ti, TiN, Si3N4와 같은 막을 식각할 산화막위에 증착하고 이위에 텅스텐을 증착하여 텅스텐을 배리어로 식각하고 텅스텐 하부막은 텅스텐을 손상시키지 않는 화학물질로 식각하는 것이다.According to the present invention, a film such as Ti, TiN, and Si 3 N 4 having no oxygen source is deposited on an oxide layer to be etched and tungsten is deposited thereon to etch tungsten as a barrier and the tungsten underlayer does not damage tungsten. Etch with chemicals.

이하, 본 발명을 더욱 상세히 설명한다.Hereinafter, the present invention will be described in more detail.

우선, 식각해야 할 산화막위에 Ti, TiN, Si3N4, Al, Ru, Pt, Ir, Hf, TaN, TiSiN, TiAlN, TaSiN등과 같이 산소 소오스가 없는 물질을 증착한 후, 이위에 하드마스크로 사용할 텅스텐막을 증착한다.First, deposit an oxygen-free material such as Ti, TiN, Si 3 N 4 , Al, Ru, Pt, Ir, Hf, TaN, TiSiN, TiAlN, TaSiN on the oxide film to be etched, and then use a hard mask on it. The tungsten film to be used is deposited.

이어서 텅스텐막 상에 필요할 경우 반사방지막(ARC;Anti-Reflective Coating; 이아 ARC라 함)을 형성한 후, 포토레지스트를 도포하고 노광 및 현상을 통해 소정의 패턴을 형성한다.Subsequently, if necessary, an anti-reflective coating (ARC; anti-ARC) is formed on the tungsten film, and then a photoresist is applied and a predetermined pattern is formed through exposure and development.

다음에 상기 포토레지스트 패턴을 식각배리어로 이용하여 SF6/N2(대략 10:1)를 식각제로 플라즈마 방식에 의해 텅스텐을 식각한다. 이때, 텅스텐 하부에 Ti, TiN, Pt, Ir, Ru가 증착된 경우에는 식각선택비가 자연적으로 확보되므로 (TiF3는 비휘발성이므로) 문제가 없지만 Si3N4가 증착된 경우에는 텅스텐 하부막에 대한 손상을 최소화하기 위하여 EPD(End Point Detection)시스템을 활용하여 텅스텐의 식각을 진행한다.Next, tungsten is etched by the plasma method using SF 6 / N 2 (approximately 10: 1) as an etchant using the photoresist pattern as an etching barrier. At this time, when Ti, TiN, Pt, Ir, and Ru are deposited under the tungsten, the etching selectivity is naturally secured (since TiF 3 is nonvolatile), but when Si 3 N 4 is deposited, In order to minimize the damage, tungsten is etched using the EPD (End Point Detection) system.

이어서 텅스텐 측벽을 손상시키지 않는 화학물질을 선택하여 텅스텐 하부막을 식각한다. 이때, 플루오르(Fluorine)가 많이 함유된 물질은 사용하지 않도록 해야 한다. 또는 불소가 함유되어 있더라도 패시베이션이 가능한 탄화플루오르(Fluoro-Carbon)계열의 플라즈마를 사용하도록 한다. 텅스텐 하부막으로 Ti, TiN, TaN, TiSiN, TiAlN, TaSiN을 사용한 경우에는 텅스텐을 식각하고 나서 Cl2또는 Cl2/BCl3로 식각한다.Subsequently, a chemical that does not damage the tungsten sidewall is selected to etch the tungsten underlayer. At this time, the material containing a lot of fluorine (Fluorine) should not be used. Alternatively, a fluorocarbon-based plasma capable of passivation may be used even if fluorine is contained. When Ti, TiN, TaN, TiSiN, TiAlN, TaSiN is used as the tungsten underlayer, tungsten is etched and then etched with Cl 2 or Cl 2 / BCl 3 .

이후, 공정에 따라서 포토레지스트 스트립을 진행하여 포토레지스트를 제거하고 순수하게 텅스텐만을 배리어로 사용하여 하부의 산화막을 식각하거나, 포토레지스트를 그대로 두고 산화막을 식각한다.Subsequently, the photoresist strip is processed to remove the photoresist, and pure oxide is etched using pure tungsten as a barrier, or the oxide layer is etched while the photoresist is left as it is.

산화막 식각이 완료된 후에는 포토레지스트가 남아 있지 않을 것이므로 과수가 포함된 화학물질을 이용하여 텅스텐을 제거하거나 SF6/N2를 사용하여 적절한 타겟으로 텅스텐을 제거하는 것이 바람직하다. 텅스텐 하부막으로 Si3N4와 귀금속을 사용한 경우에는 산화막 식각후 건식 방식으로 텅스텐을 제거한다.Since the photoresist will not remain after the oxide etching is completed, it is preferable to remove tungsten using a chemical containing fruit water or to remove tungsten with an appropriate target using SF6 / N2. When Si3N4 and a noble metal are used as the tungsten underlayer, tungsten is removed in a dry manner after etching the oxide layer.

본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

본 발명에 의하면, 텅스텐을 배리어로 사용하여 산화막을 식각해야 하는 공정에서 텅스텐의 측벽 손상없이 식각을 행할 수 있다.According to the present invention, etching can be performed without damaging the sidewalls of tungsten in the process of etching the oxide film using tungsten as a barrier.

Claims (7)

식각할 산화막위에 산소 소오스가 없는 물질을 증착한 후, 이위에 하드마스크로 사용할 텅스텐을 증착하는 단계;Depositing a material free of oxygen source on the oxide layer to be etched, and then depositing tungsten on the oxide layer to be used as a hard mask thereon; 상기 텅스텐위에 소정의 포토레지스트패턴을 형성하는 단계;Forming a predetermined photoresist pattern on the tungsten; 상기 포토레지스트패턴을 배리어로 이용하여 텅스텐을 식각하는 단계; 및Etching tungsten using the photoresist pattern as a barrier; And 텅스텐 측벽을 손상시키지 않는 화학물질을 이용하여 텅스텐 하부막을 식각하는 단계Etching the tungsten underlayer with a chemical that does not damage the tungsten sidewalls 를 포함하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법.Tungsten hard mask forming method for etching the oxide film comprising a. 제1항에 있어서,The method of claim 1, 상기 산소 소오스가 없는 물질은 Ti, TiN, Si3N4, Al, Ru, Pt, Ir, Hf, TaN, TiSiN, TiAlN, TaSiN등을 포함하는 것을 특징으로 하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법.The material without oxygen source is a method of forming a tungsten hard mask for etching an oxide layer, comprising Ti, TiN, Si 3 N 4 , Al, Ru, Pt, Ir, Hf, TaN, TiSiN, TiAlN, TaSiN, etc. . 제1항에 있어서,The method of claim 1, 상기 텅스텐은 SF6/N2를 이용하여 플라즈마 방식에 의해 식각하는 것을 특징으로 하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법.The tungsten is etched by the plasma method using SF 6 / N 2 by the tungsten hard mask forming method for etching the oxide film. 제1항에 있어서,The method of claim 1, 상기 텅스텐 하부막으로 Si3N4가 증착된 경우에는 텅스텐 하부막에 대한 손상을 최소화하기 위하여 EPD(End Point Detection)시스템을 활용하여 텅스텐의 식각을 진행하는 것을 특징으로 하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법.When Si 3 N 4 is deposited as the tungsten underlayer, tungsten hard for etching the oxide layer is characterized in that tungsten is etched using an end point detection (EPD) system to minimize damage to the tungsten underlayer. How to form a mask. 제1항에 있어서,The method of claim 1, 상기 텅스텐 하부막으로 Ti, TiN, TaN, TiSiN, TiAlN, TaSiN을 사용한 경우에는 텅스텐을 식각하고 나서 Cl2또는 Cl2/BCl3로 식각하는 것을 특징으로 하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법.In the case where Ti, TiN, TaN, TiSiN, TiAlN, TaSiN is used as the tungsten underlayer, tungsten is etched and then etched with Cl 2 or Cl 2 / BCl 3 . 제1항에 있어서,The method of claim 1, 상기 텅스텐 측벽을 손상시키지 않는 화학물질을 이용하여 텅스텐 하부막을 식각한 후에 상기 텅스텐을 배리어로 이용하여 상기 산화막을 식각하는 것을 특징으로 하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법.And etching the oxide layer using the tungsten as a barrier after etching the lower layer of tungsten using a chemical that does not damage the tungsten sidewalls. 제6항에 있어서,The method of claim 6, 상기 산화막 식각이 완료된 후에는 습식 또는 건식방식으로 텅스텐 및 하부막을 제거하는 것을 특징으로 하는 산화막 식각을 위한 텅스텐 하드마스크 형성방법.After the oxide film etching is completed, the tungsten hard mask forming method for the oxide film etching, characterized in that for removing the tungsten and the lower layer by a wet or dry method.
KR1020020086430A 2002-12-30 2002-12-30 Oxide etching method using tungsten hard mask KR100928528B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020020086430A KR100928528B1 (en) 2002-12-30 2002-12-30 Oxide etching method using tungsten hard mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020020086430A KR100928528B1 (en) 2002-12-30 2002-12-30 Oxide etching method using tungsten hard mask

Publications (2)

Publication Number Publication Date
KR20040059925A true KR20040059925A (en) 2004-07-06
KR100928528B1 KR100928528B1 (en) 2009-11-26

Family

ID=37351882

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020086430A KR100928528B1 (en) 2002-12-30 2002-12-30 Oxide etching method using tungsten hard mask

Country Status (1)

Country Link
KR (1) KR100928528B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100792409B1 (en) * 2004-10-12 2008-01-09 주식회사 하이닉스반도체 Method for fabrication of semiconductor device using tungsten layer to sacrificial hard mask
US7442648B2 (en) 2004-10-12 2008-10-28 Hynix Semiconductor Inc. Method for fabricating semiconductor device using tungsten as sacrificial hard mask

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100289655B1 (en) * 1998-06-30 2001-05-02 박종섭 Metal wiring formation method of semiconductor device
US6420099B1 (en) * 1999-08-02 2002-07-16 Infineon Technologies Ag Tungsten hard mask for dry etching aluminum-containing layers
KR100384864B1 (en) * 2000-12-07 2003-05-22 주식회사 하이닉스반도체 Method for forming gateelectrode in semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100792409B1 (en) * 2004-10-12 2008-01-09 주식회사 하이닉스반도체 Method for fabrication of semiconductor device using tungsten layer to sacrificial hard mask
US7442648B2 (en) 2004-10-12 2008-10-28 Hynix Semiconductor Inc. Method for fabricating semiconductor device using tungsten as sacrificial hard mask

Also Published As

Publication number Publication date
KR100928528B1 (en) 2009-11-26

Similar Documents

Publication Publication Date Title
US20100091424A1 (en) Method for reducing sidewall etch residue
US7807574B2 (en) Etching method using hard mask in semiconductor device
US20070090446A1 (en) Hardmask etch for gate polyetch
US5792672A (en) Photoresist strip method
CN111524795B (en) Self-aligned double patterning method and semiconductor structure formed by same
US7537998B2 (en) Method for forming salicide in semiconductor device
KR100388591B1 (en) Fine pattern formation method and semiconductor device or liquid crystal device manufacturing method employing this method
US6420099B1 (en) Tungsten hard mask for dry etching aluminum-containing layers
US5968711A (en) Method of dry etching A1Cu using SiN hard mask
KR100928528B1 (en) Oxide etching method using tungsten hard mask
US6214739B1 (en) Method of metal etching with in-situ plasma cleaning
JPH07161689A (en) Dry etching method
JP7219528B2 (en) Selective etching to reduce cone formation in shallow trench isolation
KR20060122578A (en) Method for forming hard mask in semiconductor memory device
JP2006276869A (en) Manufacturing method for semiconductor device
JP2002043421A (en) Method for manufacturing semiconductor device
KR100763711B1 (en) Method for forming metal line of semiconductor device
US20050014378A1 (en) Substrate patterning integration
KR20040059981A (en) Method for fabrication of semiconductor device using ArF photo-lithography capable of protecting tapered profile of hardmask
KR20030091452A (en) Method of forming pattern inhibiting pitting effect
KR100332647B1 (en) Method of forming a contact hole in a semiconductor device
KR20110076661A (en) Method for forming micropattern in semiconductor device
KR20040076982A (en) Method of manufacturing flash memory device
KR0172293B1 (en) Method of forming contact hole of semiconductor device
CN113582130A (en) Method for preparing MEMS device based on wafer

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E90F Notification of reason for final refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee