KR20030020301A - 오가노실리케이트 글래스의 이중 다마신 구조를 에칭하는방법 - Google Patents
오가노실리케이트 글래스의 이중 다마신 구조를 에칭하는방법 Download PDFInfo
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- KR20030020301A KR20030020301A KR1020027017338A KR20027017338A KR20030020301A KR 20030020301 A KR20030020301 A KR 20030020301A KR 1020027017338 A KR1020027017338 A KR 1020027017338A KR 20027017338 A KR20027017338 A KR 20027017338A KR 20030020301 A KR20030020301 A KR 20030020301A
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- etching
- layer
- dielectric layer
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- organosilicate
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- 238000005530 etching Methods 0.000 title claims abstract description 69
- 238000000034 method Methods 0.000 title claims abstract description 51
- 230000009977 dual effect Effects 0.000 title claims abstract description 26
- 239000011521 glass Substances 0.000 title claims description 23
- 230000004888 barrier function Effects 0.000 claims abstract description 34
- 239000010410 layer Substances 0.000 claims description 157
- 229920002120 photoresistant polymer Polymers 0.000 claims description 37
- 239000006117 anti-reflective coating Substances 0.000 claims description 29
- 239000000203 mixture Substances 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 17
- 230000008569 process Effects 0.000 abstract description 13
- 238000001465 metallisation Methods 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 description 41
- 239000000463 material Substances 0.000 description 20
- 238000000151 deposition Methods 0.000 description 12
- 230000008021 deposition Effects 0.000 description 10
- 239000011248 coating agent Substances 0.000 description 6
- 238000000576 coating method Methods 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 235000014653 Carica parviflora Nutrition 0.000 description 4
- 241000243321 Cnidaria Species 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000003667 anti-reflective effect Effects 0.000 description 4
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- 241000220010 Rhode Species 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 231100000572 poisoning Toxicity 0.000 description 1
- 230000000607 poisoning effect Effects 0.000 description 1
- 238000005389 semiconductor device fabrication Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
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- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
Abstract
Description
Claims (10)
- 오가노실리케이트 글래스(organosilicate glass) 유전층을 포함하는 웨이퍼에서 이중 다마신 에칭 구조(dual damascene etch structure)를 형성하는 방법으로서, 이 방법은,- 먼저, 제 1 저선택도 에칭제를 이용하여 오가노실리케이트 글래스 유전층의 주요부분을 따라 에칭을 실시하고, 이때 오가노실리케이트 글래스 유전층의 나머지 부분을 남기며,- 두 번째로, 제 2 고선택도 에칭제를 이용하여 오가노실리케이트 글래스 유전층의 나머지 부분을 에칭하여 제거하는,이상의 단계를 포함하는 것을 특징으로 하는 방법.
- 제 1 항에 있어서, 상기 웨이퍼는 오가노실리케이트 글래스 유전층 아래 금속화된 대상을 추가로 포함하고, 상기 금속화된 대상과 오가노실리케이트 글래스 유전층은 장벽층에 의해 분리되며, 이 방법은,- 제 2 에칭 단계에 이어, 장벽층 일부를 따라 금속화된 대상까지 에칭을 실시하는단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 1 항 또는 2 항에 있어서, 오가노실리케이트 글래스 유전층의 주요부분은트렌치 유전층과 대부분의 바이어 유전층을 추가로 포함하고, 그 나머지 부분은 바이어 유전층의 나머지 부분을 추가로 포함하는 것을 특징으로 하는 방법.
- 제 1 항에서 3 항 중 어느 한 항에 있어서, 오가노실리케이트 글래스 유전층 위에 공급되는 반사방지 코팅층과 캡층을 추가로 포함하는 웨이퍼에 바이어-우선 이중 다마신 구조를 형성하는 데 적용되는 방법으로서, 제 1 에칭 단계 이전에 상기 방법은,- 포토레지스트로 웨이퍼 위의 바이어를 패턴처리하고, 그리고- 반사방지코팅층과 캡층을 에칭하여 개방하는,이상의 단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 4 항에 있어서, 제 2 에칭 단계 이후에 상기 방법은,- 포토레지스트를 벗기고,- 제 2 포토레지스트로 웨이퍼 위의 트렌치를 패턴처리하며, 그리고- 오가노실리케이트 유전층을 통해 부분적으로 트렌치를 에칭하는,이상의 단계들을 추가로 포함하는 것을 특징으로 하는 방법.
- 제 1 항에서 5 항 중 어느 한 항에 있어서, 상기 방법은,- 트렌치 정지층에 의해 구분되는 제 1 오가노실리케이트 유전층과 제 2 오가노실리케이트 유전층의 오가노실리케이트 유전층을 형성하고, 그리고- 트렌치 정지층으로 트렌치 에칭을 정지시키는,이상의 단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 1 항, 또는 3항 내지 6 항 중 어느 한 항에 있어서, 오가노실리케이트 유전층 아래에 장벽층을 포함하는 웨이퍼에 적용되는 방법으로서, 이 방법은 제 2 에칭 단계에 이어 장벽층을 따라 에칭하는 단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 1 항에서 7 항까지 중 어느 한 항에 있어서, 제 1 저선택도 에칭제가 Ar/N2/CF4, Ar/N2/C2/F6, 그리고 Ar/N2/C9F8/O2를 포함하는 에칭제 혼합물 그룹으로부터 선택되는 것을 특징으로 하는 방법.
- 제 1 항에서 8 항 중 어느 한 항에 있어서, 제 2 고선택도 에칭제가 Ar/N2/C4F8인 것을 특징으로 하는 방법.
- 제 1 항 내지 3항, 또는 제 5 항 내지 9 항 중 어느 한 항에 있어서, 트렌치-우선 이중 다마신 구조 형성에 적용되는 방법으로서, 이 방법은 제 1 에칭 단계 이후 제 2 에칭 단계 이전에, 바이어 에칭을 위한 마스크를 다시 패턴처리하는 단계를 추가로 포함하는 것을 특징으로 하는 방법.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/608,119 | 2000-06-30 | ||
US09/608,119 US6410437B1 (en) | 2000-06-30 | 2000-06-30 | Method for etching dual damascene structures in organosilicate glass |
PCT/US2001/018626 WO2002003454A2 (en) | 2000-06-30 | 2001-06-08 | Method for etching dual damascene structures in organosilicate glass |
Publications (2)
Publication Number | Publication Date |
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KR20030020301A true KR20030020301A (ko) | 2003-03-08 |
KR100787847B1 KR100787847B1 (ko) | 2007-12-27 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020027017338A KR100787847B1 (ko) | 2000-06-30 | 2001-06-08 | 유기 실리케이트 글라스의 이중 다마신 구조를 에칭하는 방법 |
Country Status (9)
Country | Link |
---|---|
US (1) | US6410437B1 (ko) |
EP (1) | EP1295330A2 (ko) |
JP (1) | JP5178983B2 (ko) |
KR (1) | KR100787847B1 (ko) |
CN (2) | CN100481432C (ko) |
AU (1) | AU2001266798A1 (ko) |
SG (1) | SG145555A1 (ko) |
TW (1) | TW516176B (ko) |
WO (1) | WO2002003454A2 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100720490B1 (ko) * | 2005-12-28 | 2007-05-22 | 동부일렉트로닉스 주식회사 | 반도체 소자의 구리 배선 형성 방법 |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4381526B2 (ja) * | 1999-10-26 | 2009-12-09 | 東京エレクトロン株式会社 | プラズマエッチング方法 |
US6764958B1 (en) * | 2000-07-28 | 2004-07-20 | Applied Materials Inc. | Method of depositing dielectric films |
US6531407B1 (en) * | 2000-08-31 | 2003-03-11 | Micron Technology, Inc. | Method, structure and process flow to reduce line-line capacitance with low-K material |
US20020064951A1 (en) * | 2000-11-30 | 2002-05-30 | Eissa Mona M. | Treatment of low-k dielectric films to enable patterning of deep submicron features |
EP1233449A3 (en) * | 2001-02-15 | 2006-03-01 | Interuniversitair Micro-Elektronica Centrum | A method of fabricating a semiconductor device |
US6537733B2 (en) * | 2001-02-23 | 2003-03-25 | Applied Materials, Inc. | Method of depositing low dielectric constant silicon carbide layers |
US7311852B2 (en) * | 2001-03-30 | 2007-12-25 | Lam Research Corporation | Method of plasma etching low-k dielectric materials |
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-
2000
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2001
- 2001-06-08 EP EP01944382A patent/EP1295330A2/en not_active Withdrawn
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- 2001-06-08 AU AU2001266798A patent/AU2001266798A1/en not_active Abandoned
- 2001-06-08 SG SG200500953-5A patent/SG145555A1/en unknown
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KR100720490B1 (ko) * | 2005-12-28 | 2007-05-22 | 동부일렉트로닉스 주식회사 | 반도체 소자의 구리 배선 형성 방법 |
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CN100481432C (zh) | 2009-04-22 |
US6410437B1 (en) | 2002-06-25 |
CN1645605A (zh) | 2005-07-27 |
AU2001266798A1 (en) | 2002-01-14 |
TW516176B (en) | 2003-01-01 |
WO2002003454A2 (en) | 2002-01-10 |
KR100787847B1 (ko) | 2007-12-27 |
JP2004503088A (ja) | 2004-01-29 |
CN1449578A (zh) | 2003-10-15 |
CN1199258C (zh) | 2005-04-27 |
SG145555A1 (en) | 2008-09-29 |
WO2002003454B1 (en) | 2002-06-27 |
WO2002003454A3 (en) | 2002-05-23 |
EP1295330A2 (en) | 2003-03-26 |
JP5178983B2 (ja) | 2013-04-10 |
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