KR20030003106A - 박막 크로스 포인트 메모리 어레이 및 제조 프로세스 - Google Patents

박막 크로스 포인트 메모리 어레이 및 제조 프로세스 Download PDF

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Publication number
KR20030003106A
KR20030003106A KR1020020037050A KR20020037050A KR20030003106A KR 20030003106 A KR20030003106 A KR 20030003106A KR 1020020037050 A KR1020020037050 A KR 1020020037050A KR 20020037050 A KR20020037050 A KR 20020037050A KR 20030003106 A KR20030003106 A KR 20030003106A
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KR
South Korea
Prior art keywords
diode
electrodes
electrode
adjacent
memory cells
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Ceased
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KR1020020037050A
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English (en)
Korean (ko)
Inventor
메이핑
타우시그칼피
벡파트리샤에이
Original Assignee
휴렛-팩커드 컴퍼니(델라웨어주법인)
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Publication of KR20030003106A publication Critical patent/KR20030003106A/ko
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H10B99/16—Subject matter not provided for in other groups of this subclass comprising memory cells having diodes

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  • Semiconductor Memories (AREA)
KR1020020037050A 2001-06-29 2002-06-28 박막 크로스 포인트 메모리 어레이 및 제조 프로세스 Ceased KR20030003106A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/896,480 US6599796B2 (en) 2001-06-29 2001-06-29 Apparatus and fabrication process to reduce crosstalk in pirm memory array
US09/896,480 2001-06-29

Publications (1)

Publication Number Publication Date
KR20030003106A true KR20030003106A (ko) 2003-01-09

Family

ID=25406289

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020037050A Ceased KR20030003106A (ko) 2001-06-29 2002-06-28 박막 크로스 포인트 메모리 어레이 및 제조 프로세스

Country Status (7)

Country Link
US (1) US6599796B2 (https=)
EP (1) EP1271650B1 (https=)
JP (1) JP2003060162A (https=)
KR (1) KR20030003106A (https=)
CN (1) CN1395312A (https=)
DE (1) DE60219719T2 (https=)
TW (1) TW546751B (https=)

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US8105884B2 (en) 2008-10-06 2012-01-31 Samsung Electronics Co., Ltd. Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters
US8586962B2 (en) 2008-10-06 2013-11-19 Samsung Electronics Co., Ltd. Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters

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US7106639B2 (en) * 2004-09-01 2006-09-12 Hewlett-Packard Development Company, L.P. Defect management enabled PIRM and method
US7110278B2 (en) * 2004-09-29 2006-09-19 Intel Corporation Crosspoint memory array utilizing one time programmable antifuse cells
US7321502B2 (en) * 2004-09-30 2008-01-22 Intel Corporation Non volatile data storage through dielectric breakdown
KR100593750B1 (ko) * 2004-11-10 2006-06-28 삼성전자주식회사 이성분계 금속 산화막을 데이터 저장 물질막으로 채택하는교차점 비휘발성 기억소자 및 그 제조방법
US8270193B2 (en) 2010-01-29 2012-09-18 Unity Semiconductor Corporation Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
US20130082232A1 (en) 2011-09-30 2013-04-04 Unity Semiconductor Corporation Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells
US8559209B2 (en) 2011-06-10 2013-10-15 Unity Semiconductor Corporation Array voltage regulating technique to enable data operations on large cross-point memory arrays with resistive memory elements
US8565003B2 (en) 2011-06-28 2013-10-22 Unity Semiconductor Corporation Multilayer cross-point memory array having reduced disturb susceptibility
US8937292B2 (en) 2011-08-15 2015-01-20 Unity Semiconductor Corporation Vertical cross point arrays for ultra high density memory applications
US7269062B2 (en) * 2005-12-09 2007-09-11 Macronix International Co., Ltd. Gated diode nonvolatile memory cell
US7473986B2 (en) * 2006-09-22 2009-01-06 Taiwan Semiconductor Manufacturing Co., Ltd. Positive-intrinsic-negative (PIN) diode semiconductor devices and fabrication methods thereof
US7813157B2 (en) * 2007-10-29 2010-10-12 Contour Semiconductor, Inc. Non-linear conductor memory
US20090225621A1 (en) * 2008-03-05 2009-09-10 Shepard Daniel R Split decoder storage array and methods of forming the same
WO2009149061A2 (en) * 2008-06-02 2009-12-10 Contour Semiconductor, Inc. Diode decoder array with non-sequential layout and methods of forming the same
US8325556B2 (en) * 2008-10-07 2012-12-04 Contour Semiconductor, Inc. Sequencing decoder circuit
KR101493874B1 (ko) * 2008-11-12 2015-02-16 삼성전자주식회사 비휘발성 메모리 소자
CN101752312B (zh) * 2008-12-03 2012-05-30 中国科学院上海微系统与信息技术研究所 具有双浅沟道隔离槽的高密度二极管阵列的制造方法
US8638584B2 (en) * 2010-02-02 2014-01-28 Unity Semiconductor Corporation Memory architectures and techniques to enhance throughput for cross-point arrays
US8891276B2 (en) 2011-06-10 2014-11-18 Unity Semiconductor Corporation Memory array with local bitlines and local-to-global bitline pass gates and gain stages
US10566056B2 (en) 2011-06-10 2020-02-18 Unity Semiconductor Corporation Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations
US9117495B2 (en) 2011-06-10 2015-08-25 Unity Semiconductor Corporation Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations

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Publication number Priority date Publication date Assignee Title
US5311039A (en) * 1990-04-24 1994-05-10 Seiko Epson Corporation PROM and ROM memory cells
JPH05206396A (ja) * 1991-06-26 1993-08-13 Philips Gloeilampenfab:Nv 薄膜ｒｏｍ装置及びその製造方法
JPH07297293A (ja) * 1994-04-28 1995-11-10 Tadahiro Omi シリサイド反応を利用した半導体装置
KR20010101020A (ko) * 1998-11-16 2001-11-14 추후기재 수직 적층 필드 프로그래머블 비휘발성 메모리 및 그 제조방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8105884B2 (en) 2008-10-06 2012-01-31 Samsung Electronics Co., Ltd. Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters
US8586962B2 (en) 2008-10-06 2013-11-19 Samsung Electronics Co., Ltd. Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters

Also Published As

Publication number Publication date
US6599796B2 (en) 2003-07-29
EP1271650A2 (en) 2003-01-02
TW546751B (en) 2003-08-11
DE60219719T2 (de) 2008-01-31
CN1395312A (zh) 2003-02-05
JP2003060162A (ja) 2003-02-28
EP1271650A3 (en) 2003-12-03
US20030003633A1 (en) 2003-01-02
EP1271650B1 (en) 2007-04-25
DE60219719D1 (de) 2007-06-06

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