KR20010035633A - 반도체 장치용 다층 도금 리드 프레임 - Google Patents
반도체 장치용 다층 도금 리드 프레임 Download PDFInfo
- Publication number
- KR20010035633A KR20010035633A KR1019990042322A KR19990042322A KR20010035633A KR 20010035633 A KR20010035633 A KR 20010035633A KR 1019990042322 A KR1019990042322 A KR 1019990042322A KR 19990042322 A KR19990042322 A KR 19990042322A KR 20010035633 A KR20010035633 A KR 20010035633A
- Authority
- KR
- South Korea
- Prior art keywords
- plating layer
- gold
- lead frame
- palladium
- layer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/85464—Palladium (Pd) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
구 분 | 조 건 | SLT7300 | TI16BC |
제 1 비교재 | Ni/Pd | 12.57 | 25.70 |
본 발명 | Ni/Pd/Pd-Au | 22.40 | 30.63 |
제 2 비교재 | Ni/Pd/Au | 7.60 | 19.05 |
Claims (3)
- 금속기판 소재,상기 금속기판 소재의 상면에 형성된 니켈 도금층,상기 니켈 도금층의 상면에 형성된 팔라듐 도금층 및,상기 팔라듐 도금층상에 형성되며, 상기 팔라듐 도금층 표면의 일부가 노출되도록 상기 팔라듐 도금층 표면에 부분적으로 형성된 금 또는 금합금 도금부가 형성된 반도체 장치용 리드 프레임.
- 제1항에 있어서, 상기 금 또는 금 합금 도금부의 두께는 0.03 마이크로인치 이하인 것을 특징으로 하는 반도체 장치용 리드 프레임.
- 제1항에 있어서, 상기 팔라듐 도금층은 고속 펄스 전류 인가법에 의해 형성된 것을 특징으로 하는 반도체 장치용 리드 프레임.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-1999-0042322A KR100450091B1 (ko) | 1999-10-01 | 1999-10-01 | 반도체 장치용 다층 도금 리드 프레임 |
US09/492,402 US6469386B1 (en) | 1999-10-01 | 2000-01-27 | Lead frame and method for plating the same |
TW089101483A TW447055B (en) | 1999-10-01 | 2000-01-28 | Lead frame and method for plating the same |
CNB00101997XA CN1305132C (zh) | 1999-10-01 | 2000-02-04 | 引线框架及其电镀方法 |
JP2000042131A JP3760075B2 (ja) | 1999-10-01 | 2000-02-21 | 半導体パッケージ用リードフレーム |
SG200006862A SG91312A1 (en) | 1999-10-01 | 2000-11-28 | Lead frame and method for plating the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-1999-0042322A KR100450091B1 (ko) | 1999-10-01 | 1999-10-01 | 반도체 장치용 다층 도금 리드 프레임 |
SG200006862A SG91312A1 (en) | 1999-10-01 | 2000-11-28 | Lead frame and method for plating the same |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20010035633A true KR20010035633A (ko) | 2001-05-07 |
KR100450091B1 KR100450091B1 (ko) | 2004-09-30 |
Family
ID=28043890
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-1999-0042322A KR100450091B1 (ko) | 1999-10-01 | 1999-10-01 | 반도체 장치용 다층 도금 리드 프레임 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100450091B1 (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100908891B1 (ko) * | 2001-07-09 | 2009-07-23 | 스미토모 긴조쿠 고잔 가부시키가이샤 | 리드 프레임 및 그 제조방법 |
WO2009134012A3 (ko) * | 2008-04-29 | 2009-12-23 | 일진소재산업(주) | 전자 부품용 금속 프레임 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06260577A (ja) * | 1993-03-08 | 1994-09-16 | Nec Corp | 配線電極の被膜構造 |
JPH09232493A (ja) * | 1995-12-20 | 1997-09-05 | Seiichi Serizawa | リードフレーム |
KR0183645B1 (ko) * | 1996-03-26 | 1999-03-20 | 이대원 | 다층 구조의 도금층을 구비한 반도체 리드 프레임 |
KR100225778B1 (ko) * | 1996-05-30 | 1999-10-15 | 유무성 | 리드 프레임을 이용한 반도체 팩키지 |
US5929511A (en) * | 1996-07-15 | 1999-07-27 | Matsushita Electronics Corporation | Lead frame for resin sealed semiconductor device |
-
1999
- 1999-10-01 KR KR10-1999-0042322A patent/KR100450091B1/ko active IP Right Grant
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100908891B1 (ko) * | 2001-07-09 | 2009-07-23 | 스미토모 긴조쿠 고잔 가부시키가이샤 | 리드 프레임 및 그 제조방법 |
KR101021600B1 (ko) * | 2001-07-09 | 2011-03-17 | 스미토모 긴조쿠 고잔 가부시키가이샤 | 리드 프레임 및 그 제조방법 |
WO2009134012A3 (ko) * | 2008-04-29 | 2009-12-23 | 일진소재산업(주) | 전자 부품용 금속 프레임 |
Also Published As
Publication number | Publication date |
---|---|
KR100450091B1 (ko) | 2004-09-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3760075B2 (ja) | 半導体パッケージ用リードフレーム | |
US6518508B2 (en) | Ag-pre-plated lead frame for semiconductor package | |
KR100819800B1 (ko) | 반도체 패키지용 리드 프레임 | |
US7148085B2 (en) | Gold spot plated leadframes for semiconductor devices and method of fabrication | |
US6583500B1 (en) | Thin tin preplated semiconductor leadframes | |
US20040183165A1 (en) | Semiconductor leadframes plated with thick nickel, minimum palladium, and pure tin | |
JP2007287765A (ja) | 樹脂封止型半導体装置 | |
US6706561B2 (en) | Method for fabricating preplated nickel/palladium and tin leadframes | |
JP3550875B2 (ja) | リードフレームとこれを用いた半導体装置 | |
KR100702956B1 (ko) | 반도체 팩키지용 리드프레임 및 그 제조 방법 | |
US5958607A (en) | Lead frame for semiconductor device | |
KR100450091B1 (ko) | 반도체 장치용 다층 도금 리드 프레임 | |
JPH05117898A (ja) | 半導体チツプ実装用リードフレームとその製造方法 | |
JPH11111909A (ja) | 半導体装置用リードフレーム | |
KR100998042B1 (ko) | 리드 프레임 및 이를 구비한 반도체 패키지의 제조방법 | |
JP2858197B2 (ja) | 半導体装置用リードフレーム | |
KR100833934B1 (ko) | 다층도금 리드프레임 및 이 리드프레임의 제조방법 | |
KR100673951B1 (ko) | 반도체 팩키지용 리드 프레임 | |
KR100254271B1 (ko) | 다층 도금 리이드 프레임 | |
KR100189818B1 (ko) | 반도체 리드 프레임 | |
KR100503038B1 (ko) | 반도체 팩키지용 리드 프레임 | |
KR101128974B1 (ko) | 리드 프레임 및 그 제조방법 | |
JPS639957A (ja) | 半導体リ−ドフレ−ム | |
JPS63304654A (ja) | リ−ドフレ−ム | |
JPH11186483A (ja) | 半導体装置用リードフレーム |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20120905 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20130830 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20140901 Year of fee payment: 11 |
|
FPAY | Annual fee payment |
Payment date: 20150901 Year of fee payment: 12 |
|
FPAY | Annual fee payment |
Payment date: 20160902 Year of fee payment: 13 |
|
FPAY | Annual fee payment |
Payment date: 20180823 Year of fee payment: 15 |
|
FPAY | Annual fee payment |
Payment date: 20190826 Year of fee payment: 16 |