KR19980069737A - 리이드프레임, 반도체장치 및 그 제조방법 - Google Patents

리이드프레임, 반도체장치 및 그 제조방법 Download PDF

Info

Publication number
KR19980069737A
KR19980069737A KR1019970013268A KR19970013268A KR19980069737A KR 19980069737 A KR19980069737 A KR 19980069737A KR 1019970013268 A KR1019970013268 A KR 1019970013268A KR 19970013268 A KR19970013268 A KR 19970013268A KR 19980069737 A KR19980069737 A KR 19980069737A
Authority
KR
South Korea
Prior art keywords
semiconductor chip
lead
support
inner lead
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019970013268A
Other languages
English (en)
Korean (ko)
Inventor
시게키 다나카
아츠시 후지사와
도시유키 신야
겐이치 다테베
다카후미 곤노
Original Assignee
가나이 츠토무
히다치세사쿠쇼 (주)
스즈키 시게루
히다치훗카이 세미컨덕터 (주)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 츠토무, 히다치세사쿠쇼 (주), 스즈키 시게루, 히다치훗카이 세미컨덕터 (주) filed Critical 가나이 츠토무
Publication of KR19980069737A publication Critical patent/KR19980069737A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
KR1019970013268A 1997-02-25 1997-04-10 리이드프레임, 반도체장치 및 그 제조방법 Withdrawn KR19980069737A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9040402A JPH10242362A (ja) 1997-02-25 1997-02-25 リードフレーム、半導体装置及び半導体装置の製造方法
JP97-40402 1997-02-25

Publications (1)

Publication Number Publication Date
KR19980069737A true KR19980069737A (ko) 1998-10-26

Family

ID=12579680

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970013268A Withdrawn KR19980069737A (ko) 1997-02-25 1997-04-10 리이드프레임, 반도체장치 및 그 제조방법

Country Status (3)

Country Link
JP (1) JPH10242362A (https=)
KR (1) KR19980069737A (https=)
CN (1) CN1192046A (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4534675B2 (ja) * 2004-08-31 2010-09-01 株式会社デンソー 集積回路装置
CN100377346C (zh) * 2004-12-23 2008-03-26 旺宏电子股份有限公司 封装件
JP2011247792A (ja) * 2010-05-28 2011-12-08 Advantest Corp プローブ構造体、プローブ装置、プローブ構造体の製造方法、および試験装置
CN118471938B (zh) * 2024-06-26 2025-02-11 池州昀钐半导体材料有限公司 一种导线框架和封装组件

Also Published As

Publication number Publication date
CN1192046A (zh) 1998-09-02
JPH10242362A (ja) 1998-09-11

Similar Documents

Publication Publication Date Title
KR100475265B1 (ko) 리이드프레임과그것을사용한반도체장치및그제조방법
US6638790B2 (en) Leadframe and method for manufacturing resin-molded semiconductor device
US5198964A (en) Packaged semiconductor device and electronic device module including same
US7019388B2 (en) Semiconductor device
US7339259B2 (en) Semiconductor device
US20020058359A1 (en) Method of attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip and packages formed thereby
JPH0878605A (ja) リードフレームおよびそれを用いた半導体集積回路装置
US20100237479A1 (en) Lead Frame Based, Over-Molded Semiconductor Package with Integrated Through Hole Technology (THT) Heat Spreader Pin(s) and Associated Method of Manufacturing
KR20030051222A (ko) 반도체 장치 및 그 제조 방법
KR100596100B1 (ko) 반도체 장치의 제조 방법
JP2004048024A (ja) 半導体集積回路装置およびその製造方法
US6677665B2 (en) Dual-die integrated circuit package
US6573612B1 (en) Resin-encapsulated semiconductor device including resin extending beyond edge of substrate
KR20060042872A (ko) 반도체장치의 실장 방법
US5382546A (en) Semiconductor device and method of fabricating same, as well as lead frame used therein and method of fabricating same
JP3269025B2 (ja) 半導体装置とその製造方法
JP3430976B2 (ja) リードフレームとそれを用いた樹脂封止型半導体装置およびその製造方法
US11444012B2 (en) Packaged electronic device with split die pad in robust package substrate
KR19980069737A (ko) 리이드프레임, 반도체장치 및 그 제조방법
US12300586B2 (en) Leadless semiconductor package with internal gull wing lead structures
US6909179B2 (en) Lead frame and semiconductor device using the lead frame and method of manufacturing the same
US20240413065A1 (en) Packaged semiconductor devices and methods of making the same
JP4015118B2 (ja) 半導体装置
CN119230505A (zh) 半导体装置以及用于制造此种半导体装置的方法
JP2004200719A (ja) 半導体装置

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000