KR102472335B1 - 성막 방법 - Google Patents

성막 방법 Download PDF

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KR102472335B1
KR102472335B1 KR1020180042947A KR20180042947A KR102472335B1 KR 102472335 B1 KR102472335 B1 KR 102472335B1 KR 1020180042947 A KR1020180042947 A KR 1020180042947A KR 20180042947 A KR20180042947 A KR 20180042947A KR 102472335 B1 KR102472335 B1 KR 102472335B1
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gas
film
processed
plasma
space
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KR20180116151A (ko
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쇼 쿠마쿠라
마사히로 타바타
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도쿄엘렉트론가부시키가이샤
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
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    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
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    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02219Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30608Anisotropic liquid etching
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
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    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
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    • H10D30/00Field-effect transistors [FET]
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    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Physical Vapour Deposition (AREA)
  • Magnetic Heads (AREA)
  • Polarising Elements (AREA)
KR1020180042947A 2017-04-14 2018-04-12 성막 방법 Active KR102472335B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017080800A JP6767302B2 (ja) 2017-04-14 2017-04-14 成膜方法
JPJP-P-2017-080800 2017-04-14

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KR20180116151A KR20180116151A (ko) 2018-10-24
KR102472335B1 true KR102472335B1 (ko) 2022-11-30

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US (2) US10672605B2 (enExample)
JP (1) JP6767302B2 (enExample)
KR (1) KR102472335B1 (enExample)
CN (1) CN108735597B (enExample)
TW (2) TWI820613B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7071175B2 (ja) * 2017-04-18 2022-05-18 東京エレクトロン株式会社 被処理体を処理する方法
JP7066565B2 (ja) * 2018-07-27 2022-05-13 東京エレクトロン株式会社 プラズマ処理方法およびプラズマ処理装置
KR102794843B1 (ko) * 2019-11-18 2025-04-10 캐논 톡키 가부시키가이샤 성막장치, 이를 사용한 성막방법 및 전자디바이스 제조방법
KR102793505B1 (ko) * 2019-11-19 2025-04-08 캐논 톡키 가부시키가이샤 냉각재킷, 이를 포함하는 성막장치, 이를 사용한 성막방법 및 전자디바이스 제조방법

Citations (3)

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US20060157749A1 (en) 2005-01-17 2006-07-20 Fujitsu Limited Fin-type semiconductor device with low contact resistance and its manufacture method
US20160163556A1 (en) 2014-12-04 2016-06-09 Lam Research Corporation Technique to deposit sidewall passivation for high aspect ratio cylinder etch
US20170062469A1 (en) 2015-08-27 2017-03-02 Applied Materials, Inc. Vnand tensile thick teos oxide

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JPH06318576A (ja) * 1993-04-30 1994-11-15 Oki Electric Ind Co Ltd ドライエッチング方法
JP3259529B2 (ja) * 1994-07-11 2002-02-25 ソニー株式会社 選択エッチング方法
JP3288246B2 (ja) * 1997-03-24 2002-06-04 日本電気株式会社 半導体装置および半導体装置の製造方法
US6885055B2 (en) * 2003-02-04 2005-04-26 Lee Jong-Ho Double-gate FinFET device and fabricating method thereof
US7344996B1 (en) 2005-06-22 2008-03-18 Novellus Systems, Inc. Helium-based etch process in deposition-etch-deposition gap fill
JP2012018989A (ja) * 2010-07-06 2012-01-26 Elpida Memory Inc 半導体装置の製造方法
WO2012008179A1 (ja) * 2010-07-12 2012-01-19 住友精密工業株式会社 エッチング方法
KR101955321B1 (ko) * 2012-07-25 2019-03-07 파워 인티그레이션즈, 인크. 테이퍼진 산화물의 형성 방법
CN104217947B (zh) * 2013-05-31 2018-11-06 中国科学院微电子研究所 半导体制造方法
JP6235981B2 (ja) * 2014-07-01 2017-11-22 東京エレクトロン株式会社 被処理体を処理する方法
JP6366454B2 (ja) * 2014-10-07 2018-08-01 東京エレクトロン株式会社 被処理体を処理する方法
US9576811B2 (en) * 2015-01-12 2017-02-21 Lam Research Corporation Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch)
JP6504827B2 (ja) * 2015-01-16 2019-04-24 東京エレクトロン株式会社 エッチング方法
JP6590333B2 (ja) 2015-02-26 2019-10-16 学校法人東京理科大学 Dna結合ドメイン組込み用ベクターおよびそのセット、融合タンパク質コーディングベクターおよびそのセットならびにその製造方法、デスティネーションベクター、植物細胞用発現ベクターおよびその製造方法、植物細胞用発現ベクター作製用キット、形質転換方法、ならびにゲノム編集方法
US9828672B2 (en) * 2015-03-26 2017-11-28 Lam Research Corporation Minimizing radical recombination using ALD silicon oxide surface coating with intermittent restoration plasma
US9502238B2 (en) * 2015-04-03 2016-11-22 Lam Research Corporation Deposition of conformal films by atomic layer deposition and atomic layer etch
JP6462477B2 (ja) * 2015-04-27 2019-01-30 東京エレクトロン株式会社 被処理体を処理する方法

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
US20060157749A1 (en) 2005-01-17 2006-07-20 Fujitsu Limited Fin-type semiconductor device with low contact resistance and its manufacture method
US20160163556A1 (en) 2014-12-04 2016-06-09 Lam Research Corporation Technique to deposit sidewall passivation for high aspect ratio cylinder etch
US20170062469A1 (en) 2015-08-27 2017-03-02 Applied Materials, Inc. Vnand tensile thick teos oxide

Also Published As

Publication number Publication date
TW201901762A (zh) 2019-01-01
TWI760472B (zh) 2022-04-11
US10672605B2 (en) 2020-06-02
US20200273699A1 (en) 2020-08-27
JP2018182104A (ja) 2018-11-15
US20180301332A1 (en) 2018-10-18
KR20180116151A (ko) 2018-10-24
CN108735597B (zh) 2022-10-25
US11574806B2 (en) 2023-02-07
JP6767302B2 (ja) 2020-10-14
TW202224001A (zh) 2022-06-16
CN108735597A (zh) 2018-11-02
TWI820613B (zh) 2023-11-01

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