KR102472335B1 - 성막 방법 - Google Patents
성막 방법 Download PDFInfo
- Publication number
- KR102472335B1 KR102472335B1 KR1020180042947A KR20180042947A KR102472335B1 KR 102472335 B1 KR102472335 B1 KR 102472335B1 KR 1020180042947 A KR1020180042947 A KR 1020180042947A KR 20180042947 A KR20180042947 A KR 20180042947A KR 102472335 B1 KR102472335 B1 KR 102472335B1
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- gas
- film
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H01L21/0228—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
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- H01L21/02123—
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- H01L21/02274—
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- H01L21/0262—
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- H01L21/30608—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
- H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
- H10P14/6687—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/6903—Inorganic materials containing silicon
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
- H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/64—Wet etching of semiconductor materials
- H10P50/642—Chemical etching
- H10P50/644—Anisotropic liquid etching
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
- Magnetic Heads (AREA)
- Polarising Elements (AREA)
- Application Of Or Painting With Fluid Materials (AREA)
- Physical Vapour Deposition (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2017-080800 | 2017-04-14 | ||
| JP2017080800A JP6767302B2 (ja) | 2017-04-14 | 2017-04-14 | 成膜方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20180116151A KR20180116151A (ko) | 2018-10-24 |
| KR102472335B1 true KR102472335B1 (ko) | 2022-11-30 |
Family
ID=63790890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020180042947A Active KR102472335B1 (ko) | 2017-04-14 | 2018-04-12 | 성막 방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US10672605B2 (enExample) |
| JP (1) | JP6767302B2 (enExample) |
| KR (1) | KR102472335B1 (enExample) |
| CN (1) | CN108735597B (enExample) |
| TW (2) | TWI820613B (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7071175B2 (ja) * | 2017-04-18 | 2022-05-18 | 東京エレクトロン株式会社 | 被処理体を処理する方法 |
| JP7066565B2 (ja) * | 2018-07-27 | 2022-05-13 | 東京エレクトロン株式会社 | プラズマ処理方法およびプラズマ処理装置 |
| KR102794843B1 (ko) * | 2019-11-18 | 2025-04-10 | 캐논 톡키 가부시키가이샤 | 성막장치, 이를 사용한 성막방법 및 전자디바이스 제조방법 |
| KR102793505B1 (ko) * | 2019-11-19 | 2025-04-08 | 캐논 톡키 가부시키가이샤 | 냉각재킷, 이를 포함하는 성막장치, 이를 사용한 성막방법 및 전자디바이스 제조방법 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060157749A1 (en) | 2005-01-17 | 2006-07-20 | Fujitsu Limited | Fin-type semiconductor device with low contact resistance and its manufacture method |
| US20160163556A1 (en) | 2014-12-04 | 2016-06-09 | Lam Research Corporation | Technique to deposit sidewall passivation for high aspect ratio cylinder etch |
| US20170062469A1 (en) | 2015-08-27 | 2017-03-02 | Applied Materials, Inc. | Vnand tensile thick teos oxide |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06318576A (ja) * | 1993-04-30 | 1994-11-15 | Oki Electric Ind Co Ltd | ドライエッチング方法 |
| JP3259529B2 (ja) * | 1994-07-11 | 2002-02-25 | ソニー株式会社 | 選択エッチング方法 |
| JP3288246B2 (ja) * | 1997-03-24 | 2002-06-04 | 日本電気株式会社 | 半導体装置および半導体装置の製造方法 |
| US6885055B2 (en) * | 2003-02-04 | 2005-04-26 | Lee Jong-Ho | Double-gate FinFET device and fabricating method thereof |
| US7344996B1 (en) | 2005-06-22 | 2008-03-18 | Novellus Systems, Inc. | Helium-based etch process in deposition-etch-deposition gap fill |
| JP2012018989A (ja) * | 2010-07-06 | 2012-01-26 | Elpida Memory Inc | 半導体装置の製造方法 |
| WO2012008179A1 (ja) * | 2010-07-12 | 2012-01-19 | 住友精密工業株式会社 | エッチング方法 |
| WO2014018273A1 (en) * | 2012-07-25 | 2014-01-30 | Power Integrations, Inc. | Method of forming a tapered oxide |
| CN104217947B (zh) * | 2013-05-31 | 2018-11-06 | 中国科学院微电子研究所 | 半导体制造方法 |
| JP6235981B2 (ja) * | 2014-07-01 | 2017-11-22 | 東京エレクトロン株式会社 | 被処理体を処理する方法 |
| JP6366454B2 (ja) * | 2014-10-07 | 2018-08-01 | 東京エレクトロン株式会社 | 被処理体を処理する方法 |
| US9576811B2 (en) * | 2015-01-12 | 2017-02-21 | Lam Research Corporation | Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch) |
| JP6504827B2 (ja) * | 2015-01-16 | 2019-04-24 | 東京エレクトロン株式会社 | エッチング方法 |
| JP6590333B2 (ja) | 2015-02-26 | 2019-10-16 | 学校法人東京理科大学 | Dna結合ドメイン組込み用ベクターおよびそのセット、融合タンパク質コーディングベクターおよびそのセットならびにその製造方法、デスティネーションベクター、植物細胞用発現ベクターおよびその製造方法、植物細胞用発現ベクター作製用キット、形質転換方法、ならびにゲノム編集方法 |
| US9828672B2 (en) * | 2015-03-26 | 2017-11-28 | Lam Research Corporation | Minimizing radical recombination using ALD silicon oxide surface coating with intermittent restoration plasma |
| US9502238B2 (en) * | 2015-04-03 | 2016-11-22 | Lam Research Corporation | Deposition of conformal films by atomic layer deposition and atomic layer etch |
| JP6462477B2 (ja) * | 2015-04-27 | 2019-01-30 | 東京エレクトロン株式会社 | 被処理体を処理する方法 |
-
2017
- 2017-04-14 JP JP2017080800A patent/JP6767302B2/ja active Active
-
2018
- 2018-04-09 TW TW111106913A patent/TWI820613B/zh active
- 2018-04-09 TW TW107112019A patent/TWI760472B/zh active
- 2018-04-12 KR KR1020180042947A patent/KR102472335B1/ko active Active
- 2018-04-13 CN CN201810329353.4A patent/CN108735597B/zh active Active
- 2018-04-13 US US15/952,359 patent/US10672605B2/en active Active
-
2020
- 2020-05-13 US US15/930,637 patent/US11574806B2/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060157749A1 (en) | 2005-01-17 | 2006-07-20 | Fujitsu Limited | Fin-type semiconductor device with low contact resistance and its manufacture method |
| US20160163556A1 (en) | 2014-12-04 | 2016-06-09 | Lam Research Corporation | Technique to deposit sidewall passivation for high aspect ratio cylinder etch |
| US20170062469A1 (en) | 2015-08-27 | 2017-03-02 | Applied Materials, Inc. | Vnand tensile thick teos oxide |
Also Published As
| Publication number | Publication date |
|---|---|
| US20200273699A1 (en) | 2020-08-27 |
| JP2018182104A (ja) | 2018-11-15 |
| JP6767302B2 (ja) | 2020-10-14 |
| US11574806B2 (en) | 2023-02-07 |
| TW201901762A (zh) | 2019-01-01 |
| US20180301332A1 (en) | 2018-10-18 |
| TWI760472B (zh) | 2022-04-11 |
| TW202224001A (zh) | 2022-06-16 |
| TWI820613B (zh) | 2023-11-01 |
| KR20180116151A (ko) | 2018-10-24 |
| CN108735597B (zh) | 2022-10-25 |
| CN108735597A (zh) | 2018-11-02 |
| US10672605B2 (en) | 2020-06-02 |
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| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
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| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
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| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
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| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
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| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
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| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U11-oth-PR1002 Fee payment year number: 1 |
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| PG1601 | Publication of registration |
St.27 status event code: A-4-4-Q10-Q13-nap-PG1601 |
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| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |