KR102411667B1 - 동축 상호접속부를 포함하는 통합 디바이스 - Google Patents

동축 상호접속부를 포함하는 통합 디바이스 Download PDF

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KR102411667B1
KR102411667B1 KR1020167036601A KR20167036601A KR102411667B1 KR 102411667 B1 KR102411667 B1 KR 102411667B1 KR 1020167036601 A KR1020167036601 A KR 1020167036601A KR 20167036601 A KR20167036601 A KR 20167036601A KR 102411667 B1 KR102411667 B1 KR 102411667B1
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South Korea
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interconnect
substrate
electrical
interconnects
coaxial
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KR20170028901A (ko
Inventor
동 욱 김
영 규 송
규-평 황
홍 복 위
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퀄컴 인코포레이티드
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    • H01L23/5389
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • H01L21/4846
    • H01L21/4853
    • H01L23/49811
    • H01L23/49833
    • H01L23/49838
    • H01L25/105
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/20Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/20Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H10W42/261Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions
    • H10W42/267Patterned shielding planes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H01L2224/16225
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305Moulding and encapsulation
    • H05K2203/1316Moulded encapsulation of mounted components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/685Shapes or dispositions thereof comprising multiple insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/401Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/752Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Ceramic Engineering (AREA)
  • Combinations Of Printed Boards (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)
KR1020167036601A 2014-07-11 2015-07-09 동축 상호접속부를 포함하는 통합 디바이스 Active KR102411667B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/329,646 2014-07-11
US14/329,646 US9385077B2 (en) 2014-07-11 2014-07-11 Integrated device comprising coaxial interconnect
PCT/US2015/039678 WO2016007706A1 (en) 2014-07-11 2015-07-09 Integrated device comprising coaxial interconnect

Publications (2)

Publication Number Publication Date
KR20170028901A KR20170028901A (ko) 2017-03-14
KR102411667B1 true KR102411667B1 (ko) 2022-06-20

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KR1020167036601A Active KR102411667B1 (ko) 2014-07-11 2015-07-09 동축 상호접속부를 포함하는 통합 디바이스

Country Status (8)

Country Link
US (1) US9385077B2 (https=)
EP (1) EP3167483A1 (https=)
JP (1) JP6802146B2 (https=)
KR (1) KR102411667B1 (https=)
CN (2) CN106489191A (https=)
AU (1) AU2015287804B2 (https=)
BR (1) BR112017000154B1 (https=)
WO (1) WO2016007706A1 (https=)

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US10381303B2 (en) * 2016-07-01 2019-08-13 Vanguard International Semiconductor Corporation Semiconductor device structures
TWI594338B (zh) * 2016-08-09 2017-08-01 矽品精密工業股份有限公司 電子堆疊結構及其製法
US10070525B2 (en) * 2016-12-28 2018-09-04 Intel Corporation Internal to internal coaxial via transition structures in package substrates
WO2018182652A1 (en) * 2017-03-30 2018-10-04 Intel Corporation Semiconductor package having a coaxial first layer interconnect
US10734334B2 (en) * 2018-01-29 2020-08-04 Marvell Asia Pte, Ltd. Coaxial-interconnect structure for a semiconductor component
KR102740257B1 (ko) * 2019-12-17 2024-12-10 삼성전자주식회사 반도체 패키지
KR102903835B1 (ko) * 2020-08-25 2025-12-31 삼성전자주식회사 반도체 패키지
KR102934454B1 (ko) * 2020-11-03 2026-03-06 삼성전자주식회사 Bs-pdn 구조를 가진 집적회로 칩
KR20220124583A (ko) * 2021-03-03 2022-09-14 삼성전자주식회사 인터포저를 포함하는 전자 장치
US20230036650A1 (en) * 2021-07-27 2023-02-02 Qualcomm Incorporated Sense lines for high-speed application packages
CN115023038A (zh) * 2022-04-29 2022-09-06 清华大学 微系统集成电路的叠装结构和叠装方法
US20240047319A1 (en) * 2022-08-04 2024-02-08 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same
US12520417B2 (en) * 2022-12-12 2026-01-06 Rolls-Royce North American Technologies Inc. Circuit board assembly having a security shield and method of the same
US20250273612A1 (en) * 2024-02-28 2025-08-28 Qualcomm Incorporated Package comprising a substrate including an inter substrate interconnect structure comprising an inner interconnect

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US20080158842A1 (en) * 2006-12-29 2008-07-03 Texas Instruments Incorporated Stress and collapse resistant interconnect for mounting an integrated circuit package to a substrate
US20110147901A1 (en) * 2009-12-17 2011-06-23 Rui Huang Integrated circuit packaging system with package stacking and method of manufacture thereof
JP2013089762A (ja) 2011-10-18 2013-05-13 Shinko Electric Ind Co Ltd 積層型半導体パッケージ

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US20080158842A1 (en) * 2006-12-29 2008-07-03 Texas Instruments Incorporated Stress and collapse resistant interconnect for mounting an integrated circuit package to a substrate
US20110147901A1 (en) * 2009-12-17 2011-06-23 Rui Huang Integrated circuit packaging system with package stacking and method of manufacture thereof
JP2013089762A (ja) 2011-10-18 2013-05-13 Shinko Electric Ind Co Ltd 積層型半導体パッケージ

Also Published As

Publication number Publication date
US9385077B2 (en) 2016-07-05
KR20170028901A (ko) 2017-03-14
BR112017000154A2 (pt) 2017-11-07
BR112017000154B1 (pt) 2022-05-17
JP6802146B2 (ja) 2020-12-16
WO2016007706A1 (en) 2016-01-14
AU2015287804A1 (en) 2017-01-05
JP2017520929A (ja) 2017-07-27
CN106489191A (zh) 2017-03-08
EP3167483A1 (en) 2017-05-17
CN115036287A (zh) 2022-09-09
AU2015287804B2 (en) 2020-02-27
US20160013125A1 (en) 2016-01-14

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