KR102228819B1 - Handler for testing semiconductor - Google Patents

Abstract

The present invention relates to a handler for testing a semiconductor device that supports testing of a semiconductor device.
The handler for testing a semiconductor device according to the present invention includes a device pocket having a first calibration hole and a second calibration hole for correcting a position with a test socket when the pocket plate is lowered by the device supply device, and the test The socket includes: a first calibration pin inserted into the first calibration hole of the descending device pocket to primarily correct a position of the device pocket; And a second correction pin inserted into the second correction hole of the lowering element pocket to secondly correct the position of the element pocket. Includes.
According to the present invention, since the position of the device pocket is sequentially corrected by dividing the steps, since a very precise position correction of the device pocket can be performed, the reliability of the electrical connection between the semiconductor device and the test socket is improved.

Description

Handler for testing semiconductor devices {HANDLER FOR TESTING SEMICONDUCTOR}

The present invention relates to a handler for testing a semiconductor device used when testing a semiconductor device.

A semiconductor device test handler (hereinafter referred to as a “handler”) is an equipment that electrically connects semiconductor devices manufactured through a predetermined manufacturing process to a tester, and then classifies semiconductor devices according to test results.

Handlers to support testing of semiconductor devices include Korean Patent Laid-Open No. 10-2002-0053406 (hereinafter referred to as'Prior Technology 1') or Japanese Patent Application Laid-Open No. 2011-247908 (hereinafter referred to as'Prior Technology 2'). It is disclosed through the same various patent documents.

According to the published patent document, the holding head (in the prior art 1, referred to as'index head', in the prior art 2, referred to as'compression device') descends while holding the semiconductor element, thereby reducing the socket plate (in the prior art 2 The semiconductor device is electrically connected to the test socket (in the prior art 2, it is named'test socket') in the'tester'). To this end, the gripping head is configured to be able to move horizontally and vertically. Here, the horizontal movement of the gripping head is performed between the upper point of the shuttle carrying the semiconductor device (referred to as'slide table' in the prior art 2) and the upper point of the socket plate. The vertical movement of the gripping head is performed when the semiconductor device is gripped or released from the shuttle, and when the semiconductor device is electrically connected to or disconnected from the test socket. Of course, the position between the shuttle and the gripping head or other related structures may have various forms.

The operation of electrically connecting the semiconductor device to the test socket by the lowering of the gripping head must be performed in a state in which precise positioning between the semiconductor device gripped by the gripping head and the test socket is made.

However, due to a control tolerance for horizontal movement or other various design factors, it is very difficult to elaborately set a position between a semiconductor device gripped by a gripping head and a test socket. In order to solve this problem, as referred to in the prior art 2, a positioning pin (referred to as a'guide pin' in the prior art 2) is configured on the socket plate, and a positioning hole (a'guide pin' in the prior art 2) is formed on the gripping head. It is common to construct a hole). Therefore, when the gripping head is lowered, the positioning pin of the socket plate is first inserted into the positioning hole of the gripping head, so that the semiconductor device is electrically connected to the test socket while the precise positioning between the gripping head and the test socket is first made. It became possible to become.

On the other hand, due to the development of integrated technology, the number of terminals of semiconductor devices has increased. Semiconductor device manufacturers try to reduce the size of terminals and the spacing between terminals in a way to accommodate a large number of terminals within a limited area. For this reason, products with the spacing between terminals reduced from 0.50mm to 0.40mm to 0.35mm to 0.30mm are being developed, and are expected to decrease further in the future. Of course, as the spacing between the terminals decreases, the size of the terminals must of course be reduced. For example, in the BGA type, when the distance between the balls is 0.50mm, the diameter of the terminal is 0.33mm, but when the distance between the terminals is 0.35mm, the diameter of the terminal is reduced to 0.23mm. Moreover, in recent years, the gap between terminals has been reduced to 0.30mm and the diameter of terminals is also being reduced to 0.20mm or less. In this case, if the semiconductor device is out of position or is gripped by the gripping head in a twisted posture, even to a minute degree, a defect may occur in the electrical connection between the semiconductor device and the test socket. In addition, there is a risk of terminal damage or short-circuit.

Therefore, there is a need to make the electrical connection between the semiconductor device and the test socket more elaborately.

However, in light of the trend of decreasing the diameter of the terminal or the spacing between the terminals as described above, obtaining precise positioning between the semiconductor device and the test socket with only the positioning pin and the positioning hole is very difficult in the future not far from the following points. It can be difficult.

First, as the positioning pin is repeatedly inserted and released into the positioning hole, the wall surface forming the positioning hole may be worn. In this case, the positioning pin and the positioning hole lose their function. To overcome this, the cumbersome work of replacing parts must be accompanied, which leads to a loss of manpower and a decrease in the utilization rate of equipment.

Second, the gripping state of the semiconductor device is particularly important because the gripping head must have a configuration in which the semiconductor device is electrically connected to the test socket by descending from the gripping state of the semiconductor device. However, the movement control tolerance of the shuttle or the gripping head or the loading tolerance of the semiconductor device disturbs the precise gripping of the semiconductor device held by the gripping head. For this reason, the semiconductor device may not be accurately gripped by the picker of the gripping head or may be held in a finely rotated state. However, attempts to reduce the mentioned design tolerances as much as possible are bound to face limitations.

Accordingly, the applicant of the present invention has proposed a pocket plate having a device pocket for accommodating a semiconductor device in Korean Patent Application Laid-Open No. 10-2014-0121909 (name of the invention: semiconductor device test handler, hereinafter referred to as'prior technology'). .

According to the prior art, since the semiconductor device and the test socket are electrically connected after the horizontal position and posture of the semiconductor device is precisely corrected by the device pocket, a precise electrical contact between the semiconductor device and the test socket can be achieved.

However, as described above, since the development of the integrated technology is continuously made, the improvement of the sophistication of the electrical contact between the semiconductor device and the test socket is always a subject to be studied.

The present invention provides a technology capable of making a more precise electrical connection between a semiconductor device and a test socket through precise positioning between a device pocket and a test socket.

A handler for testing a semiconductor device according to the present invention for achieving the above object includes: a socket plate having at least one test socket electrically connected to the tester side; A pocket plate provided to be elevating and descending above the socket plate and having at least one device pocket for accommodating a semiconductor device at a position corresponding to the at least one test socket; An elevating member enabling the pocket plate to be elevated and lowered, thereby enabling at least one semiconductor element accommodated in the at least one element pocket to be electrically connected to or disconnected from the at least one test socket; And a device supply unit supplying at least one semiconductor device to the at least one device pocket and lowering the pocket plate. Including, wherein the device pocket has a first calibration hole and a second calibration hole for correcting a position with the test socket when the pocket plate is lowered by the device supply, the test socket, A first calibration pin inserted into the first calibration hole of the device pocket to primarily correct a position of the device pocket; And a second correction pin inserted into the second correction hole of the lowering element pocket to secondly correct the position of the element pocket. Includes.

When the device pocket approaches the test socket, the first calibration pin is first inserted into the first calibration hole to primarily correct the position of the device pocket, and the second calibration pin is later inserted into the second calibration hole. As it is inserted, the position of the element pocket is secondarily precisely corrected.

The first calibration pin has a higher protruding height than the second calibration pin, so when the device pocket is lowered, the first calibration pin is inserted into the first calibration hole, and then the second calibration pin is inserted into the second calibration hole. The calibration pin is inserted.

The second correction hole has a long hole shape in one direction.

The second correction pin has an elliptical shape having a long flat cross section in one direction.

According to the present invention, there are the following effects.

First, since the position of the element pocket is roughly corrected first, and then the position of the element pocket is precisely corrected later, precise positional correction of the element pocket can be performed without causing damage to the element pocket or the like.

Second, the device pocket can be precisely positioned regardless of thermal contraction or thermal expansion of the device pocket.

Therefore, the reliability of the electrical connection between the test socket and the semiconductor device loaded in the device pocket is ultimately improved.

1 is a schematic plan configuration diagram of a handler for testing a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a partially cut-away perspective view of a main part of the handler of FIG. 1.
3 is a schematic side view of an element feeder applied to the handler of FIG. 1.
Figure 4 is a schematic front view of a test socket applied to the handler of Figure 1;
5 is a partially cut-away perspective view of a pocket plate applied to the handler of FIG. 1.
Fig. 6 is a bottom perspective view of an element pocket configured in the pocket plate of Fig. 1;
7 and 8 are reference diagrams for comparing the test socket of FIG. 4 and the device pocket of FIG. 6.
9 to 16 are reference diagrams for explaining a method of operating a main part of a handler according to the present invention.

Hereinafter, a preferred embodiment according to the present invention as described above will be described. For reference, known or redundant descriptions are omitted or compressed as much as possible for the sake of brevity.

<Description of the basic configuration of the handler>

1 is a schematic plan view of a semiconductor device test handler 100 (hereinafter, abbreviated as “handler”) according to an embodiment of the present invention, and FIG. 2 is a main part of the handler 100 of FIG. IP) is an exploded perspective view partially cut away.

1 and 2, the handler 100 according to the present invention includes a shuttle 110, a loading portion 120 and an unloading portion 130, an element feeder 140, a socket plate 150, and 2), a pocket plate 160 (see FIG. 2), a guider 170 (see FIG. 2), and a spring 180 (see FIG. 2).

The shuttle 110 has a pocket table 111 that reciprocates in a straight line connecting the loading position LP, the gripping position DP, and the unloading position UP in the left and right directions. The pocket table 111 has eight loading pockets 111a and eight unloading pockets 111b in which semiconductor devices can be loaded. Here, the loading pocket 111a reciprocates between the loading position LP and the gripping position DP by the reciprocating movement of the pocket table 111, and the unloading pocket 111b reciprocates the pocket table 111 Accordingly, it reciprocates between the gripping position DP and the unloading position UP. The loading part 120 loads a semiconductor device to be tested into the loading pockets 111a of the shuttle 110.

The unloading part 130 unloads the test-completed semiconductor device from the unloading pockets 111b of the shuttle 110.

For reference, in connection with the loading/unloading technology of a semiconductor device, since it has already been disclosed and known in various forms, a detailed description thereof will be omitted.

The device supply unit 140 supplies eight semiconductor devices to the pocket plate 160. To this end, as in the schematic side view of FIG. 3, the element feeder 140 includes a gripping head 141, a horizontal mover 142, and a vertical mover 143.

The gripping head 141 may grip or release eight semiconductor devices, and each has eight pickers P capable of gripping or releasing one semiconductor device by vacuum pressure. Positioning holes 141a for setting a position with the pocket plate 160 are formed in the gripping head 141.

The horizontal mover 142 moves the gripping head 141 in the front and rear horizontal directions. Accordingly, the gripping head 141 may be positioned above the pocket table 111 in the front or above the pocket plate 160 in the rear.

The vertical mover 143 moves the gripping head 141 in the vertical direction.

The socket plate 150 includes eight test sockets 151 electrically connected to a tester (not shown) and an installation board 152 on which eight test sockets 151 are installed. This socket plate 150 is provided to be fixed.

The test socket 151 has a socket portion 151a electrically connected to the semiconductor device loaded in the device pocket 161 of the pocket plate 160. In addition, the test socket 151 has two first calibration pins CP1 and four second calibration pins CP2 for electrical connection with the semiconductor device.

The first calibration pins CP1 primarily correct the position of the device pocket 161.

The second calibration pins CP2 secondaryly calibrate the position of the element pocket 161 that is primarily calibrated by the first calibration pin CP1 more precisely. These second calibration pins CP2 are thinner than the first calibration pin CP1 and have an elliptical flat cross section. The reason why the flat cross-section of the second calibration pin CP2 is elliptical is because the thickness of the second calibration pin CP2 is gradually becoming smaller, and the circular rather than the square and the elliptical rather than the plate shape have a strong rightness. . In addition, the second calibration hole (CH2) designed in consideration of thermal expansion serves as a guide function to guide the second calibration pin (CP2), so that the second calibration pin (CP2) can flow more stably therein. . In addition, as shown in FIG. 4, the protruding height H ₁ of the first calibration pins CP1 is higher than _{the protruding height H 2} of the second calibration pins CP2. As a result, the first calibration pins CP1 first contact the device pocket 161 and first align the position of the device pocket 161, and the second calibration pins CP2 contact the device pocket 161 later. Secondly, the position of the device pocket 161 can be precisely aligned. Of course, depending on the implementation, the first calibration pin and the second calibration pin have the same height, but the first calibration pin is first inserted into the first calibration hole, and then the second calibration pin is inserted later into the second calibration hole. You could also change the shape and structure of the pocket. And it is possible to change the positions of each other, such as that the first calibration pin may be provided on the center side and the second calibration pin may be provided on the outside, and in this case, the higher height may first contact the corresponding calibration hole. It's self-evident.

The pocket plate 160 is provided on the upper side of the socket plate 150 so as to be elevated. This pocket plate 160 includes eight device pockets 161 and an installation frame 162 as shown in the excerpt of FIG. 5.

Each of the device pockets 161 is installed at a position corresponding to the test sockets 151 of the socket plate 150 and includes a body 161a, a support plate 161b, and a positioning pin 161c.

The main body 161a has a receiving space RS having a rectangular flat cross-section for accommodating a semiconductor device. Here, the wall surface forming the accommodation space RS has an inclination that narrows the width between the facing wall surfaces as it goes downward. As a result, the lower end of the accommodation space RS is narrowed to an area that substantially matches the planar area of the semiconductor device. Accordingly, the semiconductor device freely falling in the accommodation space RS can be seated in the accommodation space RS while its position or posture is corrected by the inclined walls. That is, the pocket plate 160 functions as a position correction means or a posture correction means for correcting the position or posture of the semiconductor device.

The support plate 161b supports the semiconductor device accommodated in the accommodation space RS. Accordingly, the semiconductor device accommodated in the accommodation space RS is prevented from being separated in the downward direction. In addition, a plurality of exposed holes EH are formed in the support plate 161b to expose the terminals of the semiconductor device in the downward direction. It is preferable that the support plate 161b be in the form of a thin film as possible in consideration of the protruding height of the small terminal. Of course, depending on implementation, the supporting means for supporting the semiconductor device may not be separately provided like the supporting plate 161b but may be integrally formed in the main body.

The positioning pins 161c are provided to set positions between the pocket plate 160 and the gripping head 141. That is, when the gripping head 141 descends, the positioning pins 161c of the pocket plate 160 are first inserted into the positioning holes 141a of the gripping head 141, and the pocket plate 160 and the gripping head (141) The positions of each other are established. Of course, depending on the implementation, a positioning pin may be provided in the gripping head and a positioning hole may be formed in the pocket plate.

Meanwhile, FIG. 6 is a bottom perspective view of the device pocket 161. As shown in FIG. 6, two first correction holes CH1 and four second correction holes CH2 are formed in the body 161a of the element pocket.

The first correction hole CH1 is formed to have an inner diameter in consideration of manufacturing tolerances. The first calibration pin CP1 is inserted into the first calibration hole CH1. Accordingly, while the first calibration pin CP1 is inserted into the first calibration hole CH1, the position of the element pocket 161 is primarily corrected.

The second calibration pin CP2 is inserted into the second calibration hole CH2. Therefore, the position of the element pocket 161 that is primarily calibrated by the action of the first calibration pin CP1 and the first calibration hole CH1 is inserted into the second calibration hole CH2 with the second calibration pin CP2. As it becomes, it is elaborately corrected secondary. That is, after the position of the element pocket 161 is primarily corrected by the first calibration pin CP1 and the first calibration hole CH1, the second calibration pin CP2 and the second calibration hole CH2 As a result, the position of the element pocket 161 is secondarily precisely corrected.

The installation frame 162 has installation holes 162a for installing eight device pockets 161 and an insertion hole 162b into which the guider 170 is inserted.

The guider 170 is installed so that the lower end is fixed to the socket plate 150 and the upper end passes through the insertion hole 162b of the pocket plate 160. This guider 170 prevents horizontal movement of the pocket plate 160 while guiding the lifting movement of the pocket plate 160. That is, the pocket plate 160 is prevented from horizontally moving by the guider 170 and is only capable of moving up and down. Therefore, the position in the horizontal direction between the pocket plate 160 and the socket plate 150 is always maintained accurately set.

The spring 180 is an elastic member that elastically supports the pocket plate 160 in the upward direction with respect to the socket plate 150. By the elastic support of the spring 180, the pocket plate 160 may be installed to be elevating, and in this respect, the spring 180 serves as a lifting member.

<Specific description of the first calibration pin and the first calibration hole>

7, the second calibration hole CH2 is formed on the first crosshair CL _{1 based on the center O 1} of the device pocket 161, and the second calibration pin CP2 ) Is formed on the second crosshairs CL _{2 based on the center O 2} of the test socket 151. Of course, according to the intention of the designer, the second correction hole CH2 may be formed on an X-ray based on the _{center O 1, and various applications may be designed.}

In addition, the second correction hole CH2 is formed as a long hole having a longer shape in the direction _{of the first crosshair CL 1.} That is, when placing the center of the first crosshair CL _{1 in the center O 1} of the device pocket 161, the second correction hole CH2 on the X-axis of the first crosshair CL _{1 is X} A long hole long in the axial direction, and the second correction hole CH2 on the Y-axis line of _{the first crosshair CL 1 is a long long hole in the Y-axis direction.} Correspondingly, the cross-sectional plan view of the second correction pin CP2 has an elliptical shape having a longer radius in the direction of _{the second crosshairs CL 2.} That is, when placing the center of the second crosshairs (CL _{2 ) in the center (O 1} ) of the test socket 151, the evaluation of the second calibration pin (CH2) on the X-axis of the second crosshairs (CL _{2 ).} The cross-section has an elliptical shape whose radius is longer in the X-axis direction, and the flat cross-section of the second correction hole CH2 on the Y-axis line of _{the second crosshair CL 2 is an elliptical shape whose radius is longer in the Y-axis direction.} Of course, when the first correction pin CP1 is made of a material having excellent mechanical strength, the second correction hole CH2 may have a circular shape instead of a long hole.

In addition, as shown in FIG. 8, the diameter of the short radius side of the second calibration pin CP2 in the flat cross-section of the second calibration pin CP2 is almost the same as the diameter of the short radius side of the second calibration hole CH2, and The diameter of the second correction hole (CH2) is somewhat shorter than the diameter of the long radius side. This is because the thermal expansion of the device pocket 161 and the thermal expansion of the test socket 151 or the second calibration pin CP2 are considered. That is, even if the second calibration pin CP2 expands due to thermal expansion or the second calibration pin CP2 does not expand, a free space exists in the second calibration hole CH2 in the thermal expansion direction in consideration of movement in the thermal expansion direction. Because you have to. Furthermore, since the flat cross section of the second calibration pin CP2 has an elliptical shape, there is also an advantage that the strength of the second calibration pin CP2, which is relatively thin with respect to the first calibration pin CP1, can be reinforced. .

Of course, the number and formation positions of the second correction pin CP2 and the second correction hole CH2 may be changed according to the necessity of design. In addition, in consideration of the direction of thermal expansion, the flat cross-section of the second correction pin CP2 and the direction of the long and short radius of the second correction hole CH2 can be appropriately set.

For reference, the first calibration pin CP1 and the second calibration pin CP2 have a pointed top so that they can be properly inserted into the first calibration hole CH1 and the second calibration hole CH2, respectively.

<Explanation of how it works>

Subsequently, a method of operating a main part of the handler 100 according to the present invention will be described with reference to FIG. 9 below.

The gripping head 141 grips the semiconductor elements D from the loading pocket 111a of the pocket table 111 at the gripping position DP. Subsequently, the horizontal mover 142 is operated to move the gripping head 141 above the socket plate 150 and above the pocket plate 160 as shown in FIG. 9.

In the state of Fig. 9, the vertical mover 143 is operated to lower the gripping head 141 to the dropping position (FP, reference to the bottom of the picker) as detailed in the enlarged excerpt of Fig. 10. At this time, as the positioning pins 161c of the pocket plate 160 are inserted into the positioning holes 141a of the gripping head 141, positions between the pocket plate 160 and the gripping head 141 are set.

In the state of Fig. 10, by releasing the vacuum pressure of the picker P or supplying compressed air, the semiconductor device D attached to the picker P is dropped as referred to in the enlarged excerpt of Fig. 11. Accordingly, while the horizontal position and posture of the semiconductor device (D) is corrected by the walls forming the accommodation space (RS) of the device pocket 161 to the lower end of the accommodation space (RS) that can be supported by the support plate (161b). Stop after falling. Here, the semiconductor device D that has dropped to the lower end of the accommodation space RS and then stopped has its horizontal position and posture precisely corrected.

In the state of Fig. 11, the vertical mover 143 operates again to lower the gripping head 141. Accordingly, as shown in the enlarged excerpt of FIG. 12, the lower end of the picker P is in contact with the upper surface of the semiconductor device D, and the semiconductor device D is pressed downward. Further, at this time, portions of the gripping head 141 are in contact with the upper surface of the device pocket 161, so that the gripping head 141 can apply a pressing force to the device pocket 161 in a downward direction. Accordingly, the pocket plate 160 is forced to descend downward while overcoming the elastic force of the spring 180 due to the pressing force applied to the element pocket 161 by the holding head 141 after that. Of course, the guider 170 guides the lowering of the pocket plate 160.

For proper explanation of the present invention, it is assumed that the test socket 151 and the device pocket 161 are slightly shifted in the vertical direction as shown in FIG. 13 in the state as shown in FIG. 12. Here, in the state as shown in FIG. 13, it can be seen that the second calibration pin CP2 is out of the range that can be inserted into the second calibration hole CP1.

When the pocket plate 160 descends according to the operation of the vertical mover 143 in the state of FIG. 12, the first calibration pin CH1 of the test socket 151 is inserted into the first calibration hole CH1 of the device pocket 161. ) Is inserted, as shown in Fig. 14, the device pocket 161 and the test area.

The position of the kit 151 is primarily corrected. Referring to FIG. 14, the range in which the second calibration pin CP2 can be inserted into the second calibration hole CH2 by the first calibration by the action of the first calibration hole CH1 and the first calibration pin CP1. It can be seen that the inward position has been calibrated. And when the pocket plate 160 is further lowered according to the continued operation of the vertical mover 143, the second calibration pin CH2 of the test socket 151 is in the second calibration hole CH2 of the device pocket 161. While being inserted, the positions of the device pockets 161 and the test sockets 151 are secondarily precisely calibrated as shown in FIG. 15.

In the state shown in FIG. 15, when the gripping head 141 descends a little further and then stops, the gripping head 141 is at a lower connection position (CP) than the fall position (FP), as referred to in the enlarged excerpt of FIG. , It descends to the bottom of the picker). In the state of FIG. 16, the semiconductor device D is electrically connected to the test socket 151. At this time, the lower end of the picker P is in a state in which the semiconductor device is continuously pressed and supported, and in this state, the semiconductor device D is tested by the tester.

For reference, in the drawings of the present specification, the terminal of the semiconductor device and the test socket 151 (for example, a pogo pin or a PCR socket) are not illustrated in detail, but this is a general matter and thus omitted.

When the test is finished, the vertical mover 143 operates to raise the gripping head 141. Of course, as the pressing force by the gripping head 141 is removed by the rising of the gripping head 141, the pocket plate 160 also rises by receiving the elastic force of the spring 180. At this time, a vacuum pressure is applied to the picker P. Accordingly, when the holding head 141 rises, the semiconductor device D also rises, and the electrical connection between the semiconductor device D and the test socket 151 is released. Further, the semiconductor device D is pulled out from the device pocket 161 as the gripping head 141 rises further past the drop position FP.

When the lifting of the gripping head 141 is completed, the horizontal mover 142 operates to move the gripping head 141 above the unloading pocket 111b in the gripping position DP. Subsequently, the semiconductor device D held by the gripping head 141 is loaded into the unloading pocket 111b of the pocket table 111 at the gripping position DP.

Meanwhile, in the present embodiment, an example in which eight semiconductor devices are tested at once is exemplified, but the present invention can be preferably applied if more than one semiconductor device is tested at a time. Of course, the number of pickers P, the number of test sockets 151, and the number of device pockets 161 will be provided equal to the number of semiconductor devices to be tested at once.

In addition, although an example in which only one shuttle 110 is configured in the present embodiment, the present invention is preferable even when a plurality of shuttles and a plurality of gripping heads are configured as in 10-2012-0110424 previously filed by the applicant. Can be applied.

For reference, in the above embodiment, a configuration in which the first calibration pin CP1 and the second calibration pin CP2 are provided in the test socket 151 was taken. However, depending on the implementation, the test socket is made small so that only the socket part is provided in the test socket, and the first calibration pin and the second calibration pin are provided on the installation board, or the first calibration pin and the second calibration pin are used as the test socket. It could be divided into and installed on the board. Furthermore, it may be advantageously considered that a separate socket guider is provided, and a first calibration pin and a second calibration pin are provided on the socket guider. That is, the present invention is not limited to the above embodiments and may be applied in various ways. Of course, even if it is applied in this way, it is possible to define a test socket to a range in which the first calibration pin and the second calibration pin are installed, so it is natural that such application examples are also within the scope of the present invention.

Therefore, as described above, a detailed description of the present invention has been made by an embodiment with reference to the accompanying drawings, but since the above-described embodiment has only been described with reference to a preferred example of the present invention, the present invention is the embodiment described above. It should not be understood as being limited only to, and the scope of the present invention should be understood as the claims and equivalent concepts to be described later.

100: semiconductor device test handler
140: element feeder
150: socket plate
151: test socket
CP1: 1st calibration pin CP2: 2nd calibration pin
160: pocket plate
161: element pocket
CH1: 1st calibration hole CH2: 2nd calibration hole
180: elevating member

Claims (5)

A socket plate having at least one test socket electrically connected to the tester side and an installation board on which the test socket is installed;
A pocket plate provided to be elevating above the socket plate and having at least one device pocket for accommodating a semiconductor device and an installation frame for installing the device pocket at a position corresponding to the at least one test socket;
An elevating member enabling the pocket plate to be elevated and lowered, thereby enabling at least one semiconductor element accommodated in the at least one element pocket to be electrically connected to or disconnected from the at least one test socket;
A guide for preventing horizontal movement of the pocket plate while guiding the lifting movement of the pocket plate; And
A device supply unit supplying at least one semiconductor device to the at least one device pocket and lowering the pocket plate; Including,
The device pocket has a first calibration hole and a second calibration hole for correcting a position with the test socket when the pocket plate is lowered by the device feeder,
The test socket,
A first calibration pin inserted into the first calibration hole of the device pocket to first correct the position of the device pocket; And
A second correction pin inserted into the second correction hole of the lowering element pocket to secondly correct the position of the element pocket; Including,
The second calibration hole has a long long hole shape in one direction with respect to the center of the device pocket, and the second calibration pin has a flat cross-section with a long ellipse shape in one direction with respect to the center of the test socket,
The installation frame has an insertion hole into which the guider is inserted,
The guider, characterized in that the lower end is fixed to the installation board, the upper end is installed so as to penetrate the insertion hole
Handler for testing semiconductor devices. The method of claim 1,
When the device pocket approaches the test socket, the first calibration pin is first inserted into the first calibration hole to primarily correct the position of the device pocket, and the second calibration pin is later inserted into the second calibration hole. Characterized in that, while being inserted, the position of the device pocket is secondarily precisely corrected.
Handler for testing semiconductor devices. The method of claim 2,
The first calibration pin has a higher protruding height than the second calibration pin, so when the device pocket is lowered, the first calibration pin is inserted into the first calibration hole, and then the second calibration pin is inserted into the second calibration hole. Characterized in that the calibration pin is inserted
Handler for testing semiconductor devices.















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