KR102201122B1 - 민감도 개선 및 뉴슨스 억제를 위해 로직 및 핫스팟 검사에서 z-층 컨텍스트를 사용하는 시스템 및 방법 - Google Patents

민감도 개선 및 뉴슨스 억제를 위해 로직 및 핫스팟 검사에서 z-층 컨텍스트를 사용하는 시스템 및 방법 Download PDF

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KR102201122B1
KR102201122B1 KR1020197002114A KR20197002114A KR102201122B1 KR 102201122 B1 KR102201122 B1 KR 102201122B1 KR 1020197002114 A KR1020197002114 A KR 1020197002114A KR 20197002114 A KR20197002114 A KR 20197002114A KR 102201122 B1 KR102201122 B1 KR 102201122B1
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wafer
design file
data
critical areas
processor
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KR20190014103A (ko
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파반 페랄리 (쿠마르)
후청 리
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케이엘에이 코포레이션
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • H10P74/232Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising connection or disconnection of parts of a device in response to a measurement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection
    • G06T7/0006Industrial image inspection using a design-rule based approach
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection
    • G06T7/001Industrial image inspection using an image reference approach
    • H01L22/22
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/70Determining position or orientation of objects or cameras
    • H01L22/12
    • H01L22/24
    • H01L22/30
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • H10P74/235Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising optical enhancement of defects or not-directly-visible states
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27Structural arrangements therefor
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/10Image acquisition modality
    • G06T2207/10056Microscopic image
    • G06T2207/10061Microscopic image from scanning electron microscope
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • G06T2207/30108Industrial image inspection
    • G06T2207/30148Semiconductor; IC; Wafer

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  • Engineering & Computer Science (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Manufacturing & Machinery (AREA)
KR1020197002114A 2016-06-29 2017-06-16 민감도 개선 및 뉴슨스 억제를 위해 로직 및 핫스팟 검사에서 z-층 컨텍스트를 사용하는 시스템 및 방법 Active KR102201122B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201662356499P 2016-06-29 2016-06-29
US62/356,499 2016-06-29
US15/600,784 US10304177B2 (en) 2016-06-29 2017-05-21 Systems and methods of using z-layer context in logic and hot spot inspection for sensitivity improvement and nuisance suppression
US15/600,784 2017-05-21
PCT/US2017/037934 WO2018005132A1 (en) 2016-06-29 2017-06-16 Systems and methods of using z-layer context in logic and hot spot inspection for sensitivity improvement and nuisance suppression

Publications (2)

Publication Number Publication Date
KR20190014103A KR20190014103A (ko) 2019-02-11
KR102201122B1 true KR102201122B1 (ko) 2021-01-08

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KR1020197002114A Active KR102201122B1 (ko) 2016-06-29 2017-06-16 민감도 개선 및 뉴슨스 억제를 위해 로직 및 핫스팟 검사에서 z-층 컨텍스트를 사용하는 시스템 및 방법

Country Status (7)

Country Link
US (1) US10304177B2 (https=)
JP (1) JP6906044B2 (https=)
KR (1) KR102201122B1 (https=)
CN (1) CN109314067B (https=)
IL (1) IL263315B (https=)
TW (1) TWI730133B (https=)
WO (1) WO2018005132A1 (https=)

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US11320742B2 (en) * 2018-10-31 2022-05-03 Taiwan Semiconductor Manufacturing Company Ltd. Method and system for generating photomask patterns
US11557031B2 (en) * 2019-11-21 2023-01-17 Kla Corporation Integrated multi-tool reticle inspection
US11887296B2 (en) * 2021-07-05 2024-01-30 KLA Corp. Setting up care areas for inspection of a specimen
KR102657751B1 (ko) * 2021-08-19 2024-04-16 주식회사 크레셈 학습모델을 이용한 기판 검사 방법

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US20050004774A1 (en) 2003-07-03 2005-01-06 William Volk Methods and systems for inspection of wafers and reticles using designer intent data
US20080167829A1 (en) 2007-01-05 2008-07-10 Allen Park Methods and systems for using electrical information for a device being fabricated on a wafer to perform one or more defect-related functions
US20150324965A1 (en) 2014-05-12 2015-11-12 Kla-Tencor Corporation Using High Resolution Full Die Image Data for Inspection

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US20070131877A9 (en) * 1999-11-29 2007-06-14 Takashi Hiroi Pattern inspection method and system therefor
JP2001331784A (ja) 2000-05-18 2001-11-30 Hitachi Ltd 欠陥分類方法及びその装置
EP1309875A2 (en) 2000-08-11 2003-05-14 Therma-Wave, Inc. Device and method for optical inspection of semiconductor wafer
US6918101B1 (en) * 2001-10-25 2005-07-12 Kla -Tencor Technologies Corporation Apparatus and methods for determining critical area of semiconductor design data
WO2004008245A2 (en) 2002-07-12 2004-01-22 Cadence Design Systems, Inc. Method and system for context-specific mask inspection
KR101565071B1 (ko) * 2005-11-18 2015-11-03 케이엘에이-텐코 코포레이션 검사 데이터와 조합하여 설계 데이터를 활용하는 방법 및 시스템
US7570796B2 (en) * 2005-11-18 2009-08-04 Kla-Tencor Technologies Corp. Methods and systems for utilizing design data in combination with inspection data
US8041103B2 (en) 2005-11-18 2011-10-18 Kla-Tencor Technologies Corp. Methods and systems for determining a position of inspection data in design data space
US7676077B2 (en) * 2005-11-18 2010-03-09 Kla-Tencor Technologies Corp. Methods and systems for utilizing design data in combination with inspection data
US7496874B2 (en) * 2005-12-21 2009-02-24 Inetrnational Business Machines Corporation Semiconductor yield estimation
WO2008077100A2 (en) 2006-12-19 2008-06-26 Kla-Tencor Corporation Systems and methods for creating inspection recipes
US8799831B2 (en) * 2007-05-24 2014-08-05 Applied Materials, Inc. Inline defect analysis for sampling and SPC
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US20050004774A1 (en) 2003-07-03 2005-01-06 William Volk Methods and systems for inspection of wafers and reticles using designer intent data
US20080167829A1 (en) 2007-01-05 2008-07-10 Allen Park Methods and systems for using electrical information for a device being fabricated on a wafer to perform one or more defect-related functions
US20150324965A1 (en) 2014-05-12 2015-11-12 Kla-Tencor Corporation Using High Resolution Full Die Image Data for Inspection

Also Published As

Publication number Publication date
TW201810482A (zh) 2018-03-16
IL263315B (en) 2020-08-31
JP6906044B2 (ja) 2021-07-21
US20180005367A1 (en) 2018-01-04
KR20190014103A (ko) 2019-02-11
WO2018005132A1 (en) 2018-01-04
IL263315A (en) 2018-12-31
TWI730133B (zh) 2021-06-11
CN109314067B (zh) 2020-07-17
JP2019527475A (ja) 2019-09-26
CN109314067A (zh) 2019-02-05
US10304177B2 (en) 2019-05-28

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