KR101753020B1 - 선택적 전력 또는 성능 최적화를 이용한 메모리 채널 인터리빙을 위한 시스템 및 방법 - Google Patents

선택적 전력 또는 성능 최적화를 이용한 메모리 채널 인터리빙을 위한 시스템 및 방법 Download PDF

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KR101753020B1
KR101753020B1 KR1020167005992A KR20167005992A KR101753020B1 KR 101753020 B1 KR101753020 B1 KR 101753020B1 KR 1020167005992 A KR1020167005992 A KR 1020167005992A KR 20167005992 A KR20167005992 A KR 20167005992A KR 101753020 B1 KR101753020 B1 KR 101753020B1
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memory
performance
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power saving
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KR20160040289A (ko
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덱스터 춘
얀루 리
알렉스 투
하우-징 로
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퀄컴 인코포레이티드
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
    • G11C14/009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1028—Power efficiency
    • Y02B60/1225—
    • Y02B60/1228—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Error Detection And Correction (AREA)
  • Mobile Radio Communication Systems (AREA)
KR1020167005992A 2013-08-08 2014-08-07 선택적 전력 또는 성능 최적화를 이용한 메모리 채널 인터리빙을 위한 시스템 및 방법 Active KR101753020B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/962,746 US9612648B2 (en) 2013-08-08 2013-08-08 System and method for memory channel interleaving with selective power or performance optimization
US13/962,746 2013-08-08
PCT/US2014/050208 WO2015021316A1 (en) 2013-08-08 2014-08-07 System and method for memory channel interleaving with selective power or performance optimization

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KR20160040289A KR20160040289A (ko) 2016-04-12
KR101753020B1 true KR101753020B1 (ko) 2017-07-03

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US (1) US9612648B2 (enExample)
EP (1) EP3030949B1 (enExample)
JP (1) JP6178512B2 (enExample)
KR (1) KR101753020B1 (enExample)
CN (1) CN105452986B (enExample)
BR (1) BR112016002454B1 (enExample)
CA (1) CA2918091C (enExample)
WO (1) WO2015021316A1 (enExample)

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US20170108911A1 (en) * 2015-10-16 2017-04-20 Qualcomm Incorporated System and method for page-by-page memory channel interleaving
US20170108914A1 (en) * 2015-10-16 2017-04-20 Qualcomm Incorporated System and method for memory channel interleaving using a sliding threshold address
US20170162235A1 (en) * 2015-12-02 2017-06-08 Qualcomm Incorporated System and method for memory management using dynamic partial channel interleaving
US20170262367A1 (en) * 2016-03-11 2017-09-14 Qualcomm Incorporated Multi-rank collision reduction in a hybrid parallel-serial memory system
US10140223B2 (en) * 2016-06-27 2018-11-27 Qualcomm Incorporated System and method for odd modulus memory channel interleaving
CN106201905B (zh) * 2016-07-11 2019-09-24 浪潮(北京)电子信息产业有限公司 一种内存编址方法
KR102707683B1 (ko) * 2016-07-12 2024-09-20 삼성전자주식회사 메모리 채널의 소프트웨어 트레이닝을 수행하는 전자 장치 및 그것의 메모리 채널 트레이닝 방법
CN106991007B (zh) * 2017-03-31 2019-09-03 青岛大学 一种基于gpu片上的数据处理方法及设备
JP6961997B2 (ja) * 2017-05-15 2021-11-05 富士通株式会社 情報処理装置、メモリ制御装置および情報処理装置の制御方法
CN107291537A (zh) * 2017-06-07 2017-10-24 江苏海平面数据科技有限公司 一种gpu片上存储空间使用的优化方法
KR102178931B1 (ko) * 2018-02-21 2020-11-13 서강대학교 산학협력단 힙 메모리 오브젝트의 에너지 소모량 예측 방법 및 이를 구현하는 메모리 시스템
US10628308B2 (en) 2018-05-24 2020-04-21 Qualcomm Incorporated Dynamic adjustment of memory channel interleave granularity
EP3800527B1 (en) * 2018-06-12 2025-01-22 Huawei Technologies Co., Ltd. Memory management method, device and system
CN108845958B (zh) * 2018-06-19 2022-05-17 中国科学院软件研究所 一种交织器映射和动态内存管理系统及方法
CN112513824B (zh) * 2018-07-31 2024-04-09 华为技术有限公司 一种内存交织方法及装置
US11256318B2 (en) * 2019-08-09 2022-02-22 Intel Corporation Techniques for memory access in a reduced power state
CN113157602B (zh) * 2020-01-07 2024-01-26 中科寒武纪科技股份有限公司 一种对内存进行分配的方法、设备及计算机可读存储介质
EP3945424B1 (en) * 2020-07-31 2024-01-17 NXP USA, Inc. Memory power management method and processor system
KR20220063335A (ko) 2020-11-10 2022-05-17 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
US12314761B2 (en) * 2021-02-12 2025-05-27 University Of Massachusetts System and method for memory allocation and management in non-uniform memory access architecture computing environments
US12164788B2 (en) 2021-11-15 2024-12-10 Samsung Electronics Co., Ltd. System on chip and operation method thereof
US12153529B2 (en) * 2022-05-17 2024-11-26 Samsung Electronics Co., Ltd. Memory system and computing system including the same
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Also Published As

Publication number Publication date
JP2016529618A (ja) 2016-09-23
US20150046732A1 (en) 2015-02-12
BR112016002454A2 (pt) 2017-08-01
CA2918091A1 (en) 2015-02-12
EP3030949B1 (en) 2019-05-22
BR112016002454B1 (pt) 2022-01-04
CN105452986A (zh) 2016-03-30
EP3030949A1 (en) 2016-06-15
JP6178512B2 (ja) 2017-08-09
WO2015021316A1 (en) 2015-02-12
KR20160040289A (ko) 2016-04-12
CN105452986B (zh) 2018-06-12
CA2918091C (en) 2021-03-02
US9612648B2 (en) 2017-04-04

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