KR101725828B1 - 메모리 어레이의 동작 전압을 조정하는 시스템 및 방법 - Google Patents
메모리 어레이의 동작 전압을 조정하는 시스템 및 방법 Download PDFInfo
- Publication number
- KR101725828B1 KR101725828B1 KR1020157028539A KR20157028539A KR101725828B1 KR 101725828 B1 KR101725828 B1 KR 101725828B1 KR 1020157028539 A KR1020157028539 A KR 1020157028539A KR 20157028539 A KR20157028539 A KR 20157028539A KR 101725828 B1 KR101725828 B1 KR 101725828B1
- Authority
- KR
- South Korea
- Prior art keywords
- voltage
- memory array
- nbti
- operating voltage
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G06F17/5072—
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Architecture (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Evolutionary Computation (AREA)
- Semiconductor Integrated Circuits (AREA)
- Power Sources (AREA)
- Static Random-Access Memory (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/842,263 US9378803B2 (en) | 2013-03-15 | 2013-03-15 | System and method to regulate operating voltage of a memory array |
| US13/842,263 | 2013-03-15 | ||
| PCT/US2014/023381 WO2014150487A2 (en) | 2013-03-15 | 2014-03-11 | System and method to regulate operating voltage of a memory array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20150131179A KR20150131179A (ko) | 2015-11-24 |
| KR101725828B1 true KR101725828B1 (ko) | 2017-04-11 |
Family
ID=50686112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020157028539A Expired - Fee Related KR101725828B1 (ko) | 2013-03-15 | 2014-03-11 | 메모리 어레이의 동작 전압을 조정하는 시스템 및 방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9378803B2 (https=) |
| EP (1) | EP2973577B1 (https=) |
| JP (1) | JP6069575B2 (https=) |
| KR (1) | KR101725828B1 (https=) |
| CN (1) | CN105027214B (https=) |
| WO (1) | WO2014150487A2 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9251909B1 (en) | 2014-09-29 | 2016-02-02 | International Business Machines Corporation | Background threshold voltage shifting using base and delta threshold voltage shift values in flash memory |
| US10126791B2 (en) * | 2014-11-04 | 2018-11-13 | Progranalog Corp. | Configurable power management integrated circuit |
| EP3379416B1 (en) * | 2017-03-24 | 2023-06-14 | Nxp B.V. | Memory system |
| KR102831926B1 (ko) * | 2020-10-16 | 2025-07-10 | 에스케이하이닉스 주식회사 | 저장 장치 및 그 동작 방법 |
| KR102893634B1 (ko) * | 2021-10-29 | 2025-12-09 | 삼성전자주식회사 | 스토리지 장치 및 스토리지 장치의 제어 방법 |
| US12379768B2 (en) | 2021-12-22 | 2025-08-05 | Samsung Electronics Co., Ltd. | Electronic device and method of controlling temperature associated with a semiconductor device using dynamic voltage frequency scaling (DVFS) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050201188A1 (en) | 2004-03-11 | 2005-09-15 | International Business Machines Corporation | Method and apparatus for improving performance margin in logic paths |
| US20110080202A1 (en) | 2009-03-30 | 2011-04-07 | Qualcomm Incorporated | ADAPTIVE VOLTAGE SCALERS (AVSs), SYSTEMS, AND RELATED METHODS |
| US20120119825A1 (en) | 2010-11-17 | 2012-05-17 | Bo Zhai | Circuit for negative bias temperature instability compensation |
| US20120206183A1 (en) | 2009-11-06 | 2012-08-16 | Freescale Semiconductor, Inc. | Response to wearout in an electronic device |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06314491A (ja) * | 1993-04-30 | 1994-11-08 | Hitachi Ltd | 半導体記憶装置 |
| US7941675B2 (en) | 2002-12-31 | 2011-05-10 | Burr James B | Adaptive power control |
| US6933869B1 (en) | 2004-03-17 | 2005-08-23 | Altera Corporation | Integrated circuits with temperature-change and threshold-voltage drift compensation |
| KR100735677B1 (ko) | 2005-12-28 | 2007-07-04 | 삼성전자주식회사 | 스탠바이 전류 저감 회로 및 이를 구비한 반도체 메모리장치 |
| JP2007323770A (ja) * | 2006-06-02 | 2007-12-13 | Renesas Technology Corp | Sram |
| US20090168573A1 (en) | 2007-12-31 | 2009-07-02 | Ming Zhang | Adaptive memory array voltage adjustment |
| US8593203B2 (en) | 2008-07-29 | 2013-11-26 | Qualcomm Incorporated | High signal level compliant input/output circuits |
| US8161431B2 (en) | 2008-10-30 | 2012-04-17 | Agere Systems Inc. | Integrated circuit performance enhancement using on-chip adaptive voltage scaling |
| JP2011054248A (ja) * | 2009-09-02 | 2011-03-17 | Toshiba Corp | 参照電流生成回路 |
| US8354875B2 (en) | 2010-03-25 | 2013-01-15 | Qualcomm Incorporated | Low voltage temperature sensor and use thereof for autonomous multiprobe measurement device |
-
2013
- 2013-03-15 US US13/842,263 patent/US9378803B2/en active Active
-
2014
- 2014-03-11 WO PCT/US2014/023381 patent/WO2014150487A2/en not_active Ceased
- 2014-03-11 JP JP2016501222A patent/JP6069575B2/ja not_active Expired - Fee Related
- 2014-03-11 EP EP14722821.7A patent/EP2973577B1/en active Active
- 2014-03-11 KR KR1020157028539A patent/KR101725828B1/ko not_active Expired - Fee Related
- 2014-03-11 CN CN201480013005.6A patent/CN105027214B/zh active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050201188A1 (en) | 2004-03-11 | 2005-09-15 | International Business Machines Corporation | Method and apparatus for improving performance margin in logic paths |
| US20110080202A1 (en) | 2009-03-30 | 2011-04-07 | Qualcomm Incorporated | ADAPTIVE VOLTAGE SCALERS (AVSs), SYSTEMS, AND RELATED METHODS |
| US20120206183A1 (en) | 2009-11-06 | 2012-08-16 | Freescale Semiconductor, Inc. | Response to wearout in an electronic device |
| US20120119825A1 (en) | 2010-11-17 | 2012-05-17 | Bo Zhai | Circuit for negative bias temperature instability compensation |
Also Published As
| Publication number | Publication date |
|---|---|
| US9378803B2 (en) | 2016-06-28 |
| CN105027214A (zh) | 2015-11-04 |
| WO2014150487A2 (en) | 2014-09-25 |
| CN105027214B (zh) | 2017-10-27 |
| EP2973577A2 (en) | 2016-01-20 |
| KR20150131179A (ko) | 2015-11-24 |
| US20140269020A1 (en) | 2014-09-18 |
| WO2014150487A3 (en) | 2014-11-13 |
| EP2973577B1 (en) | 2017-12-20 |
| JP6069575B2 (ja) | 2017-02-01 |
| JP2016521428A (ja) | 2016-07-21 |
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