CN105027214B - 用于调节存储器阵列的工作电压的系统和方法 - Google Patents

用于调节存储器阵列的工作电压的系统和方法 Download PDF

Info

Publication number
CN105027214B
CN105027214B CN201480013005.6A CN201480013005A CN105027214B CN 105027214 B CN105027214 B CN 105027214B CN 201480013005 A CN201480013005 A CN 201480013005A CN 105027214 B CN105027214 B CN 105027214B
Authority
CN
China
Prior art keywords
voltage
memory array
operating voltage
nbti
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201480013005.6A
Other languages
English (en)
Chinese (zh)
Other versions
CN105027214A (zh
Inventor
S·S·宋
Z·王
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN105027214A publication Critical patent/CN105027214A/zh
Application granted granted Critical
Publication of CN105027214B publication Critical patent/CN105027214B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Architecture (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Sources (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
CN201480013005.6A 2013-03-15 2014-03-11 用于调节存储器阵列的工作电压的系统和方法 Active CN105027214B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/842,263 US9378803B2 (en) 2013-03-15 2013-03-15 System and method to regulate operating voltage of a memory array
US13/842,263 2013-03-15
PCT/US2014/023381 WO2014150487A2 (en) 2013-03-15 2014-03-11 System and method to regulate operating voltage of a memory array

Publications (2)

Publication Number Publication Date
CN105027214A CN105027214A (zh) 2015-11-04
CN105027214B true CN105027214B (zh) 2017-10-27

Family

ID=50686112

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480013005.6A Active CN105027214B (zh) 2013-03-15 2014-03-11 用于调节存储器阵列的工作电压的系统和方法

Country Status (6)

Country Link
US (1) US9378803B2 (https=)
EP (1) EP2973577B1 (https=)
JP (1) JP6069575B2 (https=)
KR (1) KR101725828B1 (https=)
CN (1) CN105027214B (https=)
WO (1) WO2014150487A2 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9251909B1 (en) 2014-09-29 2016-02-02 International Business Machines Corporation Background threshold voltage shifting using base and delta threshold voltage shift values in flash memory
US10126791B2 (en) * 2014-11-04 2018-11-13 Progranalog Corp. Configurable power management integrated circuit
EP3379416B1 (en) * 2017-03-24 2023-06-14 Nxp B.V. Memory system
KR102831926B1 (ko) * 2020-10-16 2025-07-10 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법
KR102893634B1 (ko) * 2021-10-29 2025-12-09 삼성전자주식회사 스토리지 장치 및 스토리지 장치의 제어 방법
US12379768B2 (en) 2021-12-22 2025-08-05 Samsung Electronics Co., Ltd. Electronic device and method of controlling temperature associated with a semiconductor device using dynamic voltage frequency scaling (DVFS)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010117795A2 (en) * 2009-03-30 2010-10-14 Qualcomm Incorporated Adaptive voltage scalers (avss), systems, and related methods
CN102597906A (zh) * 2009-11-06 2012-07-18 飞思卡尔半导体公司 对电子器件中的损耗的响应

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06314491A (ja) * 1993-04-30 1994-11-08 Hitachi Ltd 半導体記憶装置
US7941675B2 (en) 2002-12-31 2011-05-10 Burr James B Adaptive power control
US7317605B2 (en) * 2004-03-11 2008-01-08 International Business Machines Corporation Method and apparatus for improving performance margin in logic paths
US6933869B1 (en) 2004-03-17 2005-08-23 Altera Corporation Integrated circuits with temperature-change and threshold-voltage drift compensation
KR100735677B1 (ko) 2005-12-28 2007-07-04 삼성전자주식회사 스탠바이 전류 저감 회로 및 이를 구비한 반도체 메모리장치
JP2007323770A (ja) * 2006-06-02 2007-12-13 Renesas Technology Corp Ｓｒａｍ
US20090168573A1 (en) 2007-12-31 2009-07-02 Ming Zhang Adaptive memory array voltage adjustment
US8593203B2 (en) 2008-07-29 2013-11-26 Qualcomm Incorporated High signal level compliant input/output circuits
US8161431B2 (en) 2008-10-30 2012-04-17 Agere Systems Inc. Integrated circuit performance enhancement using on-chip adaptive voltage scaling
JP2011054248A (ja) * 2009-09-02 2011-03-17 Toshiba Corp 参照電流生成回路
US8354875B2 (en) 2010-03-25 2013-01-15 Qualcomm Incorporated Low voltage temperature sensor and use thereof for autonomous multiprobe measurement device
US8330534B2 (en) * 2010-11-17 2012-12-11 Advanced Micro Devices, Inc. Circuit for negative bias temperature instability compensation

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010117795A2 (en) * 2009-03-30 2010-10-14 Qualcomm Incorporated Adaptive voltage scalers (avss), systems, and related methods
CN102597906A (zh) * 2009-11-06 2012-07-18 飞思卡尔半导体公司 对电子器件中的损耗的响应

Also Published As

Publication number Publication date
US9378803B2 (en) 2016-06-28
CN105027214A (zh) 2015-11-04
WO2014150487A2 (en) 2014-09-25
KR101725828B1 (ko) 2017-04-11
EP2973577A2 (en) 2016-01-20
KR20150131179A (ko) 2015-11-24
US20140269020A1 (en) 2014-09-18
WO2014150487A3 (en) 2014-11-13
EP2973577B1 (en) 2017-12-20
JP6069575B2 (ja) 2017-02-01
JP2016521428A (ja) 2016-07-21

Similar Documents

Publication Publication Date Title
CN105027214B (zh) 用于调节存储器阵列的工作电压的系统和方法
US8810224B2 (en) System and method to regulate voltage
CN102301423A (zh) 脉冲产生系统及方法
CN102804275A (zh) 具有电流镜射的差分读出放大器以及参考存储器单元
CN107003708B (zh) 用于整体能量管理的电压缩放
CN103620685B (zh) 感测电路
WO2012040381A1 (en) Amplitude control for oscillator
CN103620684B (zh) 感测电路
US8593227B2 (en) System and method of controlling gain of an oscillator
US20130106390A1 (en) Curvature-compensated band-gap voltage reference circuit
US9461040B2 (en) System and method of varying gate lengths of multiple cores
US8581667B2 (en) Tuning voltage range extension circuit and method
US8618832B2 (en) Balanced single-ended impedance control
US9542518B2 (en) User experience based management technique for mobile system-on-chips

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant