KR101701360B1 - 격리 트렌치 라이너를 가지는 반도체 장치 및 관련된 제조 방법 - Google Patents

격리 트렌치 라이너를 가지는 반도체 장치 및 관련된 제조 방법 Download PDF

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KR101701360B1
KR101701360B1 KR1020117006475A KR20117006475A KR101701360B1 KR 101701360 B1 KR101701360 B1 KR 101701360B1 KR 1020117006475 A KR1020117006475 A KR 1020117006475A KR 20117006475 A KR20117006475 A KR 20117006475A KR 101701360 B1 KR101701360 B1 KR 101701360B1
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layer
liner
gate
trench
overlying
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KR20110102868A (ko
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리챠드 카터
죠지 크루쓰
마이클 하그로브
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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Assigned to 쳉두 하이구앙 인터그레이티드 서큐트 디자인 컴퍼니 리미티드 reassignment 쳉두 하이구앙 인터그레이티드 서큐트 디자인 컴퍼니 리미티드 권리의 전부이전등록 Assignors: 어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches

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  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
KR1020117006475A 2008-08-27 2009-08-10 격리 트렌치 라이너를 가지는 반도체 장치 및 관련된 제조 방법 Active KR101701360B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/199,616 2008-08-27
US12/199,616 US7998832B2 (en) 2008-08-27 2008-08-27 Semiconductor device with isolation trench liner, and related fabrication methods
PCT/US2009/053271 WO2010025024A1 (en) 2008-08-27 2009-08-10 Semiconductor device with isolation trench liner, and related fabrication methods

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020177002051A Division KR101810111B1 (ko) 2008-08-27 2009-08-10 격리 트렌치 라이너를 가지는 반도체 장치 및 관련된 제조 방법

Publications (2)

Publication Number Publication Date
KR20110102868A KR20110102868A (ko) 2011-09-19
KR101701360B1 true KR101701360B1 (ko) 2017-02-01

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KR1020117006475A Active KR101701360B1 (ko) 2008-08-27 2009-08-10 격리 트렌치 라이너를 가지는 반도체 장치 및 관련된 제조 방법
KR1020177002051A Active KR101810111B1 (ko) 2008-08-27 2009-08-10 격리 트렌치 라이너를 가지는 반도체 장치 및 관련된 제조 방법

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Country Link
US (3) US7998832B2 (https=)
EP (1) EP2324496B1 (https=)
JP (1) JP5619003B2 (https=)
KR (2) KR101701360B1 (https=)
CN (1) CN102132397B (https=)
WO (1) WO2010025024A1 (https=)

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US20110014726A1 (en) * 2009-07-20 2011-01-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming shallow trench isolation structure
US8716095B2 (en) * 2010-06-03 2014-05-06 Institute of Microelectronics, Chinese Academy of Sciences Manufacturing method of gate stack and semiconductor device
US8680644B2 (en) * 2011-04-11 2014-03-25 International Business Machines Coroporation Semiconductor device and method for making same
US8530312B2 (en) 2011-08-08 2013-09-10 Micron Technology, Inc. Vertical devices and methods of forming
FR2981793A1 (fr) * 2011-10-25 2013-04-26 St Microelectronics Crolles 2 Procede de fabrication de transistors a grille isolee
US8564074B2 (en) * 2011-11-29 2013-10-22 International Business Machines Corporation Self-limiting oxygen seal for high-K dielectric and design structure
JP5999525B2 (ja) * 2012-03-23 2016-09-28 国立研究開発法人科学技術振興機構 薄膜トランジスタ及び薄膜トランジスタの製造方法
US20130341762A1 (en) * 2012-06-20 2013-12-26 Macronix International Co., Ltd. Semiconductor hole structure
US9059243B2 (en) 2012-06-25 2015-06-16 International Business Machines Corporation Shallow trench isolation structures
JP6033594B2 (ja) * 2012-07-18 2016-11-30 国立大学法人北陸先端科学技術大学院大学 薄膜トランジスタ及び薄膜トランジスタの製造方法
KR20140059107A (ko) * 2012-11-07 2014-05-15 주식회사 유피케미칼 실리콘 질화물 박막 제조 방법
US8900952B2 (en) 2013-03-11 2014-12-02 International Business Machines Corporation Gate stack including a high-k gate dielectric that is optimized for low voltage applications
US20140315371A1 (en) * 2013-04-17 2014-10-23 International Business Machines Corporation Methods of forming isolation regions for bulk finfet semiconductor devices
US9679917B2 (en) 2014-12-23 2017-06-13 International Business Machines Corporation Semiconductor structures with deep trench capacitor and methods of manufacture
US9991124B2 (en) * 2015-01-20 2018-06-05 Taiwan Semiconductor Manufacturing Company Ltd. Metal gate and manufacturing method thereof
KR102271239B1 (ko) 2015-03-23 2021-06-29 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US9865703B2 (en) 2015-12-31 2018-01-09 International Business Machines Corporation High-K layer chamfering to prevent oxygen ingress in replacement metal gate (RMG) process
US10504912B2 (en) * 2017-07-28 2019-12-10 Taiwan Semiconductor Manufacturing Co., Ltd. Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology
DE102018107908B4 (de) * 2017-07-28 2023-01-05 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum Bilden eines integrierten Schaltkreises mit einer Versiegelungsschicht zum Bilden einer Speicherzellenstruktur in Logik- oder BCD-Technologie sowie ein integrierter Schaltkreis mit einer Dummy-Struktur an einer Grenze einer Vorrichtungsregion
CN110707086B (zh) * 2018-10-09 2022-02-18 联华电子股份有限公司 半导体元件
TW202209688A (zh) * 2020-06-05 2022-03-01 日商Ｆｌｏｓｆｉａ股份有限公司 半導體裝置
KR20220085482A (ko) 2020-12-15 2022-06-22 삼성전자주식회사 반도체 소자
CN117156850A (zh) * 2022-05-18 2023-12-01 联华电子股份有限公司 半导体元件及其制作方法

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JP2004134757A (ja) 2002-08-22 2004-04-30 Chartered Semiconductor Mfg Ltd ダマシンゲート構造物を分離領域に対して自己整合する方法
US7071515B2 (en) * 2003-07-14 2006-07-04 Taiwan Semiconductor Manufacturing Co., Ltd. Narrow width effect improvement with photoresist plug process and STI corner ion implantation
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Also Published As

Publication number Publication date
US8716828B2 (en) 2014-05-06
CN102132397B (zh) 2016-06-29
JP5619003B2 (ja) 2014-11-05
US20110260263A1 (en) 2011-10-27
US8217472B2 (en) 2012-07-10
US20100052094A1 (en) 2010-03-04
KR101810111B1 (ko) 2017-12-18
KR20110102868A (ko) 2011-09-19
JP2012501542A (ja) 2012-01-19
US7998832B2 (en) 2011-08-16
WO2010025024A1 (en) 2010-03-04
EP2324496B1 (en) 2018-10-10
KR20170013403A (ko) 2017-02-06
CN102132397A (zh) 2011-07-20
EP2324496A1 (en) 2011-05-25
US20120223399A1 (en) 2012-09-06

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