KR101604271B1 - In plane switching mode liquid crystal display device and method of fabricating the same - Google Patents

Abstract

The transverse electric field type liquid crystal display device and the manufacturing method thereof according to the present invention reduce the number of masks by simultaneously patterning the data lines and the pixel electrodes by using a half tone mask and a lift off, The manufacturing cost is reduced, and a dummy pattern is formed under the data line to connect to the data line through the hole, thereby self-repairing disconnection defects of the data line.

In the transverse electric field type liquid crystal display device and the method of manufacturing the same, the active pattern is formed in an island shape above the gate electrode and the active tail is not present under the data line, thereby increasing the opening area of the pixel portion And is also characterized by being able to prevent a phenomenon of wavy noise which is caused when light is not exposed due to light.

Half-tone mask, data line, pixel electrode, dummy pattern, self-repair

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a transverse electric field type liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transverse electric field type liquid crystal display device and a manufacturing method thereof, and more particularly, to a transverse electric field type liquid crystal display device and a method of manufacturing the same, which can simplify a manufacturing process and improve a yield, To a liquid crystal display device and a manufacturing method thereof.

Recently, interest in information display has increased, and a demand for using portable information media has increased, and a light-weight flat panel display (FPD) that replaces a cathode ray tube (CRT) And research and commercialization are being carried out. Particularly, among such flat panel display devices, a liquid crystal display (LCD) is an apparatus for displaying an image using the optical anisotropy of a liquid crystal, and is excellent in resolution, color display and picture quality and is actively applied to a notebook or a desktop monitor have.

The liquid crystal display comprises a color filter substrate, an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

An active matrix (AM) method, which is a driving method mainly used in the liquid crystal display, is a method of driving a liquid crystal of a pixel portion by using an amorphous silicon thin film transistor (a-Si TFT) to be.

Since the manufacturing process of the liquid crystal display device basically requires a plurality of mask processes (that is, a photolithography process) to fabricate an array substrate including thin film transistors, a method of reducing the number of masks in terms of productivity is required ought.

Hereinafter, the structure of a typical liquid crystal display device will be described in detail with reference to FIG.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

As shown in the figure, the liquid crystal display comprises a color filter substrate 5, an array substrate 10, and a liquid crystal layer (not shown) formed between the color filter substrate 5 and the array substrate 10 30).

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 implementing colors of red (R), green (G) and blue (B) A black matrix 6 for separating the sub-color filters 7 from each other and shielding light transmitted through the liquid crystal layer 30 and a transparent common electrode for applying a voltage to the liquid crystal layer 30 8).

The array substrate 10 includes a plurality of gate lines 16 and data lines 17 arranged vertically and horizontally to define a plurality of pixel regions P and a plurality of gate lines 16 and data lines 17 A thin film transistor T which is a switching element formed in the intersection region and a pixel electrode 18 formed on the pixel region P. [

The color filter substrate 5 and the array substrate 10 constituted as described above are adhered to each other so as to oppose each other by a sealant (not shown) formed on the periphery of the image display area to constitute a liquid crystal display panel, 5 and the array substrate 10 are bonded together through a cemented key (not shown) formed on the color filter substrate 5 or the array substrate 10.

In this case, there is a twisted nematic (TN) method in which a nematic liquid crystal molecule is driven in a direction perpendicular to a substrate by a driving method generally used in the liquid crystal display device. However, the twisted nematic liquid crystal display Has a disadvantage that the viewing angle is narrow. This is due to the refractive anisotropy of the liquid crystal molecules, and the liquid crystal molecules aligned horizontally with the substrate are oriented in a direction substantially perpendicular to the substrate when a voltage is applied to the liquid crystal display panel.

A transverse electric field type liquid crystal display device in which liquid crystal molecules are driven in a horizontal direction with respect to a substrate to improve a viewing angle has been developed and will be described in detail with reference to FIG.

2 is a plan view schematically showing a part of an array substrate of a general transverse electric field type liquid crystal display device.

As shown in the figure, on the array substrate 10 of a general transverse electric field type liquid crystal display device, a gate line 16 and a data line 17, which are vertically and horizontally arranged on the array substrate 10, Respectively. A thin film transistor, which is a switching device, is formed in an intersecting region of the gate line 16 and the data line 17. A common electrode 8 (not shown) for driving a liquid crystal (not shown) And a pixel electrode 18 are alternately formed.

The thin film transistor is connected to the pixel electrode 18 through a gate electrode 21 constituting a part of the gate line 16, a source electrode 22 connected to the data line 17 and a pixel electrode line 18l. And a drain electrode 23 electrically connected thereto. The thin film transistor includes an active pattern (not shown) that forms a conduction channel between the source electrode 22 and the drain electrode 23 by a gate voltage supplied to the gate electrode 21.

A part of the source electrode 22 extends in one direction to form a part of the data line 17 and a part of the drain electrode 23 extends toward the pixel region to form a first contact hole (not shown) The pixel electrode line 181 and the pixel electrode 18 are electrically connected to each other through the through hole 40a.

As described above, in the pixel region, a plurality of common electrodes 8 and pixel electrodes 18 for generating a transverse electric field are alternately arranged.

At this time, a common line 8L is formed at a lower end of the pixel region substantially parallel to the gate line 16, and a pair of first Lines 8a and 8a 'are formed.

At this time, the plurality of common electrodes 8 are connected to each other by an upper common electrode line 81 disposed on one side thereof substantially parallel to the gate line 16, and the common electrode line 81 And are electrically connected to the first lines 8a and 8a 'through the second contact holes 40b formed in the protective film.

At this time, a part of the pixel electrode line 181 overlaps with a part of the common line 8L under the gate insulating film (not shown) and the protective film to form a storage capacitor Cst .

Generally, a total of five photolithography processes are required to pattern gate electrodes, active patterns, source / drain electrodes, contact holes, and pixel electrodes in the fabrication of the array substrate including the thin film transistors.

The photolithography process is a series of processes for transferring a pattern drawn on a mask onto a substrate on which a thin film is deposited to form a desired pattern. The photolithography process includes a plurality of processes such as a photoresist application, an exposure, and a development process. There is a drawback that it drops.

In particular, the mask designed to form the pattern is very expensive, so that the manufacturing cost of the liquid crystal display device increases proportionally as the number of masks applied to the process increases.

At this time, a technology has been developed in which an active pattern and a source / drain electrode are formed by a single mask process using a diffraction mask, so that an array substrate can be manufactured by a total of four mask processes.

However, in the liquid crystal display device of the above structure, since the active pattern and the source / drain electrodes are patterned through the two etching processes by using the diffraction mask, the source electrode and the drain electrode and the data line, The active tail protruding from the active pattern remains.

The active tail is made of a pure amorphous silicon thin film, and the protruded active tail is exposed to the backlight of the lower part, so that the photocurrent is generated by the backlight. At this time, the amorphous silicon thin film reacts finely due to a minute flickering of the backlight, and the activation and deactivation states are repeated, thereby causing a change in the photocurrent. Such a photocurrent component is coupled together with a signal flowing to neighboring pixel electrodes to distort the movement of the liquid crystal located on the pixel electrodes. As a result, wavy noise is generated on the screen of the liquid crystal display device in which a thin line of a wave pattern appears.

In addition, the active tail located below the data line protrudes to both sides of the data line by a predetermined distance, so that the aperture ratio of the liquid crystal display device decreases as the aperture region of the pixel portion is eroded by the protruded distance.

The manufacturing method of the liquid crystal display device includes an array process of forming a switching device on an array substrate and a color filter process of forming a color filter on the color filter substrate. The array substrate and the color filter substrate fabricated through the array process and the color filter process are finally bonded together through a cell process to complete the liquid crystal display panel .

The cell process has relatively few repetitive processes as compared with the array process and the color filter process. The cell process is largely divided into an alignment film forming process for aligning liquid crystal molecules, a cell gap forming process, a cell cutting process, . On the other hand, the liquid crystal display panels fabricated through such processes are selected through quality inspection. When a polarizing plate is attached to the outside of the liquid crystal display panel selected by good products, and then a driving circuit is connected, the liquid crystal display device is completed.

At this time, if a defective pixel is found in the inspection process of the liquid crystal display device, the repair process is performed.

The defects of the liquid crystal display device include point defects such as color defects, bright spots (always on) and dark spots (always off) for each pixel and shorts between adjacent wirings. Open, and line defects caused by destruction of the switching element due to static electricity.

Particularly, although a laser repair process using a laser is generally used to repair disconnection defects such as the open, the laser repair process requires expensive laser repair equipment and the laser repair is directly performed by the inspector There is a disadvantage in that a production loss due to the addition of the repairing process occurs.

An object of the present invention is to provide a transverse electric field type liquid crystal display device in which an array substrate without an active tail is manufactured by three mask processes, and a manufacturing method thereof.

It is another object of the present invention to provide a transverse electric field type liquid crystal display device capable of realizing high brightness by enlarging an aperture region and at the same time realizing high image quality without generation of a noisy noise and a method of manufacturing the same.

It is another object of the present invention to provide a transverse electric field type liquid crystal display device capable of self-repairing disconnection of a data line without addition of a repair process and a manufacturing method thereof.

Other objects and features of the present invention will be described in the following description of the invention and claims.

According to an aspect of the present invention, there is provided a transverse electric field type liquid crystal display device including a gate electrode, a gate line, and a dummy pattern formed on a pixel portion of a first substrate, A data line formed of a conductive film and defining a pixel region intersecting with the gate line and electrically connected to the dummy pattern through a first contact hole, and a second conductive film on the gate insulating film of the pixel region A common electrode disposed alternately to generate a transverse electric field, a pixel electrode, and a protective film on the gate insulating film of the pixel region excluding the common electrode and the pixel electrode.

A method of manufacturing a transverse electric field type liquid crystal display device according to the present invention includes the steps of forming a gate electrode and a gate line and a dummy pattern made of a first conductive film in a pixel portion of a first substrate through a first mask process, Forming an active pattern on the gate electrode through a third mask process, forming a third conductive film on the gate electrode through a third mask process, and forming a source / drain region electrically connected to a source / Forming a common electrode and a pixel electrode which are alternately arranged to form a transverse electric field and are formed of a second conductive film on the gate insulating film of the pixel region using the third mask process; Forming an insulating material on the entire surface of the first substrate in a state in which the photoresist pattern used in the masking process remains, Forming a protective film on the gate insulating film of the pixel region excluding the pixel electrode by removing the insulating material above the photoresist pattern with the photoresist pattern.

As described above, the transverse electric field type liquid crystal display device and the manufacturing method thereof according to the present invention reduce the number of masks used in the manufacture of thin film transistors, thereby reducing the manufacturing process and cost.

In addition, in the transverse electric field type liquid crystal display device and the method of manufacturing the same according to the present invention, there is no active tail, so there is no signal interference of the data line and the aperture ratio is increased by the active tail width.

In addition, the transverse electric field type liquid crystal display device and the manufacturing method thereof according to the present invention provide an effect of producing a high-quality liquid crystal display device without occurrence of wave noise.

In addition, the transverse electric field type liquid crystal display device and the method of manufacturing the same according to the present invention may form a dummy pattern under the data lines and connect the data lines with the data lines through the holes, thereby improving the disconnection of the data lines caused by two- It provides self-repairing effect.

Hereinafter, preferred embodiments of a transverse electric field type liquid crystal display device and a manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a plan view schematically showing a part of an array substrate of an in-plane switching (IPS) liquid crystal display device according to an embodiment of the present invention. For convenience of explanation, And one pixel including a transistor.

In an actual liquid crystal display device, N number of gate lines and M number of data lines intersect to form MxN pixels, but one pixel is shown in the figure for simplicity.

Here, the liquid crystal display device of the transverse electric field system is described as an example, but the present invention is not limited thereto, and the present invention can also be applied to a twisted nematic liquid crystal display device.

As described above, the twisted nematic liquid crystal display has the disadvantage that the viewing angle is narrow. This is because of the refractive index anisotropy of liquid crystal molecules, and liquid crystal molecules aligned horizontally with the substrate are oriented in a direction substantially perpendicular to the substrate when a voltage is applied to the liquid crystal display panel.

A liquid crystal display device of a transverse electric field type in which a liquid crystal molecule is driven in a horizontal direction with respect to a substrate to improve a viewing angle has been developed, and the transverse electric field type liquid crystal display device is exemplified by the present invention.

As shown in the drawing, a gate line 116 and a data line 117 are formed on an array substrate 110 on the array substrate 110 in the vertical and horizontal directions to define pixel regions have. A thin film transistor, which is a switching element, is formed in an intersection region of the gate line 116 and the data line 117. A common electrode 108 (not shown) for generating a transverse electric field to drive a liquid crystal And a pixel electrode 118 are alternately formed.

The thin film transistor is connected to the pixel electrode 118 through a gate electrode 121 constituting a part of the gate line 116, a source electrode 122 connected to the data line 117 and a pixel electrode line 1181 And a drain electrode 123 electrically connected thereto. The thin film transistor includes an active pattern (not shown) that forms a conduction channel between the source electrode 122 and the drain electrode 123 by a gate voltage supplied to the gate electrode 121. Although the thin film transistor having the U-shaped shape of the source electrode 122 and the U-shaped channel is shown in the drawing, the present invention is not limited to this, It can be applied regardless of the channel type of the transistor.

A part of the source electrode 122 extends in one direction and constitutes a part of the data line 117. A part of the drain electrode 123 extends toward the pixel region, And is electrically connected to the electrode 118.

At this time, the source electrode 122, the drain electrode 123 and the data line 117 according to the embodiment of the present invention may be made of a low-resistance conductive material such as copper, A source electrode pattern made of a conductive material such as molybdenum titanium (MoTi) and patterned to have substantially the same shape as that of the source electrode 122, the drain electrode 123 and the data line 117 ), A drain electrode pattern (not shown) and a data line pattern (not shown), respectively.

In the transverse electric field type liquid crystal display device according to the embodiment of the present invention, a dummy pattern 114 made of a conductive material constituting the gate electrode 121 and the gate line 116 is formed under the data line 117 And the dummy pattern 114 is connected to the data line 117 at the upper part through the first contact hole 140a formed in a gate insulating film (not shown). Although the first contact holes 140a are formed on the dummy patterns 114 at the upper and lower ends of the dummy patterns 114, the present invention is not limited thereto, Even if a disconnection defect occurs in which a part of the data line 117 is opened by etching twice, the insulating layer 140a is connected to the lower dummy pattern 114 to be self- .

As described above, in the pixel region, a plurality of common electrodes 108 and pixel electrodes 118 for generating a transverse electric field are alternately arranged.

At this time, a common line 108L is formed at a lower end of the pixel region substantially parallel to the gate line 116, and a pair of first lines 108L connected to the common line 108L are formed at left and right edges of the pixel region, Lines 108a and 108a 'are formed.

At this time, a pair of outermost pixel electrodes 118 adjacent to the data line 117 among the plurality of pixel electrodes 118 overlap with a part of the pair of first lines 108a and 108a ' On the other hand, the plurality of common electrodes 108 are connected to each other by a common electrode line 1081 at the upper end, which is arranged substantially parallel to one side of the gate line 116. The common electrode line 1081 is electrically connected to the first lines 108a and 108a 'through a second contact hole 140b formed in a protective film (not shown) And transmits the common voltage to the plurality of common electrodes 108.

The first lines 108a and 108a 'are made of the same opaque conductive material as the common lines 108L and the gate electrodes 121 and the gate lines 116. The common lines 108 and the pixel electrodes 118 And the common electrode line 1081 and the pixel electrode line 1181 may be made of the same conductive material as the source electrode pattern, the drain electrode pattern, and the data line pattern.

At this time, a part of the pixel electrode line 1181 overlaps with a part of the common line 108L under the gate insulating film, thereby forming the storage capacitor Cst. The storage capacitor Cst serves to keep the voltage applied to the liquid crystal capacitor constant until the next signal is input. These storage capacitors have effects such as stabilization of gray scale display and reduction of flicker and afterimage in addition to signal retention.

A gate pad electrode 126p and a data pad electrode 127p electrically connected to the gate line 116 and the data line 117 are formed in the edge region of the array substrate 110, The scan signal and the data signal received from the driver circuit portion (not shown) of the scan driver 116 and the data line 117, respectively.

That is, the gate line 116 and the data line 117 extend to the driving circuit portion and are connected to the corresponding gate pad line 116p and the data pad line 117p, respectively. The line 117p is supplied with a scanning signal from the driving circuit through the gate pad electrode 126p and the data pad electrode 127p which are electrically connected to the gate pad line 116p and the data pad line 117p, .

Reference numerals 140c and 140d denote a third contact hole and a fourth contact hole formed in the gate insulating layer. The data pad electrode 127p is connected to the data pad line (not shown) through the third contact hole 140c 117p, respectively. Also, the gate pad electrode 126p is electrically connected to the gate pad line 116p through the fourth contact hole 140d.

3, when the common electrode 108, the pixel electrode 118, and the data line 117 according to the exemplary embodiment of the present invention have a bending structure, the liquid crystal molecules are aligned in two directions So that the viewing angle is further improved compared to the mono-domain by forming a 2-domain. However, the present invention is not limited to the transverse electric field type liquid crystal display device having the two-domain structure, and the present invention is applicable to a transverse electric field type liquid crystal display device having a multi-domain structure of two or more domains. For reference, the IPS structure forming the multi-domain of the 2-domain or more is referred to as an S-IPS (super-IPS) structure.

When the common electrode 108, the pixel electrode 118, and the data line 117 are formed in a bent structure to form a multi-domain structure in which the driving directions of the liquid crystal molecules are symmetrical, birefringence (birefringence) ) Characteristic, the color shift phenomenon can be minimized.

Also, since the active pattern according to the embodiment of the present invention is formed of an amorphous silicon thin film and is formed in an island shape only on the gate electrode 121, off current of the thin film transistor can be reduced.

Here, the transverse electric field type liquid crystal display device according to the embodiment of the present invention uses lift-off with a half-tone mask or a diffraction mask (hereinafter, it includes a diffraction mask when referring to a half-tone mask) It is possible to fabricate the array substrate by a total of three mask processes by simultaneously patterning the data lines, the pixel / common electrode and the protective film. This will be described in detail through the following manufacturing method of the transverse electric field type liquid crystal display device.

FIGS. 4A to 4C are cross-sectional views sequentially showing manufacturing processes according to lines IIIa-IIIa ', IIIb-IIIb' and IIIc-IIIc 'of the array substrate shown in FIG. 3. In the left side, And the right side shows a process of manufacturing an array substrate of a pad portion including a data pad portion and a gate pad portion.

5A to 5C are plan views sequentially showing the manufacturing steps of the array substrate shown in FIG.

4A and FIG. 5A, a gate electrode 121, a gate line 116, first lines 108a and 108a ', and a second line are formed in a pixel portion of an array substrate 110 made of a transparent insulating material such as glass, A common line 108L and a dummy pattern 114 are formed and a gate pad line 116p and a data pad line 117p are formed in the pad portion.

At this time, the common line 108L is formed in the lower portion of the pixel region in a direction substantially parallel to the gate line 116, and the first lines 108a and 108a 'are formed on the left and right edges of the pixel region And is connected to the common line 108L.

The dummy pattern 114 is formed in the data line region where the data lines are to be formed, and is formed so as not to overlap the first lines 108a and 108a 'and the common line 108L.

At this time, the gate electrode 121, the gate line 116, the first lines 108a and 108a ', the common line 108L, the dummy pattern 114, the gate pad line 116p and the data pad line 117p, A first conductive film is deposited on the entire surface of the array substrate 110 and then selectively patterned through a photolithography process (first mask process).

Al, Al, tungsten, copper, chromium, molybdenum, molybdenum, and molybdenum alloy may be used as the first conductive layer. A low resistance opaque conductive material can be used. The first conductive layer may have a multi-layer structure in which two or more low resistance conductive materials are stacked.

Next, as shown in FIGS. 4B and 5B, the gate electrode 121, the gate line 116, the first lines 108a and 108a ', the common line 108L, the dummy pattern 114, The gate insulating film 115a, the amorphous silicon thin film and the n + amorphous silicon thin film are formed on the entire surface of the array substrate 110 on which the pad line 116p and the data pad line 117p are formed, and then a photolithography process (second mask process) The active pattern 124 of the amorphous silicon thin film is formed in the pixel portion of the array substrate 110. [

The first contact hole 140a exposes a part of the dummy pattern 114 to the pixel portion of the array substrate 110 by selectively removing a portion of the gate insulating film 115a through the second mask process. And a second contact hole 140b exposing a part of the first lines 108a and 108a '.

A third contact hole exposing a part of the data pad line 117p is formed in the pad portion of the array substrate 110 by selectively removing a portion of the gate insulating film 115a through the second mask process 140c and a fourth contact hole 140d exposing a part of the gate pad line 116p.

At this time, an n + amorphous silicon thin film pattern 125 'formed of the n + amorphous silicon thin film and patterned substantially in the same manner as the active pattern 124 is formed on the active pattern 124.

Here, the active pattern 124 and the first to fourth contact holes 140a to 140d according to the embodiment of the present invention may be formed by a single mask process (second mask process) using a half-tone mask Hereinafter, the second mask process will be described in detail with reference to the drawings.

6A to 6F are cross-sectional views illustrating the second mask process according to the embodiment of the present invention in the array substrate shown in FIGS. 4B and 5B.

As shown in FIG. 6A, the gate electrode 121, the gate line 116, the first lines 108a and 108a ', the common line 108L, the dummy pattern 114, the gate pad line 116p, The gate insulating layer 115a, the amorphous silicon thin film 120 and the n + amorphous silicon thin film 125 are formed on the entire surface of the array substrate 110 on which the data pad line 117p is formed.

6B, a first photoresist layer 170 made of a photosensitive material such as photoresist is formed on the entire surface of the array substrate 110, and then a first half-tone mask 170 according to an embodiment of the present invention is formed. And selectively irradiates the first photoresist layer 170 with light through the first photoresist layer 180.

At this time, the first half-tone mask 180 includes a first transmission region I for transmitting all the irradiated light, a second transmission region II for transmitting only a part of light and blocking a part of the light, And only the light transmitted through the half-tone mask 180 is irradiated to the first photoresist layer 170. The first photoresist layer 170 is formed of a light-

6C, after the first photoresist layer 170 exposed through the first half-tone mask 180 is developed, the blocking region III and the second transmissive region II are formed, A first photoresist pattern 170a and a second photoresist pattern 170b having a predetermined thickness are left in a region where light is entirely blocked or partially blocked, 1 photoresist film is completely removed and the surface of the n + amorphous silicon thin film 125 is exposed.

At this time, the first photoresist pattern 170a formed in the blocking region III is thicker than the second photoresist pattern 170b formed through the second transmissive region II. In addition, the photoresist layer is completely removed from the region through which the light is completely transmitted through the first transmissive region I because the positive type photoresist is used. The present invention is not limited to this, May be used.

6D, using the first photoresist pattern 170a and the second photoresist pattern 170b formed as described above as a mask, the gate insulating layer 115a and the amorphous silicon thin layer 120 And the n + amorphous silicon thin film 125 are selectively removed.

6D illustrates a case where the dummy pattern 114 and the gate insulating layer 115a on the common electrode line (not shown) and the pad lines 116p and 117p are partially patterned. However, The present invention is not limited to this, and the present invention is not limited thereto, and the present invention is not limited to this, but may be applied to prevent damage to the dummy pattern 114, common electrode line and pad line lines 116p and 117p by plasma during ashing of the photosensitive film, The gate insulating film 115a on the common electrode line and pad line lines 116p and 117p is removed so that the dummy pattern 114 and a part of the common electrode line and pad line lines 116p and 117p are exposed. can do.

6E, when the ashing process for removing the first photoresist pattern 170a and the second photoresist pattern 170b is performed, the second photoresist pattern 170a and the second photoresist pattern 170b are removed, The pattern is completely removed.

At this time, the first photoresist pattern remains only in the active pattern region corresponding to the blocking region III with the third photoresist pattern 170a 'removed by the thickness of the second photoresist pattern.

6F, the gate insulating layer 115a, the n + amorphous silicon thin film and the amorphous silicon thin film are selectively removed using the remaining third photoresist pattern 170a 'as a mask, The active pattern 124 made of the amorphous silicon thin film is formed.

At this time, an n + amorphous silicon thin film pattern 125 'formed of the n + amorphous silicon thin film and patterned substantially in the same manner as the active pattern 124 is formed on the active pattern 124.

At this time, as the gate insulating layer 115a on the dummy pattern 114 and the common electrode line and the pad portion lines 116p and 117p is removed, the dummy pattern 114 and the common electrode line and pad portion lines 116p and 117p A second contact hole (not shown), and third and fourth contact holes 140c and 140d are formed to expose a part of the first contact hole 140a and the second contact hole 140b.

Next, as shown in FIGS. 4C and 5C, a second conductive layer and a third conductive layer are formed on the entire surface of the array substrate 110 on which the active pattern 124 is formed, and then a photolithography process A source electrode 122 and a drain electrode 123 of the third conductive film and a drain electrode 123 of a pixel portion of the array substrate 110 in a single mask process by applying a lift- The common electrode 108, the pixel electrode 118, the common electrode line 108L, and the pixel electrode line 118L, which are the second conductive films, are formed in the pixel portion of the array substrate 110, Respectively.

The data line 117 intersects the gate line 116 to define a pixel region and is electrically connected to the lower dummy pattern 114 through the first contact hole 140a, And the electrode line 108L is electrically connected to the first line 108a through the second contact hole 140b.

Also, the data pad electrode 127p and the gate pad electrode 126p, which are the second conductive layer, are formed in the pad portion of the array substrate 110 through the third mask process.

At this time, the data pad electrode 127p and the gate pad electrode 126p are connected to the data pad line 117p and the gate pad line (not shown) through the third contact hole 140c and the fourth contact hole 140d, 116p.

At this time, a source electrode pattern 122 'and a drain electrode pattern 123' made of the second conductive film are formed under the source electrode 122, the drain electrode 123, and the data line 117, And a data line pattern 117 'are formed, respectively.

As described above, the dummy pattern 114 formed of the first conductive film is formed under the data line 117, specifically, the data line pattern 117 ' And is electrically connected to the data line 117 through the first contact hole 140a formed in the insulating film 115a. Although the first contact hole 140a is formed on the upper and lower ends of the dummy pattern 114, the present invention is not limited thereto. For example, The first contact hole 140a is connected to the lower dummy pattern 114 to be self-refreshed even if a disconnection defect occurs in which a part of the data line 117 is opened by etching twice, Or more.

The front surface of the array substrate 110 excluding the common electrode 108, the pixel electrode 118, the common electrode line 108L, the pixel electrode line 118L, the gate pad electrode 126p and the data pad electrode 127p A protective film 115b made of a predetermined insulating material is formed.

As described above, in the transverse electric field type liquid crystal display device according to the embodiment of the present invention, there is no active tail, so there is no signal interference of the data line 117 and the aperture ratio is increased by the active tail width.

In addition, the transverse electric field type liquid crystal display device according to the embodiment of the present invention does not generate a wave noise, thereby providing a high-quality liquid crystal display device.

In the transverse electric field type liquid crystal display device according to the embodiment of the present invention, the dummy pattern 114 is formed under the data line 117 and is connected to the data line 117 through the first contact hole 140a, It is possible to self repair defective disconnection of the data line 117 caused by the etching over the number of times.

Here, the third mask process may be performed by using the half-tone mask and the lift-off process so that the source electrode 122, the drain electrode 123, the data line 117, the common electrode 108, The common electrode line 108L, the pixel electrode line 118L, the gate pad electrode 126p, the data pad electrode 127p and the protective film 115b can be formed. The third mask process will be described in detail.

Figs. 7A to 7H are cross-sectional views illustrating the third mask process according to the embodiment of the present invention, in the array substrate shown in Figs. 4D, 4C and 5C.

The second conductive layer 130 and the third conductive layer 150 are formed on the entire surface of the array substrate 110 on which the active pattern 124 is formed.

Here, the third conductive layer 150 may be formed of a low-resistance opaque conductive material such as copper to form a source electrode, a drain electrode, and a data line, and the second conductive layer 130 may be formed by diffusion of the copper And may be made of a conductive material such as molybdenum titanium (MoTi) to improve adhesion and improve adhesion.

7B, a second photoresist layer 270 made of a photosensitive material such as photoresist is formed on the entire surface of the array substrate 110, and then a second half-tone mask (not shown) according to an embodiment of the present invention is formed. 280 to selectively irradiate light to the second photoresist layer 270.

At this time, the second half-tone mask 280 used in the embodiment of the present invention includes a first transmission region I for transmitting all the irradiated light and a second transmission region II for transmitting only a part of light, And a shielding region III for shielding all the irradiated light. Only the light transmitted through the second half-tone mask 280 is irradiated to the second photoresist layer 270.

After the second photoresist layer 270 exposed through the second half-tone mask 280 is developed, the blocking region III and the second transmissive region II are formed as shown in FIG. 7C. A first photoresist pattern 270a to a seventh photoresist pattern 270g having a predetermined thickness are left in a region where light is blocked or partially blocked, and in the first transmission region I, The photoresist layer is completely removed and the surface of the third conductive layer 150 is exposed.

The first to fourth photoresist patterns 270a to 270d formed in the blocking region III may include a fifth photoresist pattern 270e to a seventh photoresist pattern 270g formed through the second transmissive region II, . In addition, the second photoresist layer is completely removed in the region where the light is completely transmitted through the first transmissive region I because the positive type photoresist is used. The present invention is not limited to this, A resist may be used.

Next, as shown in FIG. 7D, using the first to seventh photosensitive film patterns 270a to 270g formed as described above as a mask, the second conductive film and the third conductive film formed thereunder are selectively A source electrode 122 and a drain electrode 123 are formed on the gate electrode 121 and are electrically connected to a source region and a drain region of the active pattern 124, .

The pixel region of the array substrate 110 is defined by the third conductive film and intersects with the gate line 116. The pixel region is defined through the first contact hole and the dummy pattern 114 And a data line 117 electrically connected to the data line 117 is formed.

At this time, a common electrode 108 and a pixel electrode 118, which are formed of the second conductive film and alternately arranged to generate a transverse electric field, are formed in the pixel region, and the second conductive film is formed, A common electrode line (not shown) and a pixel electrode line 118L, which are arranged in substantially the same direction as the common electrode 108 and the pixel electrode 118, respectively, are formed.

The array substrate 110 of the pad portion includes the second conductive film and is electrically connected to the lower data pad line 117p and the gate pad line 116p via the third contact hole and the fourth contact hole, The data pad electrode 127p and the gate pad electrode 126p are formed.

The source electrode 122, the drain electrode 123, and the data line 117, which are the third conductive film, are formed of the second conductive film, and the source electrode 122, the drain electrode 123, The source electrode pattern 122 ', the drain electrode pattern 123', and the data line pattern 117 ', which are patterned substantially in the same manner as the line 117, are formed.

On the common electrode 108, the pixel electrode 118, the common electrode line, the pixel electrode line 118L, the gate pad electrode 126p, and the data pad electrode 127p, which are the second conductive films, And is patterned in substantially the same pattern as the common electrode 108, the pixel electrode 118, the common electrode line, the pixel electrode line 118L, the gate pad electrode 126p, and the data pad electrode 127p The common electrode pattern 108 ', the pixel electrode pattern 118', the common electrode line pattern (not shown), the pixel electrode line pattern 118L ', the gate pad electrode pattern 126p', and the data pad electrode pattern 127p ' .

Thereafter, the n + amorphous silicon thin film is selectively removed by using the third mask process to selectively remove the n + amorphous silicon thin film. The source / drain region of the active pattern 124 and the source / The ohmic contact layer 125n is formed to ohmic contact between the source and drain electrodes 122 and 123, respectively.

As shown in FIG. 7E, when the ashing process for removing the first to seventh photosensitive film patterns 270a to 270g is performed, the fifth photoresist pattern 270a of the second transmissive area II, Pattern to the seventh photosensitive film pattern are completely removed.

The first through fourth photoresist patterns 270a 'through 270d' may have a thickness ranging from the fifth photoresist pattern to the seventh photoresist pattern 270a ' (III). ≪ / RTI >

7F, a protective film 115b made of a predetermined insulating material is formed on the entire surface of the array substrate 110 where the eighth photosensitive film pattern 270a 'to the 11th photosensitive film pattern 270d' are left, .

Then, as shown in FIG. 7G, the eighth photosensitive film pattern to the eleventh photosensitive film pattern are removed through a lift-off process. At this time, on the eighth photosensitive film pattern to the eleventh photosensitive film pattern of the blocking region III, The deposited protective film is removed together with the eighth photoresist pattern to the eleventh photoresist pattern.

Next, as shown in FIG. 7H, the third conductive film is etched to selectively remove the common electrode pattern, the pixel electrode pattern, the common electrode line pattern, the pixel electrode line pattern, the gate pad electrode pattern, and the data pad electrode pattern Thereby exposing the surface of the common electrode 108, the pixel electrode 118, the common electrode line, the pixel electrode line 118L, the gate pad electrode 126p, and the data pad electrode 127p to the outside.

The array substrate of the above-described embodiment of the present invention configured as described above is adhered to and opposed to the color filter substrate by a sealant formed on the outer periphery of the image display area. At this time, light is emitted from the color filter substrate to the thin film transistor, A black matrix for preventing leakage and a color filter for realizing red, green and blue colors are formed.

At this time, the color filter substrate and the array substrate are bonded together through a covalent key formed on the color filter substrate or the array substrate.

As described above, the amorphous silicon thin film transistor using the amorphous silicon thin film as the active pattern is described as an example of the present invention. However, the present invention is not limited to this, Is also applied to a polycrystalline silicon thin film transistor.

In addition, the present invention can be applied not only to a liquid crystal display device but also to other display devices manufactured using thin film transistors, for example, organic electroluminescent display devices in which organic light emitting diodes (OLEDs) have.

While a great many are described in the foregoing description, it should be construed as an example of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

2 is a plan view schematically showing a part of an array substrate of a general transverse electric field type liquid crystal display device.

3 is a plan view schematically showing a part of an array substrate of a transverse electric field type liquid crystal display device according to an embodiment of the present invention.

FIGS. 4A to 4C are cross-sectional views sequentially showing manufacturing processes according to IIIa-IIIa ', IIIb-IIIb and IIIc-IIIc of the array substrate shown in FIG.

5A to 5C are plan views sequentially showing the manufacturing steps of the array substrate shown in FIG. 3;

FIGS. 6A to 6F are cross-sectional views illustrating a second mask process according to an embodiment of the present invention, in the array substrate shown in FIGS. 4B and 5B. FIG.

FIGS. 7A to 7H are cross-sectional views illustrating the third mask process according to the embodiment of the present invention, in the array substrate shown in FIGS. 4C and 5C. FIG.

DESCRIPTION OF REFERENCE NUMERALS

108: common electrode 108l: common electrode line

108L: common line 110: array substrate

114: dummy pattern 116: gate line

117: Data line 118: Pixel electrode

118l: pixel electrode line 121: gate electrode

122: source electrode 123: drain electrode

Claims (13)

Forming a gate electrode and a gate line and a dummy pattern made of a first conductive film in a pixel portion of the first substrate through a first mask process; Forming a gate insulating film on the first substrate; Forming an active pattern on the gate electrode through a second mask process; Forming a first contact hole exposing a part of the dummy pattern by selectively patterning the gate insulating layer using the second mask process; Forming a source / drain electrode electrically connected to a source / drain region of the active pattern, the third conductive film being formed on the gate electrode through a third mask process; The third conductive film is formed on the dummy pattern by using the third mask process, and a pixel region is defined by intersecting the gate line and electrically connected to the dummy pattern through the first contact hole Forming a data line; Forming a common electrode and a pixel electrode, which are made of a second conductive film on the gate insulating film of the pixel region using the third mask process and are alternately arranged to generate a transverse electric field; Forming an insulating material on the entire surface of the first substrate in a state where the photoresist pattern used in the third mask process remains; Removing the insulating material above the photoresist pattern with the photoresist pattern through a lift-off process to form a protective film on the gate insulating film of the pixel region excluding the common electrode and the pixel electrode; And And bonding the first substrate and the second substrate to each other. The method according to claim 1, further comprising the step of forming a data pad line and a gate pad line made of the first conductive film on the pad portion of the first substrate. The method of claim 2, further comprising: forming a first line of the first conductive film on the left and right edges of the pixel region of the first substrate, and forming a common line of the first conductive film on the lower side of the pixel region Wherein the liquid crystal display device further comprises: 4. The method of claim 3, further comprising: forming a second contact hole exposing a portion of the first line using the second mask process; forming a third contact hole exposing a portion of the data pad line and the gate pad line, And forming a third contact hole and a fourth contact hole. The method according to claim 1, wherein at least one of the first contact holes is formed on upper and lower ends of the dummy pattern. The method of claim 4, further comprising: forming the second conductive layer on the pad portion using the third mask process, wherein the data pad line and the gate pad line are formed through the third contact hole and the fourth contact hole, And forming a gate pad electrode and a data pad electrode electrically connected to each other. 5. The method of claim 4, wherein the third masking step Forming a second conductive layer and a third conductive layer on the entire surface of the first substrate on which the active pattern is formed; Forming a first to a fourth photosensitive film pattern having a first thickness and a fifth photosensitive film pattern to a seventh photosensitive film pattern having a second thickness on the first substrate; Selectively removing the second conductive film and the third conductive film using the first photoresist pattern to the seventh photoresist pattern as masks to form the third conductive film on the gate electrode, Forming a source line and a drain line, the source line and the drain line being electrically connected to the gate line and the gate line, respectively; Wherein the second conductive film and the third conductive film are selectively removed using the first photoresist pattern to the seventh photoresist pattern as masks to form the second conductive film in the pixel region and alternately arranged to generate a transverse electric field Forming a common electrode and a pixel electrode; Selectively removing the second conductive film and the third conductive film using the first photoresist pattern to the seventh photoresist pattern as masks to form the second conductive film on the pad portion, Forming a data pad electrode and a gate pad electrode electrically connected to the data pad line and the gate pad line through a contact hole; Removing the fifth photoresist pattern to the seventh photoresist pattern through an ashing process and removing a portion of the thickness of the first photoresist pattern to the fourth photoresist pattern to form an eighth photoresist pattern to an 11th photoresist pattern, ; Forming a protective layer made of a predetermined insulating material on the entire surface of the first substrate where the eighth photoresist pattern to the eleventh photoresist pattern are left; Removing the protective film deposited on the eighth photosensitive film pattern to the eleventh photosensitive film pattern with the eighth photosensitive film pattern to the eleventh photosensitive film pattern through a lift-off process; And The common electrode pattern, the pixel electrode pattern, and the data pad electrode pattern gate pad electrode pattern formed by the third conductive film on the common electrode, the pixel electrode, the data pad electrode, and the gate pad electrode are removed by etching the third conductive film And exposing a surface of the common electrode, the pixel electrode, the data pad electrode, and the gate pad electrode, Wherein the protective film remains on the first substrate corresponding to the areas other than the eighth photoresist pattern to the eleventh photoresist pattern. The organic light emitting display as claimed in claim 1, wherein the source electrode, the drain electrode, the data line, and the second conductive layer are formed of the third conductive film and have the same shape as the source electrode, the drain electrode, And forming a patterned source electrode pattern, a drain electrode pattern, and a data line pattern. The method of claim 1, wherein the third conductive film is formed of a low-resistance opaque conductive material of copper, and the second conductive film is a transverse electric field formed of molybdenum titanium (MoTi) to prevent diffusion of the copper, Type liquid crystal display device. The method according to claim 1, wherein the dummy pattern and the data line are electrically connected through the first contact hole even when a part of the data line is open. A gate electrode, a gate line, and a dummy pattern disposed in the pixel portion of the first substrate, the gate electrode being made of the first conductive film; A gate insulating film on the first substrate; An active pattern on the gate electrode; A first contact hole through which a part of the gate insulating film is removed to expose a part of the dummy pattern; A source / drain electrode made of a third conductive film on the gate electrode and electrically connected to a source / drain region of the active pattern; A data line formed of the third conductive film on the dummy pattern and defining a pixel region intersecting the gate line and electrically connected to the dummy pattern through the first contact hole; A common electrode and a pixel electrode made of a second conductive film on the gate insulating film of the pixel region and alternately arranged to generate a transverse electric field; A protective film on the gate insulating film of the pixel region excluding the common electrode and the pixel electrode; And And a second substrate bonded to the first substrate so as to be opposite to the first substrate. 12. The semiconductor device of claim 11, further comprising: a data pad line and a gate pad line, which are disposed in the pad portion of the first substrate and are made of the first conductive film; A third contact hole and a fourth contact hole, wherein a part of the gate insulating film is removed to expose a portion of the data pad line and the gate pad line, respectively; And A data pad electrode formed of the second conductive film and electrically connected to the data pad line through the third contact hole and a gate pad electrode electrically connected to the gate pad line through the fourth contact hole are added The liquid crystal display device comprising: 13. The organic light emitting display as claimed in claim 12, wherein the source electrode, the drain electrode, and the second conductive layer are formed under the data line, and the source electrode, the drain electrode, And further includes a patterned source electrode pattern, a drain electrode pattern, and a data line pattern.

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