KR101558144B1 - 상호 관련 다중 패스 프로그래밍을 위한 비휘발성 메모리와 방법 - Google Patents
상호 관련 다중 패스 프로그래밍을 위한 비휘발성 메모리와 방법 Download PDFInfo
- Publication number
- KR101558144B1 KR101558144B1 KR1020107027838A KR20107027838A KR101558144B1 KR 101558144 B1 KR101558144 B1 KR 101558144B1 KR 1020107027838 A KR1020107027838 A KR 1020107027838A KR 20107027838 A KR20107027838 A KR 20107027838A KR 101558144 B1 KR101558144 B1 KR 101558144B1
- Authority
- KR
- South Korea
- Prior art keywords
- programming
- memory
- pulse train
- memory cell
- pass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/138,387 US7813172B2 (en) | 2008-06-12 | 2008-06-12 | Nonvolatile memory with correlated multiple pass programming |
| US12/138,382 US7796435B2 (en) | 2008-06-12 | 2008-06-12 | Method for correlated multiple pass programming in nonvolatile memory |
| US12/138,387 | 2008-06-12 | ||
| US12/138,382 | 2008-06-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20110036885A KR20110036885A (ko) | 2011-04-12 |
| KR101558144B1 true KR101558144B1 (ko) | 2015-10-08 |
Family
ID=41268168
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020107027838A Expired - Fee Related KR101558144B1 (ko) | 2008-06-12 | 2009-06-04 | 상호 관련 다중 패스 프로그래밍을 위한 비휘발성 메모리와 방법 |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP2297739B1 (enExample) |
| JP (1) | JP5395167B2 (enExample) |
| KR (1) | KR101558144B1 (enExample) |
| CN (1) | CN102089827B (enExample) |
| TW (1) | TWI394162B (enExample) |
| WO (1) | WO2009152037A2 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5529858B2 (ja) * | 2008-06-12 | 2014-06-25 | サンディスク テクノロジィース インコーポレイテッド | インデックスプログラミングおよび削減されたベリファイを有する不揮発性メモリおよび方法 |
| JP6539608B2 (ja) * | 2016-03-15 | 2019-07-03 | 東芝メモリ株式会社 | 半導体記憶装置 |
| TWI600009B (zh) * | 2016-11-04 | 2017-09-21 | 財團法人工業技術研究院 | 可變電阻記憶體電路以及可變電阻記憶體電路之寫入方法 |
| CN110634527B (zh) * | 2018-06-25 | 2021-06-22 | 西安格易安创集成电路有限公司 | 一种非易失存储器处理方法及装置 |
| US10741568B2 (en) | 2018-10-16 | 2020-08-11 | Silicon Storage Technology, Inc. | Precision tuning for the programming of analog neural memory in a deep learning artificial neural network |
| US12075618B2 (en) | 2018-10-16 | 2024-08-27 | Silicon Storage Technology, Inc. | Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network |
| CN111326200A (zh) * | 2018-12-14 | 2020-06-23 | 北京兆易创新科技股份有限公司 | 非易失性存储器及其编程方法 |
| CN113488093A (zh) * | 2021-07-01 | 2021-10-08 | 中国科学院上海微系统与信息技术研究所 | 一种实现存储器多级存储的方法及装置 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6046935A (en) | 1996-03-18 | 2000-04-04 | Kabushiki Kaisha Toshiba | Semiconductor device and memory system |
| JP2003109386A (ja) | 2001-06-27 | 2003-04-11 | Sandisk Corp | 複数のデータ状態で動作する不揮発性メモリのストレージエレメント間の結合による影響を低減させるための動作技術 |
| JP2004519804A (ja) | 2001-02-26 | 2004-07-02 | サンディスク コーポレイション | 改善されたプログラミングを備えた不揮発性メモリ及び該プログラミングのための方法 |
| US20050219906A1 (en) | 2004-01-27 | 2005-10-06 | Macronix International Co., Ltd. | Operation scheme for programming charge trapping non-volatile memory |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5729489A (en) * | 1995-12-14 | 1998-03-17 | Intel Corporation | Programming flash memory using predictive learning methods |
| JP3930074B2 (ja) * | 1996-09-30 | 2007-06-13 | 株式会社ルネサステクノロジ | 半導体集積回路及びデータ処理システム |
| DE60139670D1 (de) * | 2001-04-10 | 2009-10-08 | St Microelectronics Srl | Verfahren zur Programmierung nichtflüchtiger Speicherzellen mit Programmier- und Prüfalgorithmus unter Verwendung treppenförmiger Spannungsimpulse mit variablem Stufenabstand |
| JP2002367381A (ja) * | 2001-06-05 | 2002-12-20 | Sony Corp | 不揮発性半導体メモリ装置およびその書き込み方法 |
| US6987693B2 (en) * | 2002-09-24 | 2006-01-17 | Sandisk Corporation | Non-volatile memory and method with reduced neighboring field errors |
| US7136304B2 (en) * | 2002-10-29 | 2006-11-14 | Saifun Semiconductor Ltd | Method, system and circuit for programming a non-volatile memory array |
| US6882567B1 (en) * | 2002-12-06 | 2005-04-19 | Multi Level Memory Technology | Parallel programming of multiple-bit-per-cell memory cells on a continuous word line |
| US7177199B2 (en) * | 2003-10-20 | 2007-02-13 | Sandisk Corporation | Behavior based programming of non-volatile memory |
| JP2005235287A (ja) * | 2004-02-19 | 2005-09-02 | Nec Electronics Corp | 不揮発性半導体記憶装置のプログラミング方法、プログラミング装置、及び、不揮発性半導体記憶装置 |
| TWI267864B (en) * | 2004-05-06 | 2006-12-01 | Samsung Electronics Co Ltd | Method and device for programming control information |
| US7272037B2 (en) * | 2004-10-29 | 2007-09-18 | Macronix International Co., Ltd. | Method for programming a multilevel phase change memory device |
| KR100748553B1 (ko) * | 2004-12-20 | 2007-08-10 | 삼성전자주식회사 | 리플-프리 고전압 발생회로 및 방법, 그리고 이를 구비한반도체 메모리 장치 |
| US7130210B2 (en) * | 2005-01-13 | 2006-10-31 | Spansion Llc | Multi-level ONO flash program algorithm for threshold width control |
| ITMI20050798A1 (it) * | 2005-05-03 | 2006-11-04 | Atmel Corp | Metodo e sistema per la generazi0ne di impulsi di programmazione durante la programmazione di dispositivi elettronici non volatili |
| US7362616B2 (en) * | 2005-07-28 | 2008-04-22 | Stmicroelectronics S.R.L. | NAND flash memory with erase verify based on shorter evaluation time |
-
2009
- 2009-06-04 EP EP09763328.3A patent/EP2297739B1/en active Active
- 2009-06-04 JP JP2011513587A patent/JP5395167B2/ja active Active
- 2009-06-04 CN CN200980126873.4A patent/CN102089827B/zh active Active
- 2009-06-04 KR KR1020107027838A patent/KR101558144B1/ko not_active Expired - Fee Related
- 2009-06-04 WO PCT/US2009/046318 patent/WO2009152037A2/en not_active Ceased
- 2009-06-12 TW TW98119816A patent/TWI394162B/zh not_active IP Right Cessation
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6046935A (en) | 1996-03-18 | 2000-04-04 | Kabushiki Kaisha Toshiba | Semiconductor device and memory system |
| JP2004519804A (ja) | 2001-02-26 | 2004-07-02 | サンディスク コーポレイション | 改善されたプログラミングを備えた不揮発性メモリ及び該プログラミングのための方法 |
| JP2003109386A (ja) | 2001-06-27 | 2003-04-11 | Sandisk Corp | 複数のデータ状態で動作する不揮発性メモリのストレージエレメント間の結合による影響を低減させるための動作技術 |
| US20050219906A1 (en) | 2004-01-27 | 2005-10-06 | Macronix International Co., Ltd. | Operation scheme for programming charge trapping non-volatile memory |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102089827B (zh) | 2017-05-17 |
| EP2297739B1 (en) | 2015-03-04 |
| JP2011524599A (ja) | 2011-09-01 |
| CN102089827A (zh) | 2011-06-08 |
| TW201011756A (en) | 2010-03-16 |
| KR20110036885A (ko) | 2011-04-12 |
| JP5395167B2 (ja) | 2014-01-22 |
| WO2009152037A2 (en) | 2009-12-17 |
| EP2297739A2 (en) | 2011-03-23 |
| WO2009152037A3 (en) | 2010-03-18 |
| TWI394162B (zh) | 2013-04-21 |
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| EP2370977B1 (en) | Non-volatile memory and method for sensing with pipelined corrections for neighboring perturbations | |
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| CN101711414A (zh) | 非易失性存储器和用于预测编程的方法 | |
| KR101558144B1 (ko) | 상호 관련 다중 패스 프로그래밍을 위한 비휘발성 메모리와 방법 | |
| KR20110074977A (ko) | 가장 빠른 및/또는 가장 느린 프로그래밍 비트를 무시하여 프로그램 검증이 감소된 비휘발성 메모리와 방법 | |
| WO2012128914A1 (en) | Nonvolatile memory and method for improved programming with reduced verify |
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