TWI394162B - 關聯多遍次程式化之方法及非揮發性記憶體 - Google Patents
關聯多遍次程式化之方法及非揮發性記憶體 Download PDFInfo
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- TWI394162B TWI394162B TW98119816A TW98119816A TWI394162B TW I394162 B TWI394162 B TW I394162B TW 98119816 A TW98119816 A TW 98119816A TW 98119816 A TW98119816 A TW 98119816A TW I394162 B TWI394162 B TW I394162B
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- Prior art keywords
- stylized
- memory
- pass
- stepped
- pulse train
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- 238000000034 method Methods 0.000 title claims description 64
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- 230000000087 stabilizing effect Effects 0.000 claims 3
- 238000012795 verification Methods 0.000 description 75
- 230000006870 function Effects 0.000 description 29
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/138,387 US7813172B2 (en) | 2008-06-12 | 2008-06-12 | Nonvolatile memory with correlated multiple pass programming |
| US12/138,382 US7796435B2 (en) | 2008-06-12 | 2008-06-12 | Method for correlated multiple pass programming in nonvolatile memory |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201011756A TW201011756A (en) | 2010-03-16 |
| TWI394162B true TWI394162B (zh) | 2013-04-21 |
Family
ID=41268168
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW98119816A TWI394162B (zh) | 2008-06-12 | 2009-06-12 | 關聯多遍次程式化之方法及非揮發性記憶體 |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP2297739B1 (enExample) |
| JP (1) | JP5395167B2 (enExample) |
| KR (1) | KR101558144B1 (enExample) |
| CN (1) | CN102089827B (enExample) |
| TW (1) | TWI394162B (enExample) |
| WO (1) | WO2009152037A2 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5529858B2 (ja) * | 2008-06-12 | 2014-06-25 | サンディスク テクノロジィース インコーポレイテッド | インデックスプログラミングおよび削減されたベリファイを有する不揮発性メモリおよび方法 |
| JP6539608B2 (ja) * | 2016-03-15 | 2019-07-03 | 東芝メモリ株式会社 | 半導体記憶装置 |
| TWI600009B (zh) * | 2016-11-04 | 2017-09-21 | 財團法人工業技術研究院 | 可變電阻記憶體電路以及可變電阻記憶體電路之寫入方法 |
| CN110634527B (zh) * | 2018-06-25 | 2021-06-22 | 西安格易安创集成电路有限公司 | 一种非易失存储器处理方法及装置 |
| US10741568B2 (en) | 2018-10-16 | 2020-08-11 | Silicon Storage Technology, Inc. | Precision tuning for the programming of analog neural memory in a deep learning artificial neural network |
| US12075618B2 (en) | 2018-10-16 | 2024-08-27 | Silicon Storage Technology, Inc. | Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network |
| CN111326200A (zh) * | 2018-12-14 | 2020-06-23 | 北京兆易创新科技股份有限公司 | 非易失性存储器及其编程方法 |
| CN113488093A (zh) * | 2021-07-01 | 2021-10-08 | 中国科学院上海微系统与信息技术研究所 | 一种实现存储器多级存储的方法及装置 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6046935A (en) * | 1996-03-18 | 2000-04-04 | Kabushiki Kaisha Toshiba | Semiconductor device and memory system |
| US6788579B2 (en) * | 2001-04-10 | 2004-09-07 | Stmicroelectronics S.R.L. | Method for programming nonvolatile memory cells with program and verify algorithm using a staircase voltage with varying step amplitude |
| US6882567B1 (en) * | 2002-12-06 | 2005-04-19 | Multi Level Memory Technology | Parallel programming of multiple-bit-per-cell memory cells on a continuous word line |
| TWI262506B (en) * | 2003-10-20 | 2006-09-21 | Sandisk Corp | Behavior based programming of non-volatile memory |
| TWI274347B (en) * | 2004-10-29 | 2007-02-21 | Macronix Int Co Ltd | Method for programming a multilevel phase change memory device |
| TW200719346A (en) * | 2005-05-03 | 2007-05-16 | Atmel Corp | Method and system for program pulse generation during programming of nonvolatile electronic devices |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5729489A (en) * | 1995-12-14 | 1998-03-17 | Intel Corporation | Programming flash memory using predictive learning methods |
| JP3930074B2 (ja) * | 1996-09-30 | 2007-06-13 | 株式会社ルネサステクノロジ | 半導体集積回路及びデータ処理システム |
| US6738289B2 (en) * | 2001-02-26 | 2004-05-18 | Sandisk Corporation | Non-volatile memory with improved programming and method therefor |
| JP2002367381A (ja) * | 2001-06-05 | 2002-12-20 | Sony Corp | 不揮発性半導体メモリ装置およびその書き込み方法 |
| US6522580B2 (en) * | 2001-06-27 | 2003-02-18 | Sandisk Corporation | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states |
| US6987693B2 (en) * | 2002-09-24 | 2006-01-17 | Sandisk Corporation | Non-volatile memory and method with reduced neighboring field errors |
| US7136304B2 (en) * | 2002-10-29 | 2006-11-14 | Saifun Semiconductor Ltd | Method, system and circuit for programming a non-volatile memory array |
| US7151692B2 (en) | 2004-01-27 | 2006-12-19 | Macronix International Co., Ltd. | Operation scheme for programming charge trapping non-volatile memory |
| JP2005235287A (ja) * | 2004-02-19 | 2005-09-02 | Nec Electronics Corp | 不揮発性半導体記憶装置のプログラミング方法、プログラミング装置、及び、不揮発性半導体記憶装置 |
| TWI267864B (en) * | 2004-05-06 | 2006-12-01 | Samsung Electronics Co Ltd | Method and device for programming control information |
| KR100748553B1 (ko) * | 2004-12-20 | 2007-08-10 | 삼성전자주식회사 | 리플-프리 고전압 발생회로 및 방법, 그리고 이를 구비한반도체 메모리 장치 |
| US7130210B2 (en) * | 2005-01-13 | 2006-10-31 | Spansion Llc | Multi-level ONO flash program algorithm for threshold width control |
| US7362616B2 (en) * | 2005-07-28 | 2008-04-22 | Stmicroelectronics S.R.L. | NAND flash memory with erase verify based on shorter evaluation time |
-
2009
- 2009-06-04 EP EP09763328.3A patent/EP2297739B1/en active Active
- 2009-06-04 JP JP2011513587A patent/JP5395167B2/ja active Active
- 2009-06-04 CN CN200980126873.4A patent/CN102089827B/zh active Active
- 2009-06-04 KR KR1020107027838A patent/KR101558144B1/ko not_active Expired - Fee Related
- 2009-06-04 WO PCT/US2009/046318 patent/WO2009152037A2/en not_active Ceased
- 2009-06-12 TW TW98119816A patent/TWI394162B/zh not_active IP Right Cessation
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6046935A (en) * | 1996-03-18 | 2000-04-04 | Kabushiki Kaisha Toshiba | Semiconductor device and memory system |
| US6788579B2 (en) * | 2001-04-10 | 2004-09-07 | Stmicroelectronics S.R.L. | Method for programming nonvolatile memory cells with program and verify algorithm using a staircase voltage with varying step amplitude |
| US6882567B1 (en) * | 2002-12-06 | 2005-04-19 | Multi Level Memory Technology | Parallel programming of multiple-bit-per-cell memory cells on a continuous word line |
| TWI262506B (en) * | 2003-10-20 | 2006-09-21 | Sandisk Corp | Behavior based programming of non-volatile memory |
| TWI274347B (en) * | 2004-10-29 | 2007-02-21 | Macronix Int Co Ltd | Method for programming a multilevel phase change memory device |
| TW200719346A (en) * | 2005-05-03 | 2007-05-16 | Atmel Corp | Method and system for program pulse generation during programming of nonvolatile electronic devices |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102089827B (zh) | 2017-05-17 |
| EP2297739B1 (en) | 2015-03-04 |
| KR101558144B1 (ko) | 2015-10-08 |
| JP2011524599A (ja) | 2011-09-01 |
| CN102089827A (zh) | 2011-06-08 |
| TW201011756A (en) | 2010-03-16 |
| KR20110036885A (ko) | 2011-04-12 |
| JP5395167B2 (ja) | 2014-01-22 |
| WO2009152037A2 (en) | 2009-12-17 |
| EP2297739A2 (en) | 2011-03-23 |
| WO2009152037A3 (en) | 2010-03-18 |
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| MM4A | Annulment or lapse of patent due to non-payment of fees |