KR101447934B1 - 반도체 장치의 제조방법 - Google Patents

반도체 장치의 제조방법 Download PDF

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Publication number
KR101447934B1
KR101447934B1 KR1020080026127A KR20080026127A KR101447934B1 KR 101447934 B1 KR101447934 B1 KR 101447934B1 KR 1020080026127 A KR1020080026127 A KR 1020080026127A KR 20080026127 A KR20080026127 A KR 20080026127A KR 101447934 B1 KR101447934 B1 KR 101447934B1
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South Korea
Prior art keywords
substrate
insulating film
film
single crystal
ions
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KR1020080026127A
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English (en)
Korean (ko)
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KR20080095748A (ko
Inventor
순페이 야마자키
히데토 오누마
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가부시키가이샤 한도오따이 에네루기 켄큐쇼
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
KR1020080026127A 2007-04-25 2008-03-21 반도체 장치의 제조방법 Expired - Fee Related KR101447934B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007115993 2007-04-25
JPJP-P-2007-00115993 2007-04-25

Publications (2)

Publication Number Publication Date
KR20080095748A KR20080095748A (ko) 2008-10-29
KR101447934B1 true KR101447934B1 (ko) 2014-10-07

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KR1020080026127A Expired - Fee Related KR101447934B1 (ko) 2007-04-25 2008-03-21 반도체 장치의 제조방법

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Country Link
US (2) US7902034B2 (enExample)
EP (1) EP1986230A2 (enExample)
JP (1) JP5427366B2 (enExample)
KR (1) KR101447934B1 (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8115206B2 (en) * 2005-07-22 2012-02-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US7847904B2 (en) 2006-06-02 2010-12-07 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and electronic appliance
JP2008058809A (ja) * 2006-09-01 2008-03-13 Nuflare Technology Inc 基板カバー、荷電粒子ビーム描画装置及び荷電粒子ビーム描画方法
CN101281912B (zh) 2007-04-03 2013-01-23 株式会社半导体能源研究所 Soi衬底及其制造方法以及半导体装置
EP2143146A1 (en) * 2007-04-13 2010-01-13 Semiconductor Energy Laboratory Co, Ltd. Photovoltaic device and method for manufacturing the same
US7763502B2 (en) * 2007-06-22 2010-07-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device
JP2009088500A (ja) * 2007-09-14 2009-04-23 Semiconductor Energy Lab Co Ltd Soi基板の作製方法
US8236668B2 (en) * 2007-10-10 2012-08-07 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US8193071B2 (en) * 2008-03-11 2012-06-05 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
JP5548395B2 (ja) * 2008-06-25 2014-07-16 株式会社半導体エネルギー研究所 Soi基板の作製方法
US20100038686A1 (en) * 2008-08-14 2010-02-18 Advanced Micro Devices, Inc. Soi substrates and devices on soi substrates having a silicon nitride diffusion inhibition layer and methods for fabricating
US8741740B2 (en) * 2008-10-02 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
CN101559627B (zh) * 2009-05-25 2011-12-14 天津大学 粒子束辅助单晶脆性材料超精密加工方法
JP5658916B2 (ja) * 2009-06-26 2015-01-28 株式会社半導体エネルギー研究所 半導体装置
US8735263B2 (en) 2011-01-21 2014-05-27 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
CN104412706B (zh) * 2012-06-15 2017-05-31 须贺唯知 电子元件的封装方法以及基板接合体
FR2995445B1 (fr) * 2012-09-07 2016-01-08 Soitec Silicon On Insulator Procede de fabrication d'une structure en vue d'une separation ulterieure
JP2015233130A (ja) 2014-05-16 2015-12-24 株式会社半導体エネルギー研究所 半導体基板および半導体装置の作製方法
CN106159114A (zh) * 2015-04-23 2016-11-23 上海和辉光电有限公司 柔性显示器的封装方法
CN110391352B (zh) * 2018-04-17 2021-12-07 上海和辉光电股份有限公司 一种柔性显示器的封装方法和结构
JP6583897B1 (ja) * 2018-05-25 2019-10-02 ▲らん▼海精研股▲ふん▼有限公司 セラミック製静電チャックの製造方法
WO2025094696A1 (ja) * 2023-10-31 2025-05-08 富士フイルム株式会社 太陽電池の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08255762A (ja) * 1995-03-17 1996-10-01 Nec Corp 半導体デバイスの製造方法
JP2000036583A (ja) * 1998-05-15 2000-02-02 Canon Inc 半導体基板、半導体薄膜の作製方法および多層構造体
JP2006324530A (ja) * 2005-05-19 2006-11-30 Shin Etsu Chem Co Ltd Soiウエーハの製造方法及びsoiウエーハ
JP2007073878A (ja) 2005-09-09 2007-03-22 Shin Etsu Chem Co Ltd Soiウエーハおよびsoiウエーハの製造方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
CN100465742C (zh) * 1992-08-27 2009-03-04 株式会社半导体能源研究所 有源矩阵显示器
TW299897U (en) * 1993-11-05 1997-03-01 Semiconductor Energy Lab A semiconductor integrated circuit
CN1132223C (zh) * 1995-10-06 2003-12-24 佳能株式会社 半导体衬底及其制造方法
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
US6548382B1 (en) * 1997-07-18 2003-04-15 Silicon Genesis Corporation Gettering technique for wafers made using a controlled cleaving process
US6388652B1 (en) 1997-08-20 2002-05-14 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
WO1999010927A1 (en) * 1997-08-29 1999-03-04 Farrens Sharon N In situ plasma wafer bonding method
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
EP1041641B1 (en) * 1999-03-26 2015-11-04 Semiconductor Energy Laboratory Co., Ltd. A method for manufacturing an electrooptical device
CN1190836C (zh) * 1999-06-10 2005-02-23 东洋钢钣株式会社 复层板、半导体装置用内插器以及它们的制造方法
JP2001358233A (ja) * 2000-06-15 2001-12-26 Hitachi Ltd 半導体集積回路装置および半導体集積回路装置の製造方法
JP2004134672A (ja) * 2002-10-11 2004-04-30 Sony Corp 超薄型半導体装置の製造方法および製造装置、並びに超薄型の裏面照射型固体撮像装置の製造方法および製造装置
WO2005055293A1 (ja) * 2003-12-02 2005-06-16 Bondtech Inc. 接合方法及びこの方法により作成されるデバイス並びに表面活性化装置及びこの装置を備えた接合装置
JP3751972B2 (ja) * 2003-12-02 2006-03-08 有限会社ボンドテック 接合方法及びこの方法により作成されるデバイス並びに表面活性化装置及びこの装置を備えた接合装置
JP2004320050A (ja) 2004-06-29 2004-11-11 Sumitomo Mitsubishi Silicon Corp Soi基板及びその製造方法
FR2884966B1 (fr) * 2005-04-22 2007-08-17 Soitec Silicon On Insulator Procede de collage de deux tranches realisees dans des materiaux choisis parmi les materiaux semiconducteurs
JP5116231B2 (ja) 2005-10-21 2013-01-09 住友ベークライト株式会社 プリント配線板、プリント配線板の製造方法及び多層プリント配線板
US7608521B2 (en) * 2006-05-31 2009-10-27 Corning Incorporated Producing SOI structure using high-purity ion shower

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08255762A (ja) * 1995-03-17 1996-10-01 Nec Corp 半導体デバイスの製造方法
JP2000036583A (ja) * 1998-05-15 2000-02-02 Canon Inc 半導体基板、半導体薄膜の作製方法および多層構造体
JP2006324530A (ja) * 2005-05-19 2006-11-30 Shin Etsu Chem Co Ltd Soiウエーハの製造方法及びsoiウエーハ
JP2007073878A (ja) 2005-09-09 2007-03-22 Shin Etsu Chem Co Ltd Soiウエーハおよびsoiウエーハの製造方法

Also Published As

Publication number Publication date
KR20080095748A (ko) 2008-10-29
US20080268583A1 (en) 2008-10-30
EP1986230A2 (en) 2008-10-29
JP5427366B2 (ja) 2014-02-26
JP2008294422A (ja) 2008-12-04
US7902034B2 (en) 2011-03-08
US8557676B2 (en) 2013-10-15
US20110097872A1 (en) 2011-04-28

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