KR101424777B1 - 집적 회로 패키지 시스템 - Google Patents

집적 회로 패키지 시스템 Download PDF

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Publication number
KR101424777B1
KR101424777B1 KR1020060137039A KR20060137039A KR101424777B1 KR 101424777 B1 KR101424777 B1 KR 101424777B1 KR 1020060137039 A KR1020060137039 A KR 1020060137039A KR 20060137039 A KR20060137039 A KR 20060137039A KR 101424777 B1 KR101424777 B1 KR 101424777B1
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South Korea
Prior art keywords
terminal pad
integrated circuit
substrate
package system
circuit package
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KR1020060137039A
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Korean (ko)
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KR20070094449A (ko
Inventor
충빈 임
혁찬 권
종우 하
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스태츠 칩팩 엘티디
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Application granted granted Critical
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Assigned to 주식회사 한국씨티은행 reassignment 주식회사 한국씨티은행 근질권설정등록 Assignors: 스태츠 칩팩 피티이. 엘티디.
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/681—Shapes or dispositions thereof comprising holes not having chips therein, e.g. for outgassing, underfilling or bond wire passage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/015—Manufacture or treatment of bond wires
    • H10W72/01515—Forming coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1020060137039A 2006-03-17 2006-12-28 집적 회로 패키지 시스템 Active KR101424777B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/276,946 US7501697B2 (en) 2006-03-17 2006-03-17 Integrated circuit package system
US11/276,946 2006-03-17

Publications (2)

Publication Number Publication Date
KR20070094449A KR20070094449A (ko) 2007-09-20
KR101424777B1 true KR101424777B1 (ko) 2014-07-31

Family

ID=38516949

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020060137039A Active KR101424777B1 (ko) 2006-03-17 2006-12-28 집적 회로 패키지 시스템

Country Status (4)

Country Link
US (2) US7501697B2 (https=)
JP (1) JP4943898B2 (https=)
KR (1) KR101424777B1 (https=)
TW (1) TWI469309B (https=)

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US7364945B2 (en) 2005-03-31 2008-04-29 Stats Chippac Ltd. Method of mounting an integrated circuit package in an encapsulant cavity
US8198735B2 (en) 2006-12-31 2012-06-12 Stats Chippac Ltd. Integrated circuit package with molded cavity
US9466545B1 (en) 2007-02-21 2016-10-11 Amkor Technology, Inc. Semiconductor package in package
US7982297B1 (en) * 2007-03-06 2011-07-19 Amkor Technology, Inc. Stackable semiconductor package having partially exposed semiconductor die and method of fabricating the same
US20080315406A1 (en) * 2007-06-25 2008-12-25 Jae Han Chung Integrated circuit package system with cavity substrate
US8258614B2 (en) * 2007-11-12 2012-09-04 Stats Chippac Ltd. Integrated circuit package system with package integration
US20090127715A1 (en) * 2007-11-15 2009-05-21 Shin Hangil Mountable integrated circuit package system with protrusion
US8536692B2 (en) * 2007-12-12 2013-09-17 Stats Chippac Ltd. Mountable integrated circuit package system with mountable integrated circuit die
US8084849B2 (en) * 2007-12-12 2011-12-27 Stats Chippac Ltd. Integrated circuit package system with offset stacking
US7781261B2 (en) * 2007-12-12 2010-08-24 Stats Chippac Ltd. Integrated circuit package system with offset stacking and anti-flash structure
US7985628B2 (en) * 2007-12-12 2011-07-26 Stats Chippac Ltd. Integrated circuit package system with interconnect lock
US7800212B2 (en) * 2007-12-27 2010-09-21 Stats Chippac Ltd. Mountable integrated circuit package system with stacking interposer
US8247893B2 (en) * 2007-12-27 2012-08-21 Stats Chippac Ltd. Mountable integrated circuit package system with intra-stack encapsulation
US8258015B2 (en) * 2008-02-22 2012-09-04 Stats Chippac Ltd. Integrated circuit package system with penetrable film adhesive
US7919871B2 (en) * 2008-03-21 2011-04-05 Stats Chippac Ltd. Integrated circuit package system for stackable devices
US20090243069A1 (en) * 2008-03-26 2009-10-01 Zigmund Ramirez Camacho Integrated circuit package system with redistribution
US9293385B2 (en) * 2008-07-30 2016-03-22 Stats Chippac Ltd. RDL patterning with package on package system
US8304869B2 (en) * 2008-08-01 2012-11-06 Stats Chippac Ltd. Fan-in interposer on lead frame for an integrated circuit package on package system
US7750455B2 (en) * 2008-08-08 2010-07-06 Stats Chippac Ltd. Triple tier package on package system
US8513801B2 (en) * 2008-08-18 2013-08-20 Stats Chippac Ltd. Integrated circuit package system
US8406004B2 (en) 2008-12-09 2013-03-26 Stats Chippac Ltd. Integrated circuit packaging system and method of manufacture thereof
US7923290B2 (en) * 2009-03-27 2011-04-12 Stats Chippac Ltd. Integrated circuit packaging system having dual sided connection and method of manufacture thereof
US8004073B2 (en) * 2009-06-17 2011-08-23 Stats Chippac Ltd. Integrated circuit packaging system with interposer and method of manufacture thereof
TWI411051B (zh) * 2009-12-02 2013-10-01 晨星半導體股份有限公司 封裝層疊方法與結構及其電路板系統
CN102087983A (zh) * 2009-12-07 2011-06-08 晨星软件研发(深圳)有限公司 封装层叠方法与结构及其电路板系统
KR101695352B1 (ko) * 2010-08-12 2017-01-12 삼성전자 주식회사 리드 프레임 및 이를 갖는 반도체 패키지
CN102569247A (zh) * 2012-01-17 2012-07-11 华为终端有限公司 集成模块、集成系统板和电子设备
JP2014150213A (ja) * 2013-02-04 2014-08-21 Fujitsu Semiconductor Ltd 半導体装置及び半導体装置の製造方法
US9312198B2 (en) * 2013-03-15 2016-04-12 Intel Deutschland Gmbh Chip package-in-package and method thereof
KR102729072B1 (ko) 2019-08-28 2024-11-13 삼성전자주식회사 반도체 패키지
KR20240023263A (ko) * 2022-08-11 2024-02-21 삼성전자주식회사 반도체 패키지

Citations (3)

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US5663593A (en) * 1995-10-17 1997-09-02 National Semiconductor Corporation Ball grid array package with lead frame
US6861288B2 (en) * 2003-01-23 2005-03-01 St Assembly Test Services, Ltd. Stacked semiconductor packages and method for the fabrication thereof
JP2005285997A (ja) * 2004-03-29 2005-10-13 Nec Electronics Corp 半導体装置

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US5656550A (en) * 1994-08-24 1997-08-12 Fujitsu Limited Method of producing a semicondutor device having a lead portion with outer connecting terminal
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Publication number Priority date Publication date Assignee Title
US5663593A (en) * 1995-10-17 1997-09-02 National Semiconductor Corporation Ball grid array package with lead frame
US6861288B2 (en) * 2003-01-23 2005-03-01 St Assembly Test Services, Ltd. Stacked semiconductor packages and method for the fabrication thereof
JP2005285997A (ja) * 2004-03-29 2005-10-13 Nec Electronics Corp 半導体装置

Also Published As

Publication number Publication date
KR20070094449A (ko) 2007-09-20
TW200739874A (en) 2007-10-16
US20090134509A1 (en) 2009-05-28
US7884460B2 (en) 2011-02-08
JP2007251159A (ja) 2007-09-27
US7501697B2 (en) 2009-03-10
JP4943898B2 (ja) 2012-05-30
US20070216010A1 (en) 2007-09-20
TWI469309B (zh) 2015-01-11

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