KR101297486B1 - 금속 범프로의 소수 엘리먼트들의 도핑 - Google Patents

금속 범프로의 소수 엘리먼트들의 도핑 Download PDF

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KR101297486B1
KR101297486B1 KR1020100126847A KR20100126847A KR101297486B1 KR 101297486 B1 KR101297486 B1 KR 101297486B1 KR 1020100126847 A KR1020100126847 A KR 1020100126847A KR 20100126847 A KR20100126847 A KR 20100126847A KR 101297486 B1 KR101297486 B1 KR 101297486B1
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minority
layer
elements
metal
bumps
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KR1020100126847A
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KR20120010555A (ko
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치엔 링 황
쳉 충 린
후이 중 차이
젱이 림
충시 리우
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타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드
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Abstract

기판 제조 방법은 기판을 마련하는 단계와, 기판 위에 솔더 범프를 형성하는 단계를 포함한다. 소수 엘리먼트가 솔더 범프의 상면에 인접한 영역에 도입된다. 다음에 소수 엘리먼트를 솔더 범프로 도출하기 위해 솔더 범프에 대한 리플로우 공정이 수행된다.

Description

금속 범프로의 소수 엘리먼트들의 도핑{DOPING MINOR ELEMENTS INTO METAL BUMPS}
본 발명은 일반적으로 집적 회로에 관한 것으로서, 특히 금속 범프의 형성 방법에 관한 것이다.
반도체 칩의 형성에 있어서, 트랜지스터들과 같은 집적 회로 디바이스는 반도체 칩의 반도체 기판의 표면에서 처음 형성된다. 다음에 집적 회로 디바이스 위에 인터커넥트 구조들이 형성된다. 금속 범프가 반도체 칩의 표면 위에 형성됨으로써, 집적 회로 디바이스에 엑세스 가능하다.
게르마늄, 은, 및/또는 구리와 같은 소수 엘리먼트(minor element)가 부가되는 경우 금속 범프의 특성이 향상될 수가 있다. 예컨대 솔더 범프의 온도가 증가될 때 고체 상(solid phase)에서 액체 상(liquid phase)으로의 전이 온도는 솔더 범프의 온도가 감소될 때 액체 상에서 고체 상으로의 전이 온도와는 상이함을 의미하는 언더 냉각 효과(under cooling effect)를 겪는다. 이는 결과적으로 솔더 범프의 랜덤한 고형(체)화를 가져와서 솔더 범프의 품질을 저하시킨다.
본 발명의 일형태에 의하면, 디바이스를 형성하기 위한 방법은 기판을 마련하는 단계와, 기판 위에 솔더 범프를 형성하는 단계를 포함한다. 솔더 범프의 형성 단계 후, 소수 엘리먼트가 솔더 범프의 상면에 인접한 영역에 도입된다. 다음에 소수 엘리먼트를 솔더 범프로 도출하기 위해 솔더 범프에 대한 리플로우 프로세스(reflow process)가 수행된다.
다른 실시예들이 또한 개시된다.
본 발명에 의한 기판 제조 방법에 의하면 기존에는 금속 범프에 부가되는 것이 적절하지 않았던 많은 유형의 소수 엘리먼트를 부가할 수가 있어 금속 범프의 특성의 개선과 더불어 비용 개선을 도모할 수가 있다.
도 1 내지 도 6은 일실시예에 따른 소수 엘리먼트를 포함하는 금속 범프의 제조에 있어서의 중간 단계들의 단면도이며, 소수 엘리먼트는 플럭스로 부가된다.
도 7a 내지 도 9는 다양한 실시예에 따른 금속 범프의 형성에 있어서의 중간 단계들의 단면도이며, 소수 엘리먼트의 도입은 주입 또는 증착을 포함한다.
도 10 내지 도 14는 솔더 범프의 제조에 있어서의 중간 단계들의 단면도이며, 소수 엘리먼트는 무전해 도금(electroless plating)을 이용하여 솔더 범프의 표면 상에 형성되며 솔더 범프에서 용융된다.
이후 본 발명의 실시예에 대해서 상세히 설명하기로 한다. 그러나 실시예들은 광범위한 다양한 특정의 문맥으로 실시 가능한 많은 응용 가능한 발명의 개념을 제공함을 알아야 한다. 기술된 특정의 실시예들은 단지 일례이며 이에 본 발명의 범위가 제한되지는 않는다.
양호한 소수 엘리먼트를 포함하는 금속 범프를 형성하기 위한 신규의 방법이 일실시예에 따라 마련된다. 실시예를 제조하기 위한 중간 단계들이 설명된다. 다양한 실시예들이 기술된다. 다양한 도면 및 예증의 실시예를 통틀어 동일 참조 부호는 동일 요소를 가리키기 위해 사용된다.
도 1에 있어서 기판(10)을 포함하는 웨이퍼(2)가 제공된다. 기판(10)은 실리콘 기판과 같은 반도체 기판일 수 있으며, 기판은 실리콘 게르마늄, 실리콘 카바이드, 갈륨 아세나이드 등과 같은 기타 반도체 물질을 포함할 수 있다. 트랜지스터와 같은 반도체 디바이스(14)는 기판(10)의 표면에서 형성 가능하다. 금속선과 그 안에 형성된 비아(도시안됨)를 포함하고 반도체 디바이스(14)에 전기적으로 결합되는 인터커넥트 구조(12)는 기판(10) 위에 형성된다. 금속선과 비아는 구리 또는 구리 합금으로 형성 가능하고 공지의 다마신 공정을 이용하여 형성 가능하다. 인터커넥트 구조(12)는 층간 유전체(ILD)와 금속간 유전체(IMD)를 포함할 수 있다. 대안의 실시예에서, 웨이퍼(2)는 인터포저 웨이퍼 또는 패키지 기판이며, 집적 회로 내에 형성된, 트랜지스터, 저항, 캐패시터 등을 포함하는 집적 회로 디바이스가 웨이퍼내에는 실질적으로 없다. 이 실시예에서 기판(10)은 실리콘 산화물과 같은 유전체 물질 또는 반도체 물질로 형성 가능하다.
금속 패드(28)는 인터커넥트 구조(12) 위에 형성된다. 금속 패드(28)는 알루미늄, 구리(Cu), 은(Ag), 금(Au), 니켈(Ni), 텅스텐(W), 그것의 합금, 및/또는 그것의 다층을 포함할 수가 있다. 금속 패드(28)는 예컨대 기저 인터커넥트 구조(12)를 통해 반도체 디바이스(14)에 전기적으로 연결될 수 있다. 패시베이션 층(30)은 금속 패드(28)의 에지 부분을 피복하기 위해 형성될 수 있다. 일례의 실시예에서 패시베이션 층(30)은 폴리이미드 또는 실리콘 산화물, 실리콘 질화물, 및 그것의 다층과 같은 기타 공지의 유전체 물질로 형성된다.
도 2에 있어서, 옵션의 확산 장벽층(40)과 시드층(42)을 포함할 수 있는 금속 하부층(UBM, Under-bump metallurgy)은 형성된 블랜킷이다. 확산 장벽 층(40)은 티탄늄 층, 티타늄 질화물 층, 탄탈 층, 또는 탄탈 질화물 층일 수가 있다. 시드 층(42)의 물질은 구리 또는 구리 합금을 포함할 수가 있어 이후 대안적으로 구리 시드 층(42)이라 칭한다. 그러나 은, 금, 알루미늄 및 그것의 조합물과 같은 다른 물질들이 또한 포함될 수가 있다. 일실시예에서 확산 장벽 층(40) 및 구리 시드 층(42)은 물리적 기상 증착 또는 기타 응용 가능한 방법을 이용하여 형성된다.
도 3은 예컨대 포토레지스트로 형성 가능한 마스크(46)의 형성을 도시하고 있다. 따라서 구리 시드 층(42)의 일부분은 마스크(46)에서 개구(45)를 통해 노출된다. 다음에 웨이퍼(2)는 도금 용액(도시안됨)에 놓여져서 UBM(40/42) 상에 그리고 개구(45) 내에 금속 범프(50)를 형성하기 위해 도금이 수행된다. 도금은 전기 도금, 무전해 도금, 침지(immersion) 도금 등일 수 있다. 일실시예에서 금속 범프(50)는 Sn-Ag-Cu, Sn-Ag-Cu 등으로 형성 가능한 솔더 범프일 수가 있으며 무연(lead-free) 또는 연함유 금속 범프일 수가 있다.
금속 범프(50)가 구리 범프인 일실시예에서 니켈, 주석 층, 팔라듐, 금 층, 그것의 합금, 및 그것의 다층과 같은 추가 층들(도시안됨)은 금속 범프(50)의 표면 상에 형성 가능하다. 더욱이 추가 층들은 마스크(46)의 후속 제거 이전 혹은 이후에 형성 가능하며, 제거 단계는 도 4에 도시되고 있다. 금속 범프(50)의 형성 후 마스크(46)가 제거되며 마스크(46)에 의해서 사전에 피복된 UBM(40/42) 부분은 또한 예컨대 에칭에 의해서 제거된다. 도 4에는 최종 구조가 도시되고 있다.
도 5는 금속 범프(50) 상에 플럭스(52)의 코팅을 도시하며, 플럭스(52)는 스핀 코팅 또는 드리핑을 이용하여 코팅 가능하다. (54)로 심볼 표시된 바람직한 소수 엘리먼트들이 플럭스(52)로 부가될 수 있다. 설명 전체를 통해서 "소수 엘리먼트"란 최종의 금속 범프(예컨대 도 6 및 도 9에서 솔더 볼(56))에서 낮은 중량 퍼센트를 갖는 엘리먼트를 지칭하며, 소수 엘리먼트의 중량 퍼센트는 예컨대 약 0.2 퍼센트보다 낮을 수가 있다. 일례의 소수 엘리먼트(54)는 니켈, 철, 망간, 티타늄, 세륨, 안티몬, 및 그것의 조성물에서 선택 가능하며, 기타 소수 엘리먼트가 부가 가능하다. 금속 범프(50)가 Sn-Ag 솔더로 형성되는 일례의 실시예에서, 소수 엘리먼트, 그 이외에 상기한 소수 엘리먼트는 비스무스 및/또는 인듐 등에서 추가로 선택 가능하다. 금속 범프(50)가 Sn-Ag-Cu 솔더로 형성되는 대안의 실시예에서, 소수 엘리먼트, 그 이외에 상기한 소수 엘리먼트는 게르마늄, 아연, 및/또는 코발트를 더 포함할 수 있다. 금속 범프(50)의 물질에 의존하는 소수 엘리먼트는 산화 방지, 습윤능력 증대, 기계적 거동 향상, 크리프 저항(creep resistance) 증대, 전자 마이그레이션 저항(electro-migration resistance) 향상 등과 같은 기능들을 가질 수가 있다.
소수 엘리먼트(54)는 코팅 전 플럭스(52)에서 사전 혼합 가능하며, 소수 엘리먼트(54)는 (예컨대 원자를 포함하는)파우더 형태일 수 있다. 대안의 실시예에서 소수 엘리먼트(54)는 조성물 형태로 플럭스(52)에서 혼합 가능하며 이온의 형태로 존재할 수도 있다. 일례의 실시예에서 플럭스(52)에서 소수 엘리먼트의 중량 퍼센트는 약 0.001 퍼센트 보다 크거나, 혹은 약 0.005 퍼센트 보다 크거나, 혹은 약 0.001 퍼센트 또는 약 0.2 퍼센트 사이에 있다.
다음에는 도 6에서 도시하고 있는 바와 같이 금속 범프(50)에 대해 리플로우가 수행되고 그에 따라 금속 범프(50)는 솔더 볼(56)(또한 솔더 범프인)이 된다. 용융되는 금속 범프(50)로, 플럭스(52) 내의 소수 엘리먼트(54)는 솔더 볼(56) 전체에 걸쳐서 용이하게 확산 가능하다. 리플로우 단계 후에, 플럭스(52)의 잔류물이 제거 가능하다. 최종의 솔더 볼/범프(56)에서 소수 엘리먼트(54)의 중량 퍼센트는 약 0.001 퍼센트와 약 0.2 퍼센트 사이에 혹은 0.01 퍼센트와 약 0.1 퍼센트 사이에 있을 수 있으나, 다른 퍼센트 또한 이용 가능하다. 솔더 볼(56)의 형성 후, 그리고 웨이퍼(2)의 다이싱 후 솔더 볼(56)과 개개의 다이는 도 9에서 개략적으로 도시한 바와 같이 패키지 기판(64)(또는 인쇄 회로 기판(PCB))과 같은 또 다른 집적 회로 구성요소에 연결 가능하다.
도 7a 내지 도 9는 각종 대안의 실시예들에 따른 단면도를 도시하고 있다. 그밖에 달리 규정되지 않으면, 이들 실시예에서 참조 부호는 도 1 내지 도 6에 도시한 실시예들에서 동일 참조 부호를 나타낸다. 다음에는 도 7a에서 도시하고 있는 바와 같이 소수 엘리먼트(54)를 금속 범프(50)로 도입하기 위해 주입이 수행된다. 다시 소수 엘리먼트는 게르마늄, 비스무스, 아연, 니켈, 은, 코발트, 인듐, 및 그것의 조성물을 포함할 수 있다. 하나의 유형 이상의 소수 엘리먼트가 필요하면, 하나 이상의 주입 단계가 수행 가능하며, 각각의 단계는 하나의 유형의 소수 엘리먼트를 도입한다. 주입은 수직 주입을 포함하며, 옵션으로 틸티드 주입을 포함할 수 있다. 대안의 실시예에서 주입은 금속 범프(50)의 형성 후, 그리고 마스크(46)의 제거 전에 수행 가능하다. 주입의 결과로서, 소수 엘리먼트(54)는 도 7a에서 도시하고 있는 바와 같이 표면 층이 상면 층(50A-1)과 가능하게는 측벽 표면 층(50A-2)을 포함할 수 있는 금속 범프(50)의 표면 층에 주입될 수 있다.
대안의 실시예에서 주입을 이용하는 대신에 금속 범프(50)의 표면에서 소수 엘리먼트를 코팅하기 위해 증착 단계가 수행된다. 도 7b에 있어서, 소수 엘리먼트 포함 층(60)이 플라즈마 이온 지원 증착(PIAD) 및 플라즈마 인핸스드 CVD(PECVD)와 같은 화학 기상 증착(CVD) 방법(이들에 제한되지 않음)을 포함하는 방법으로부터 선택된 증착 방법 또는 기타 응용 가능한 방법을 이용하여 형성된다. 소수 엘리먼트 포함 층(60)은 실질적으로 순수 소수 엘리먼트를 포함하거나 바람직한 소수 엘리먼트 이외의 엘리먼트를 포함하는 화합물 층일 수가 있다.
금속 범프(50)가 솔더 범프인 일실시예에 있어서, 플럭스(52)는 도 8에서 도시하고 있는 바와 같이 주입 또는 증착 소수 엘리먼트(54) 위에 코팅 가능하다. 그러나 이 실시예에서 플럭스(52)는 실질적으로 소수 엘리먼트가 없으나, 소수 엘리먼트를 포함할 수가 있다. 다음에 소수 엘리먼트를 포함하는 솔더 볼(56)을 형성하기 위해 리플로우가 수행되며 이어서 잔류 플럭스를 제거하기 위한 단계가 행해진다. 최종 구조는 도 6에서 도시하고 있는 바와 같은 구조와 실질적으로 유사하다.
금속 범프(50)가 리플로우될 수 없는 실시예에서, 예컨대 금속 범프(50)가 구리 범프인 경우, 플럭스는 코팅되지 않고, 리플로우 프로세스가 수행되지 않는다. 오히려 소수 엘리먼트(54)를 금속 범프(50)로 도출하기 위해 열적 어닐링이 수행된다. 금속 범프(50)가 용융되지 않기 때문에, 금속 범프(50)에서 소수 엘리먼트의 확산성은 낮으며, 그에 따라 소수 엘리먼트(54)는 도 9에서 도시하고 있는 금속 범프(50)의 표면 층(50A)에 집중될 수 있고, 금속 범프(50)의 바닥 층 및/또는 이너 층(inner layer)(영역)(50B)은 그안에 실질적으로 소수 엘리먼트(54)가 없을 수 있음이 관측된다.
금속 범프(50)의 형성 후, 그리고 웨이퍼(2)의 다이싱 후, 금속 범프(50) 및 개개의 다이는 도 9에서 개략적으로 도시하고 있는 바와 같은 패키지 기판(64)(또는 인쇄 회로 기판(PCB))과 같은 다른 집적 회로 구성요소에 결합 가능하다. 금속 범프(50)가 집적 회로 구성요소(64) 상에 있는 솔더 범프(68)에 결합될 때, 표면 층에 있는 소수 엘리먼트(54)는 솔더 범프(68)로 확산 가능함으로써, 바람직한 트성의 향상이 있게 된다.
도 10 내지 도 14는 각종 대안의 실시예에 따른 단면도를 도시하고 있다. 그밖에 달리 규정하고 있지 않으면, 이 실시예에서 참조 번호는 다른 실시예에서 동일 요소를 가리킨다. 이 실시예의 초기 단계는 도 1 및 도 2에 도시한 것과 실질적으로 동일할 수 있다. 다음에 도 10에서 도시하고 있는 바와 같이 포토레지스트로 형성 가능한 마스크(46)가 형성되고 패턴화되며, UBM(40/42)의 일부분은 개구(45)를 통해 노출된다. 다음에 장벽 층(70)(70A,70B를 포함)은 예컨대 도금에 의해 개구(45)에서 형성된다. 장벽 층(70)은 구리 층(70A)을 포함할 수 있다. 또한 옵션 니켈 층(70B)은 구리 층(70A) 상에 형성 가능하다. 일례의 실시예에서 구리 층(70A)은 약 1 ㎛와 10 ㎛ 사이의 두께를 가지며 약 5 ㎛일 수 있다. 니켈 층(70B)은 약 1 ㎛와 5 ㎛ 사이의 두께를 가지며 약 3 ㎛일 수 있다. 다음에 솔더 범프(50)는 예컨대 도금에 의해 장벽 층(70) 상에 형성된다.
다음에 마스크(46)는 도 11에서 도시하고 있는 바와 같이 제거된다. 다음에 마스크(46)에 의해서 사전 도포된 UBM(40/42) 부분은 도 12에서 도시하고 있는 바와 같은 구조가 된다. 도 13은 소수 엘리먼트 포함 층(60)의 형성을 도시한다. 소수 엘리먼트 포함 층(60)은 코발트 층(60A)을 포함할 수 있다. 층(60B,60C,60D)으로서 개략적으로 도시되고 있는 니켈 층, 구리 층, 및/또는 금 층과 같은 추가 층들이 또한 형성 가능하다. 소수 엘리먼트 포함 층(60)은 하나 이상의 층(60A,60B,60C,60D)을 포함할 수가 있고 이들 층의 형성 순서는 임의의 조합으로 정렬 가능하다. 소수 엘리먼트 포함 층(60)의 두께 T는 약 1000 Å 보다 작거나, 약 500 Å 보다 작거나, 혹은 심지어는 약 200 Å 보다 작을 수가 있다. 소수 엘리먼트 포함 층(60)의 최적의 두께는 상세히 설명되는 바와 같이 솔더 범프(50)의 두께에 의존한다.
소수 엘리먼트 포함 층(60)은 무전해 도금을 이용하여 형성 가능하다. 따라서 코발트 층(60A), 니켈 층(60B), 및 구리 층(60C)과 같은 소수 엘리먼트 포함 층(60)은 솔더 범프(50), 장벽 층(70), 및 UBM(40/42) 상에서(그러나 패시베이션 층(30) 상에서 형성되지 않음) 선별적으로(그리고 순차적으로) 형성된다. 금 층(60D)은 침지(immersion)를 이용하여 형성 가능하다. 무전해 도금을 이용함으로써 소수 엘리먼트 포함 층(60)의 두께를 정확하게 제어 가능하다.
도 14을 참조하면, 예컨대 웨이퍼(2)의 가열 혹은 급속 열 공정(RTP)을 통해 솔더 볼(56)을 형성하도록 솔더 범프(50)를 용융하기 위해 리플로우가 수행된다. 소수 엘리먼트 포함 층(60)은 최종의 솔더 볼(56)에서 혼합된다. 소수 엘리먼트 포함 층(60)에서 소수 엘리먼트들을 솔더 볼(56)에서 보다 균일하게 분포시키기 위해 리플로우가 수행될 때 초음파(화살표로 표시된)가 인가될 수 있다. 리플로우 후 추가 어닐링이 솔더 볼(56)에서 소수 엘리먼트들을 추가로 확산하기 위해 솔더 볼(56)의 용융 온도 보다 낮은 온도에서 옵션 수행될 수 있다.
최종 솔더 볼(56)에서 코발트와 같은 소수 엘리먼트들은 약 0.7 퍼센트 보다 작은 원자 퍼센트 혹은 0.1 퍼센트 보다 작은 원자 퍼센트를 가질 수가 있다. 또한 솔더 볼(56)에서 원자 퍼센트는 약 0.05 퍼센트 보다 작거나 혹은 심지어는 약 0.01 퍼센트 보다 작을 수가 있다. 따라서 도 13에서 솔더 범프의 두께가 약 80 ㎛라고 가정하면, 소수 엘리먼트 포함 층(60)의 두께 T는 소수 엘리먼트들의 바람직한 원자 퍼센트가 0.03 퍼센트이거나 혹은 약 160 Å인 경우 약 480 Å일 수 있다. 코발트 및 약간의 다른 소수 엘리먼트들의 첨가로 인해, 언더 냉각 효과가 적어도 감소될 수가 있다. 따라서 후속의 본딩 공정 동안 솔더 볼(56)은 보다 균일하게 고형화될 수가 있다.
실시예들을 이용함으로써 금속 범프에 부가되는 것은 적절하지 않은 많은 유형의 소수 엘리먼트가 이제는 부가될 수가 있다. 따라서 금속 범프의 특성이 현저히 개선될 수 있다. 더욱이 소수 엘리먼트의 부가 비용이 줄어드는데 그것은 소수 엘리먼트를 결합하기 위해 전해질을 이용하는 것을 포함하고 있지 않기 때문이다.
비록 실시예들 및 그들의 이점에 대해서 상세히 설명하였지만 첨부된 청구범위에 의해서 정의되는 바와 같이 실시예들의 사상 및 범위를 일탈하지 않는 각종 변환, 치환, 변경이 행해질 수 있음을 알아야 한다. 더욱이 본 발명의 범위는 명세서에서 기술하고 있는 공정, 머신, 제조, 및 물의 조성, 수단, 방법 및 단계들의 특정 실시예에 제한되지 않는다. 당업자라면 개시 내용으로부터 용이하게 인식 가능한 바와 같이, 여기서 기술된 대응의 실시예들과 실질적으로 동일한 결과를 달성하거나 실질적으로 동일한 기능을 수행하는 기존에 혹은 나중에 개발될 공정, 머신, 제조, 물의 조성, 수단, 방법 또는 단계는 개시 내용에 따라 이용 가능하다. 따라서 첨부된 청구범위는 이러한 공정, 머신, 제조, 물의 조성, 수단, 방법, 혹은 단계를 범위 내에 포함한다. 또한 각각의 청구범위는 개별의 실시예, 및 각종 청구범위의 조합을 구성하고 실시예들은 개시 내용의 범위 내에 있다.
2 웨이퍼 10 기판
12 인터커넥트구조 14 반도체디바이스
28 금속패드 30 패시베이션층

Claims (10)

  1. 삭제
  2. 삭제
  3. 삭제
  4. 삭제
  5. 삭제
  6. 삭제
  7. 삭제
  8. 삭제
  9. 디바이스를 형성하는 방법에 있어서,
    기판을 제공하는 단계;
    상기 기판 위에 금속 범프를 형성하는 단계;
    상기 금속 범프의 표면 상에 소수 엘리먼트를 포함하는 소수 엘리먼트 포함 층(minor element containing layer)을 증착하는 단계; 및
    상기 소수 엘리먼트를 상기 금속 범프로 드라이브(drive)하기 위해 가열 공정을 수행하는 단계를 포함하고,
    상기 금속 범프는 솔더 범프 및 구리 범프 중 적어도 하나를 포함하는 것이고,
    상기 소수 엘리먼트는 게르마늄, 비스무스, 아연, 니켈, 은, 코발트, 인듐, 철, 망간, 티타늄, 세륨, 안티몬, 및 이들의 조합으로 필수적으로 이루어진 그룹에서 선택되는 것이며,
    상기 소수 엘리먼트 포함 층 증착 단계는, 상기 금속 범프의 표면 상에 상기 소수 엘리먼트를 포함하는 소수 엘리먼트 포함 층을 형성하도록 무전해 도금(electroless plating)을 수행하는 단계를 포함하는 것인 디바이스 형성 방법.
  10. 삭제
KR1020100126847A 2010-07-26 2010-12-13 금속 범프로의 소수 엘리먼트들의 도핑 KR101297486B1 (ko)

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