KR101130331B1 - 서로 다른 높이를 갖는 융기 드레인 및 소스 영역들을구비한 트랜지스터를 형성하는 고급기술 - Google Patents
서로 다른 높이를 갖는 융기 드레인 및 소스 영역들을구비한 트랜지스터를 형성하는 고급기술 Download PDFInfo
- Publication number
- KR101130331B1 KR101130331B1 KR1020067008385A KR20067008385A KR101130331B1 KR 101130331 B1 KR101130331 B1 KR 101130331B1 KR 1020067008385 A KR1020067008385 A KR 1020067008385A KR 20067008385 A KR20067008385 A KR 20067008385A KR 101130331 B1 KR101130331 B1 KR 101130331B1
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- KR
- South Korea
- Prior art keywords
- regions
- semiconductor
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- semiconductor region
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
- H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10351008.7 | 2003-10-31 | ||
| DE10351008A DE10351008B4 (de) | 2003-10-31 | 2003-10-31 | Verfahren zur Herstellung von Transistoren mit erhöhten Drain- und Sourcegebieten mit unterschiedlicher Höhe sowie ein Halbleiterbauelement |
| US10/862,518 US7176110B2 (en) | 2003-10-31 | 2004-06-07 | Technique for forming transistors having raised drain and source regions with different heights |
| US10/862,518 | 2004-06-07 | ||
| PCT/US2004/031038 WO2005045924A1 (en) | 2003-10-31 | 2004-09-17 | An advanced technique for forming transistors having raised drain and source regions with different height |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20060108641A KR20060108641A (ko) | 2006-10-18 |
| KR101130331B1 true KR101130331B1 (ko) | 2012-03-27 |
Family
ID=34575412
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020067008385A Expired - Fee Related KR101130331B1 (ko) | 2003-10-31 | 2004-09-17 | 서로 다른 높이를 갖는 융기 드레인 및 소스 영역들을구비한 트랜지스터를 형성하는 고급기술 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP2007528123A (enExample) |
| KR (1) | KR101130331B1 (enExample) |
| GB (1) | GB2422488B (enExample) |
| WO (1) | WO2005045924A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12432993B2 (en) | 2022-05-25 | 2025-09-30 | Samsung Electronics Co., Ltd. | Integrated circuit devices |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060252191A1 (en) * | 2005-05-03 | 2006-11-09 | Advanced Micro Devices, Inc. | Methodology for deposition of doped SEG for raised source/drain regions |
| DE102005030583B4 (de) * | 2005-06-30 | 2010-09-30 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung von Kontaktisolationsschichten und Silizidgebieten mit unterschiedlichen Eigenschaften eines Halbleiterbauelements und Halbleiterbauelement |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US616582A (en) * | 1898-12-27 | Victor odqtjist and john c | ||
| US690636A (en) * | 1900-12-19 | 1902-01-07 | Joseph Coldwell | Warp stop-motion for looms. |
| US5970351A (en) * | 1994-10-12 | 1999-10-19 | Nec Corporation | Production method for a MISFET, complementary MISFET |
| US6235568B1 (en) * | 1999-01-22 | 2001-05-22 | Intel Corporation | Semiconductor device having deposited silicon regions and a method of fabrication |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5030582A (en) * | 1988-10-14 | 1991-07-09 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating a CMOS semiconductor device |
| JP2000124327A (ja) * | 1998-10-14 | 2000-04-28 | Toshiba Corp | 半導体装置及びその製造方法 |
| TW497120B (en) * | 2000-03-06 | 2002-08-01 | Toshiba Corp | Transistor, semiconductor device and manufacturing method of semiconductor device |
| JP2002026313A (ja) * | 2000-07-06 | 2002-01-25 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
| JP2002043567A (ja) * | 2000-07-27 | 2002-02-08 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2002231908A (ja) * | 2001-02-06 | 2002-08-16 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
-
2004
- 2004-09-17 JP JP2006537994A patent/JP2007528123A/ja active Pending
- 2004-09-17 GB GB0607742A patent/GB2422488B/en not_active Expired - Fee Related
- 2004-09-17 WO PCT/US2004/031038 patent/WO2005045924A1/en not_active Ceased
- 2004-09-17 KR KR1020067008385A patent/KR101130331B1/ko not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US616582A (en) * | 1898-12-27 | Victor odqtjist and john c | ||
| US690636A (en) * | 1900-12-19 | 1902-01-07 | Joseph Coldwell | Warp stop-motion for looms. |
| US5970351A (en) * | 1994-10-12 | 1999-10-19 | Nec Corporation | Production method for a MISFET, complementary MISFET |
| US6235568B1 (en) * | 1999-01-22 | 2001-05-22 | Intel Corporation | Semiconductor device having deposited silicon regions and a method of fabrication |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12432993B2 (en) | 2022-05-25 | 2025-09-30 | Samsung Electronics Co., Ltd. | Integrated circuit devices |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2422488A (en) | 2006-07-26 |
| WO2005045924A1 (en) | 2005-05-19 |
| KR20060108641A (ko) | 2006-10-18 |
| GB0607742D0 (en) | 2006-05-31 |
| JP2007528123A (ja) | 2007-10-04 |
| GB2422488B (en) | 2008-02-13 |
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