KR101113096B1 - 자기저항 메모리를 위한 기록 드라이버 - Google Patents
자기저항 메모리를 위한 기록 드라이버 Download PDFInfo
- Publication number
- KR101113096B1 KR101113096B1 KR1020067004467A KR20067004467A KR101113096B1 KR 101113096 B1 KR101113096 B1 KR 101113096B1 KR 1020067004467 A KR1020067004467 A KR 1020067004467A KR 20067004467 A KR20067004467 A KR 20067004467A KR 101113096 B1 KR101113096 B1 KR 101113096B1
- Authority
- KR
- South Korea
- Prior art keywords
- transistor
- memory
- current
- coupled
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1695—Protection circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1096—Write circuits, e.g. I/O line write drivers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/656,676 US6842365B1 (en) | 2003-09-05 | 2003-09-05 | Write driver for a magnetoresistive memory |
| US10/656,676 | 2003-09-05 | ||
| PCT/US2004/022510 WO2005027135A1 (en) | 2003-09-05 | 2004-07-15 | Write driver for a magnetoresistive memory |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020117023223A Division KR20110124350A (ko) | 2003-09-05 | 2004-07-15 | 자기저항 메모리를 위한 기록 드라이버 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20060088101A KR20060088101A (ko) | 2006-08-03 |
| KR101113096B1 true KR101113096B1 (ko) | 2012-02-17 |
Family
ID=33553000
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020117023223A Withdrawn KR20110124350A (ko) | 2003-09-05 | 2004-07-15 | 자기저항 메모리를 위한 기록 드라이버 |
| KR1020067004467A Expired - Lifetime KR101113096B1 (ko) | 2003-09-05 | 2004-07-15 | 자기저항 메모리를 위한 기록 드라이버 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020117023223A Withdrawn KR20110124350A (ko) | 2003-09-05 | 2004-07-15 | 자기저항 메모리를 위한 기록 드라이버 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6842365B1 (enExample) |
| EP (1) | EP1665277A4 (enExample) |
| JP (1) | JP4554611B2 (enExample) |
| KR (2) | KR20110124350A (enExample) |
| CN (1) | CN100492527C (enExample) |
| TW (1) | TWI348161B (enExample) |
| WO (1) | WO2005027135A1 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6956764B2 (en) * | 2003-08-25 | 2005-10-18 | Freescale Semiconductor, Inc. | Method of writing to a multi-state magnetic random access memory cell |
| US7206223B1 (en) | 2005-12-07 | 2007-04-17 | Freescale Semiconductor, Inc. | MRAM memory with residual write field reset |
| US7280388B2 (en) * | 2005-12-07 | 2007-10-09 | Nahas Joseph J | MRAM with a write driver and method therefor |
| US7746686B2 (en) | 2006-04-21 | 2010-06-29 | Honeywell International Inc. | Partitioned random access and read only memory |
| JP2010186559A (ja) * | 2010-06-04 | 2010-08-26 | Renesas Electronics Corp | 薄膜磁性体記憶装置 |
| KR102661099B1 (ko) | 2018-11-08 | 2024-04-29 | 삼성전자주식회사 | 전송 소자를 포함하는 불휘발성 메모리 장치 |
| CN111951848B (zh) * | 2020-08-18 | 2023-09-01 | 上海交通大学 | 一种嵌入式动态随机存储器增益单元及其操作方法 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1321944A1 (en) * | 2001-12-21 | 2003-06-25 | Kabushiki Kaisha Toshiba | Magnetic random access memory |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4544878A (en) * | 1983-10-04 | 1985-10-01 | At&T Bell Laboratories | Switched current mirror |
| US6693882B1 (en) | 1999-01-26 | 2004-02-17 | International Business Machines Corporation | Frequency correction burst detection |
| US6343032B1 (en) * | 1999-07-07 | 2002-01-29 | Iowa State University Research Foundation, Inc. | Non-volatile spin dependent tunnel junction circuit |
| US6188615B1 (en) * | 1999-10-29 | 2001-02-13 | Hewlett-Packard Company | MRAM device including digital sense amplifiers |
| JP3800925B2 (ja) * | 2000-05-15 | 2006-07-26 | 日本電気株式会社 | 磁気ランダムアクセスメモリ回路 |
| JP4726290B2 (ja) * | 2000-10-17 | 2011-07-20 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
| JP2002216468A (ja) * | 2000-11-08 | 2002-08-02 | Canon Inc | 半導体記憶装置 |
| JP3920565B2 (ja) * | 2000-12-26 | 2007-05-30 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| JP4712204B2 (ja) * | 2001-03-05 | 2011-06-29 | ルネサスエレクトロニクス株式会社 | 記憶装置 |
| US6574137B2 (en) * | 2001-08-30 | 2003-06-03 | Micron Technology, Inc. | Single ended row select for a MRAM device |
| US6531723B1 (en) | 2001-10-16 | 2003-03-11 | Motorola, Inc. | Magnetoresistance random access memory for improved scalability |
| US6545906B1 (en) | 2001-10-16 | 2003-04-08 | Motorola, Inc. | Method of writing to scalable magnetoresistance random access memory element |
| JP2003151260A (ja) * | 2001-11-13 | 2003-05-23 | Mitsubishi Electric Corp | 薄膜磁性体記憶装置 |
| US6693824B2 (en) * | 2002-06-28 | 2004-02-17 | Motorola, Inc. | Circuit and method of writing a toggle memory |
| US7221582B2 (en) * | 2003-08-27 | 2007-05-22 | Hewlett-Packard Development Company, L.P. | Method and system for controlling write current in magnetic memory |
-
2003
- 2003-09-05 US US10/656,676 patent/US6842365B1/en not_active Expired - Lifetime
-
2004
- 2004-07-15 EP EP04778154A patent/EP1665277A4/en not_active Withdrawn
- 2004-07-15 CN CNB2004800254483A patent/CN100492527C/zh not_active Expired - Lifetime
- 2004-07-15 KR KR1020117023223A patent/KR20110124350A/ko not_active Withdrawn
- 2004-07-15 JP JP2006525321A patent/JP4554611B2/ja not_active Expired - Lifetime
- 2004-07-15 WO PCT/US2004/022510 patent/WO2005027135A1/en not_active Ceased
- 2004-07-15 KR KR1020067004467A patent/KR101113096B1/ko not_active Expired - Lifetime
- 2004-08-12 TW TW093124252A patent/TWI348161B/zh not_active IP Right Cessation
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1321944A1 (en) * | 2001-12-21 | 2003-06-25 | Kabushiki Kaisha Toshiba | Magnetic random access memory |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1846275A (zh) | 2006-10-11 |
| KR20060088101A (ko) | 2006-08-03 |
| TWI348161B (en) | 2011-09-01 |
| EP1665277A1 (en) | 2006-06-07 |
| US6842365B1 (en) | 2005-01-11 |
| JP4554611B2 (ja) | 2010-09-29 |
| EP1665277A4 (en) | 2008-01-09 |
| TW200527424A (en) | 2005-08-16 |
| WO2005027135A1 (en) | 2005-03-24 |
| CN100492527C (zh) | 2009-05-27 |
| KR20110124350A (ko) | 2011-11-16 |
| JP2007504592A (ja) | 2007-03-01 |
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Patent event date: 20060303 Patent event code: PA01051R01D Comment text: International Patent Application |
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