KR101111421B1 - 반도체 패키지 몰딩 방법 - Google Patents
반도체 패키지 몰딩 방법 Download PDFInfo
- Publication number
- KR101111421B1 KR101111421B1 KR1020080121552A KR20080121552A KR101111421B1 KR 101111421 B1 KR101111421 B1 KR 101111421B1 KR 1020080121552 A KR1020080121552 A KR 1020080121552A KR 20080121552 A KR20080121552 A KR 20080121552A KR 101111421 B1 KR101111421 B1 KR 101111421B1
- Authority
- KR
- South Korea
- Prior art keywords
- molding
- substrate
- mold
- semiconductor chip
- chip
- Prior art date
Links
- 238000000465 moulding Methods 0.000 title claims abstract description 129
- 239000004065 semiconductor Substances 0.000 title claims abstract description 104
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 87
- 239000011347 resin Substances 0.000 claims abstract description 54
- 229920005989 resin Polymers 0.000 claims abstract description 54
- 239000011800 void material Substances 0.000 abstract description 3
- 150000001875 compounds Chemical class 0.000 description 4
- 230000003028 elevating effect Effects 0.000 description 4
- 238000004088 simulation Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 210000004185 liver Anatomy 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
Abstract
Description
Claims (4)
- 삭제
- 삭제
- 삭제
- 반도체 칩의 상면쪽에 고정 배치되는 고정형 금형과, 반도체 칩의 외곽쪽 기판의 몰딩영역상에 배치되는 이동형 금형으로 구성되는 몰딩금형의 제공 단계와; 상기 몰딩금형의 공급 게이트를 통하여 몰딩수지가 공급되는 단계를 포함하는 반도체 패키지 제조 방법에 있어서,상기 이동형 금형의 승하강 작동 제어에 의하여, 반도체 칩과 플립칩을 포함하는 상기 기판상의 몰딩영역을 흐르는 몰딩수지의 전체 흐름 속도를 균일하게 조절하되,반도체 칩과 기판간의 플립칩이 존재하는 공간을 따라 몰딩수지가 더디게 흐를 때, 상기 고정형 금형은 고정된 상태를 유지하는 동시에 상기 이동형 금형이 하강하는 과정과;상기 이동형 금형과 기판의 몰딩영역간의 거리가 좁혀지면서, 상기 반도체 칩 외곽쪽의 기판의 몰딩영역을 따라 흐르는 몰딩수지의 속도가 상기 플립칩이 존재하는 공간을 따라 흐르는 몰딩수지의 속도에 맞게 늦추어지는 과정;을 통하여,플립 칩에 의하여 전기적으로 연결된 반도체 칩과 기판의 사이공간내에 보이드가 발생되는 것을 방지할 수 있도록 한 것을 특징으로 하는 반도체 패키지 몰딩 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080121552A KR101111421B1 (ko) | 2008-12-03 | 2008-12-03 | 반도체 패키지 몰딩 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080121552A KR101111421B1 (ko) | 2008-12-03 | 2008-12-03 | 반도체 패키지 몰딩 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20100063164A KR20100063164A (ko) | 2010-06-11 |
KR101111421B1 true KR101111421B1 (ko) | 2012-02-15 |
Family
ID=42363150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020080121552A KR101111421B1 (ko) | 2008-12-03 | 2008-12-03 | 반도체 패키지 몰딩 방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR101111421B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10131077B2 (en) | 2016-02-03 | 2018-11-20 | Samsung Electronics Co., Ltd. | Device for molding semiconductor package |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR200466082Y1 (ko) * | 2011-08-17 | 2013-04-03 | 삼성전자주식회사 | 반도체 소자를 몰딩하기 위한 장치 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010006667A (ko) * | 1999-06-25 | 2001-01-26 | 후지쯔 오토메이션 가부시끼가이샤 | 반도체 장치의 제조 방법 및 반도체 장치 제조용 금형 |
-
2008
- 2008-12-03 KR KR1020080121552A patent/KR101111421B1/ko active IP Right Grant
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010006667A (ko) * | 1999-06-25 | 2001-01-26 | 후지쯔 오토메이션 가부시끼가이샤 | 반도체 장치의 제조 방법 및 반도체 장치 제조용 금형 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10131077B2 (en) | 2016-02-03 | 2018-11-20 | Samsung Electronics Co., Ltd. | Device for molding semiconductor package |
Also Published As
Publication number | Publication date |
---|---|
KR20100063164A (ko) | 2010-06-11 |
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