KR101067886B1 - RFID device - Google Patents

Abstract

The present invention relates to an RFID device, and discloses a technique for blocking leakage current components of a test signal bus by pulling down a bus to which a test signal is input using a power-on reset signal during a power-on operation. The present invention provides a tag chip including an analog unit, a digital unit, and a memory unit, a test interface unit for supplying a test signal applied from the outside to the tag chip, a test signal bus for transmitting a test signal to the test interface unit, and an analog unit. And a pull-down driver configured to pull-down the test signal bus according to a power-on reset signal applied from the negative.

Description

RFID device {RFID device}

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an RFID device, in which a leakage current component of a test signal bus can be blocked by pulling down a bus to which a test signal is input using a power-on reset signal during a power-on operation.

RFID (Radio Frequency IDentification Tag Chip) is a contactless automatic identification method that communicates with an RFID reader by attaching an RFID tag to an object to be identified and automatically transmitting and receiving it by using a wireless signal. To provide technology. As RFID is used, it is possible to compensate for the disadvantages of the conventional automatic identification technology, barcode and optical character recognition technology.

Recently, RFID tags have been used in various cases, such as logistics management systems, user authentication systems, electronic money systems, transportation systems.

For example, in the logistics management system, cargo classification or inventory management is performed using an integrated circuit (IC) tag in which data is recorded instead of a delivery slip or a tag. In the user authentication system, admission management and the like are performed using an IC card that records personal information and the like.

Meanwhile, a nonvolatile ferroelectric memory may be used as a memory used for an RFID tag.

In general, nonvolatile ferroelectric memory, or ferroelectric random access memory (FeRAM), has a data processing speed of about dynamic random access memory (DRAM) and is attracting attention as a next-generation memory device because of its characteristic that data is preserved even when the power is turned off. have.

The FeRAM is a device having a structure almost similar to that of a DRAM, and uses a ferroelectric capacitor as a memory device. Ferroelectrics have a high residual polarization characteristic, and as a result, the data is not erased even when the electric field is removed.

1 is an overall configuration diagram of a general RFID device.

The RFID device according to the related art includes an antenna unit 1, an analog unit 10, a digital unit 20, and a memory unit 30.

Here, the antenna unit 1 serves to receive a radio signal transmitted from an external RFID reader. The wireless signal received through the antenna unit 1 is input to the analog unit 10 through the antenna pads 11 and 12.

The analog unit 10 amplifies the input wireless signal to generate a power supply voltage VDD which is a driving voltage of the RFID tag. The operation command signal is detected from the input wireless signal, and the command signal CMD is output to the digital unit 20. In addition, the analog unit 10 senses the output voltage VDD and outputs a power-on reset signal POR and a clock signal CLK to the digital unit 20 for controlling the reset operation.

The digital unit 20 receives the power supply voltage VDD, the power-on reset signal POR, the clock signal CLK, and the command signal CMD from the analog unit 10, and outputs a response signal RP to the analog unit 10. The digital unit 20 also outputs the address ADD, input / output data I / O, control signal CTR, and clock signal CLK to the memory unit 30.

In addition, the memory unit 30 reads / writes data using a memory element and stores the data.

Here, the RFID device uses a frequency of several bands, the characteristics of which vary depending on the frequency band. In general, the lower the frequency band, the slower the recognition speed, the RFID device operates in a short distance, and is less affected by the environment. On the contrary, the higher the frequency band, the faster the recognition speed and the longer the distance is affected by the environment.

The most preferable method for testing whether the RFID tag is operating normally is as follows. Applying a radio signal through the antenna pad (11, 12) of the individual RFID tag, modulates the response signal RP generated by processing the radio signal by the digital unit 20 inside the RFID tag and transmits to the RFID reader, RFID It is to check whether the signal received from the reader is the desired signal.

However, it is expensive and inefficient to test by individually applying radio signals to thousands or more RFID tags per wafer.

The present invention has been made to solve the above problems, by using the power-on reset signal in the power-on operation pulls down the bus to which the test signal is input to stabilize the voltage level of the test signal bus and leakage current due to parasitic characteristics The purpose is to allow the blocking of ingredients.

The RFID device of the present invention for achieving the above object, including an analog unit, a digital unit and a memory unit, receives a radio signal received from the outside, modulates the response signal generated by processing the radio signal through an antenna Tag chip to transmit to the outside; A test interface unit for supplying a test signal applied from the outside to the tag chip; A test signal bus transferring a test signal to the test interface unit; And a pull-down driver configured to supply a pull-down voltage to the test signal bus during a period in which the power-on reset signal applied from the analog unit is activated to a high level.

In addition, the present invention is an analog unit for generating a command signal by processing a radio signal applied from the antenna unit, and outputs a processing result signal corresponding to the response signal to the antenna unit; A digital unit for outputting an operation control signal according to the command signal and outputting a corresponding response signal to the analog unit; A memory unit which receives an operation control signal and reads / writes data in the cell array; A test interface unit for supplying a test signal applied from the outside to the digital unit and the memory unit; And a pull-down driver configured to supply a pull-down voltage to the test signal bus during a period in which the power-on reset signal applied from the analog unit is activated to a high level.

As described above, the present invention provides an effect of blocking the leakage current component of the test signal bus by pulling down the bus to which the test signal is input using the power-on reset signal during the power-on operation.

In addition, the preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, replacements and additions through the spirit and scope of the appended claims, such configuration changes, etc. It should be seen as belonging to a range.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is an overall configuration diagram of a radio frequency identification (RFID) device according to the present invention. The RFID device generally includes an antenna unit 50, an analog unit 100, a digital unit 200, a memory unit 300, a test interface unit 400, and a pull-down driving unit 500.

Here, the antenna unit 50 transmits and receives a radio signal between an external reader or writer and RFID.

The analog unit 100 may include a voltage multiplier 110, a modulator 120, a demodulator 130, a power on reset unit 140, and a clock generator 150. ).

Here, the voltage amplifier 110 generates a power supply voltage VDD of the RFID device by using a radio signal applied from the antenna unit 50. The modulator 120 modulates the response signal RP applied from the digital unit 200 and transmits the modulated response signal RP to the antenna 50. The demodulator 130 detects an operation command signal from a wireless signal applied from the antenna 50 by the power supply voltage VDD and outputs the command signal CMD to the digital unit 200.

The power on reset unit 140 detects the magnitude of the power supply voltage VDD applied from the voltage amplifier 110 and supplies a power on reset signal POR to the digital unit 200 and the pull-down driving unit 200 to control the reset operation. Output The clock generator 150 generates a clock signal CLK by the power supply voltage VDD and outputs the clock signal CLK to the digital unit 200.

In addition, the digital unit 200 receives a power supply voltage VDD, a power-on reset signal POR, a clock signal CLK, and a command signal CMD from the analog unit 100. The digital unit 200 outputs the response signal RP to the analog unit 100. The digital unit 200 also outputs the address ADD, data I / O, control signal CTR, and clock signal CLK to the memory unit 300.

In addition, the memory unit 300 includes a plurality of memory cells, each of which serves to write data to the storage device and to read data stored in the storage device.

Here, the memory unit 300 may be a nonvolatile ferroelectric memory (FeRAM). FeRAM has a data processing speed of about DRAM. In addition, FeRAM has a structure almost similar to DRAM, and has a high residual polarization characteristic of the ferroelectric by using a ferroelectric as the material of the capacitor. This residual polarization does not erase the data even when the electric field is removed.

In addition, the test interface unit 300 receives a test signal from the outside to test the internal circuit or the memory unit 300 included in the RFID tag in the test mode. Here, test signals applied from the outside include an address, a control signal, input / output data, a test clock, and the like.

This address corresponds to a tag selection address, a memory address, and the like. The control signal corresponds to a chip enable signal, a write enable signal, an output enable signal, a test enable signal, a test operation signal, and the like.

The present invention can test the performance of an RFID tag chip (Radio Frequency Identification Tag Chip) by receiving a measurement signal directly through a test pad at a wafer level, instead of receiving a radio signal applied from the antenna 50 in the test mode. Make sure

Techniques for performing a test operation through an external test pad at the wafer level have already been disclosed in patent application No. 10-2009-0056372, which was invented by the same inventor as the present invention.

In such an RFID device, a tag chip array is arranged on one wafer, and a plurality of tag chips on the tag chip array are tested using a test signal applied from one test chip.

Here, the tag chip array and the test chip transmit mutual test signals through scribe lines formed on the wafer. The bus through which the test signal is transmitted on the scribe line corresponds to the 'test signal bus'.

However, after performing the test at the wafer level, if each tag chip is cut, the scribe line is also broken. In this case, the test signal bus arranged on the scribe line is in a floating state.

Accordingly, according to the present invention, when each tag chip performs normal operation after the test mode is completed, the present invention pulls down the test signal bus to which the test signal is input.

That is, the power level of the test signal bus can be stabilized by supplying a ground voltage to the test signal bus using the power-on reset signal during the power-on operation. In addition, the voltage level of the test signal bus is prevented from rising due to the parasitic characteristics of the test signal bus so that the component of the leakage current can be cut off.

3 illustrates an operation waveform of the power on reset signal POR output from the power on reset unit 140 of FIG. 2.

The power-on reset signal POR rises with the power supply voltage VDD while the power supply voltage VDD transitions from the low level to the high level, and then goes from the high level to the low level as soon as the power supply voltage VDD is supplied at a constant voltage level. Transition means a signal for resetting the circuit inside the RFID tag chip.

Here, the period from the time when the power-on reset signal POR rises along the power supply voltage VDD level before the transition to the low voltage level is defined as a 'pull down period'. During this period, the pull-down driver 500 is operated to pull down the test signal bus.

This stabilizes the level of the test signal bus during the initial operation of the RFID tag chip. In addition, due to the parasitic characteristics of the test signal bus, it is possible to block a component of the leakage current generated when the test input voltage increases.

4 is a detailed circuit diagram illustrating the pull-down driver 500 of FIG. 2.

The pull down driver 500 includes a plurality of pull down elements. Here, the pull-down element is preferably composed of NMOS transistors N1 to N4.

The NMOS transistors N1 to N4 are connected between the test signal bus and the ground voltage terminal, and the power-on reset signal POR applied from the power-on reset unit 140 is applied through the common gate terminal.

Accordingly, the pull-down driver 500 turns on the NMOS transistors N1 to N4 during the 'pull-down period' when the power-on reset signal POR is activated to a high level as shown in FIG. 3. Thus, the ground voltage is supplied to the test signal bus.

In this case, the test signal bus connected to the input / output terminal of the test interface unit 400 corresponds to the number of test signals applied from the outside. Each pull-down element is connected to correspond to the number of test signal buses.

1 is an overall configuration diagram of a conventional RFID device.

2 is an overall configuration diagram of an RFID device according to the present invention.

3 is an operation waveform diagram illustrating a power on reset unit of FIG. 2;

4 is a detailed circuit diagram related to the pull-down driving unit of FIG. 2.

Claims (10)

A tag chip including an analog unit, a digital unit, and a memory unit, receiving a radio signal received from the outside, modulating a response signal generated by processing the radio signal, and transmitting the modulated response signal to the outside through an antenna; A test interface unit for supplying a test signal applied from the outside to the tag chip; A test signal bus transferring the test signal to the test interface unit; And And a pull-down driver configured to supply a pull-down voltage to the test signal bus during a period in which the power-on reset signal applied from the analog unit is activated at a high level. delete Claim 3 was abandoned when the setup registration fee was paid. The method of claim 1, wherein the pull-down driving unit And a pull-down device connected between the test signal bus and a ground voltage terminal to which the power-on reset signal is applied through a gate terminal. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, wherein the pull-down driving unit And a plurality of pull-down elements connected between the test signal bus and a ground voltage terminal to which the power-on reset signal is applied through a common gate terminal. Claim 5 was abandoned upon payment of a set-up fee. The RFID device of claim 1, wherein the memory unit comprises a nonvolatile ferroelectric element to perform a read / write operation of data. An analog unit for processing a radio signal applied from an antenna unit to generate a command signal, and outputting a processing result signal corresponding to the response signal to the antenna unit; A digital unit for outputting an operation control signal according to the command signal and outputting the corresponding response signal to the analog unit; A memory unit which receives the operation control signal to read / write data to a cell array; A test interface unit for supplying a test signal applied from the outside to the digital unit and the memory unit; A test signal bus transferring the test signal to the test interface unit; And And a pull-down driver configured to supply a pull-down voltage to the test signal bus during a period in which the power-on reset signal applied from the analog unit is activated at a high level. delete Claim 8 was abandoned when the registration fee was paid. The method of claim 6, wherein the pull-down driving unit And a pull-down device connected between the test signal bus and a ground voltage terminal to which the power-on reset signal is applied through a gate terminal. Claim 9 was abandoned upon payment of a set-up fee. The method of claim 6, wherein the pull-down driving unit And a plurality of pull-down elements connected between the test signal bus and a ground voltage terminal to which the power-on reset signal is applied through a common gate terminal. Claim 10 was abandoned upon payment of a setup registration fee. The RFID device of claim 6, wherein the memory unit comprises a nonvolatile ferroelectric element to perform a read / write operation of data.

Images