KR101066270B1 - 다마신 3중 게이트 핀펫 - Google Patents

다마신 3중 게이트 핀펫 Download PDF

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Publication number
KR101066270B1
KR101066270B1 KR1020067013973A KR20067013973A KR101066270B1 KR 101066270 B1 KR101066270 B1 KR 101066270B1 KR 1020067013973 A KR1020067013973 A KR 1020067013973A KR 20067013973 A KR20067013973 A KR 20067013973A KR 101066270 B1 KR101066270 B1 KR 101066270B1
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South Korea
Prior art keywords
fin
forming
gate
layer
trench
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KR1020067013973A
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English (en)
Korean (ko)
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KR20060123479A (ko
Inventor
시블리 에스. 아메드
하이홍 왕
빈 유
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020067013973A 2004-01-12 2004-12-21 다마신 3중 게이트 핀펫 Expired - Lifetime KR101066270B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/754,559 2004-01-12
US10/754,559 US7041542B2 (en) 2004-01-12 2004-01-12 Damascene tri-gate FinFET

Publications (2)

Publication Number Publication Date
KR20060123479A KR20060123479A (ko) 2006-12-01
KR101066270B1 true KR101066270B1 (ko) 2011-09-21

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Family Applications (1)

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KR1020067013973A Expired - Lifetime KR101066270B1 (ko) 2004-01-12 2004-12-21 다마신 3중 게이트 핀펫

Country Status (8)

Country Link
US (1) US7041542B2 (enExample)
JP (1) JP5270093B2 (enExample)
KR (1) KR101066270B1 (enExample)
CN (1) CN100521116C (enExample)
DE (1) DE112004002640B4 (enExample)
GB (1) GB2425656B (enExample)
TW (1) TWI370546B (enExample)
WO (1) WO2005071726A1 (enExample)

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US7381649B2 (en) * 2005-07-29 2008-06-03 Taiwan Semiconductor Manufacturing Company, Ltd. Structure for a multiple-gate FET device and a method for its fabrication
US7442590B2 (en) * 2006-04-27 2008-10-28 Freescale Semiconductor, Inc Method for forming a semiconductor device having a fin and structure thereof
US8994112B2 (en) * 2008-09-16 2015-03-31 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (finFET)
US8202780B2 (en) * 2009-07-31 2012-06-19 International Business Machines Corporation Method for manufacturing a FinFET device comprising a mask to define a gate perimeter and another mask to define fin regions
US8334184B2 (en) * 2009-12-23 2012-12-18 Intel Corporation Polish to remove topography in sacrificial gate layer prior to gate patterning
US8535998B2 (en) * 2010-03-09 2013-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating a gate structure
US8492214B2 (en) * 2011-03-18 2013-07-23 International Business Machines Corporation Damascene metal gate and shield structure, methods of manufacture and design structures
US8361854B2 (en) * 2011-03-21 2013-01-29 United Microelectronics Corp. Fin field-effect transistor structure and manufacturing process thereof
US8853035B2 (en) 2011-10-05 2014-10-07 International Business Machines Corporation Tucked active region without dummy poly for performance boost and variation reduction
CN103515430B (zh) * 2012-06-19 2016-08-10 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管及其制造方法
US9741721B2 (en) * 2013-09-27 2017-08-22 Intel Corporation Low leakage non-planar access transistor for embedded dynamic random access memory (eDRAM)
US10037991B2 (en) 2014-01-09 2018-07-31 Taiwan Semiconductor Manufacturing Company Limited Systems and methods for fabricating FinFETs with different threshold voltages
US9252243B2 (en) 2014-02-07 2016-02-02 International Business Machines Corporation Gate structure integration scheme for fin field effect transistors
US9966272B1 (en) * 2017-06-26 2018-05-08 Globalfoundries Inc. Methods for nitride planarization using dielectric

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US20020153587A1 (en) 2000-03-16 2002-10-24 International Business Machines Corporation Double planar gated SOI MOSFET structure
US20020177263A1 (en) 2001-05-24 2002-11-28 International Business Machines Corporation Damascene double-gate MOSFET with vertical channel regions
WO2004093181A1 (en) 2003-04-03 2004-10-28 Advanced Micro Devices, Inc. Method for forming a gate in a finfet device and thinning a fin in a channel region of the finfet device

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US5960270A (en) * 1997-08-11 1999-09-28 Motorola, Inc. Method for forming an MOS transistor having a metallic gate electrode that is formed after the formation of self-aligned source and drain regions
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US20020177263A1 (en) 2001-05-24 2002-11-28 International Business Machines Corporation Damascene double-gate MOSFET with vertical channel regions
WO2004093181A1 (en) 2003-04-03 2004-10-28 Advanced Micro Devices, Inc. Method for forming a gate in a finfet device and thinning a fin in a channel region of the finfet device

Also Published As

Publication number Publication date
KR20060123479A (ko) 2006-12-01
DE112004002640T8 (de) 2007-03-22
TW200529432A (en) 2005-09-01
JP5270093B2 (ja) 2013-08-21
GB2425656B (en) 2007-12-05
TWI370546B (en) 2012-08-11
GB2425656A (en) 2006-11-01
CN100521116C (zh) 2009-07-29
DE112004002640T5 (de) 2007-01-04
WO2005071726A1 (en) 2005-08-04
CN1902742A (zh) 2007-01-24
DE112004002640B4 (de) 2008-12-18
JP2007518270A (ja) 2007-07-05
GB0615272D0 (en) 2006-09-06
US20050153492A1 (en) 2005-07-14
US7041542B2 (en) 2006-05-09

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