KR101006502B1 - 반도체 소자의 제조방법 - Google Patents
반도체 소자의 제조방법 Download PDFInfo
- Publication number
- KR101006502B1 KR101006502B1 KR1020030045247A KR20030045247A KR101006502B1 KR 101006502 B1 KR101006502 B1 KR 101006502B1 KR 1020030045247 A KR1020030045247 A KR 1020030045247A KR 20030045247 A KR20030045247 A KR 20030045247A KR 101006502 B1 KR101006502 B1 KR 101006502B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- usg
- hard mask
- diffuse reflection
- aluminum
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
Abstract
Description
Claims (5)
- 반도체 기판 상에 베리어 금속막, 알루미늄막 및 난반사막을 차례로 형성하는 단계;상기 난반사막 상에 하드마스크막을 증착하는 단계;상기 하드마스크막과 그 아래의 난반사막, 알루미늄막 및 베리어 금속막을 패터닝하는 단계;상기 하드마스크막과 난반사막, 알루미늄막 및 베리어 금속막이 패터닝된 기판 결과물 상에 선형산화막을 증착하는 단계; 및상기 선형산화막 상에 층간절연막을 형성하는 단계를 포함하며,상기 하드마스크막 및 상기 선형산화막은 O3 USG막으로 이루어진 것을 특징으로 하는 반도체 소자의 제조방법.
- 삭제
- 제 1 항에 있어서, 상기 하드마스크막 및 선형상화막은 SACVD 또는 APCVD 공정으로 증착하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서, 상기 선형산화막은 400∼430℃에서 500∼1000Å의 두께로 증착하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서, 상기 층간절연막은 HDP-FSG막으로 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030045247A KR101006502B1 (ko) | 2003-07-04 | 2003-07-04 | 반도체 소자의 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030045247A KR101006502B1 (ko) | 2003-07-04 | 2003-07-04 | 반도체 소자의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20050003757A KR20050003757A (ko) | 2005-01-12 |
KR101006502B1 true KR101006502B1 (ko) | 2011-01-10 |
Family
ID=37218815
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020030045247A KR101006502B1 (ko) | 2003-07-04 | 2003-07-04 | 반도체 소자의 제조방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR101006502B1 (ko) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010010011A (ko) * | 1999-07-15 | 2001-02-05 | 윤종용 | 반도체장치의 제조방법 |
KR100289655B1 (ko) * | 1998-06-30 | 2001-05-02 | 박종섭 | 반도체소자의금속배선형성방법 |
KR100365753B1 (ko) * | 2000-12-28 | 2002-12-26 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 층간절연막 형성방법 |
-
2003
- 2003-07-04 KR KR1020030045247A patent/KR101006502B1/ko active IP Right Grant
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100289655B1 (ko) * | 1998-06-30 | 2001-05-02 | 박종섭 | 반도체소자의금속배선형성방법 |
KR20010010011A (ko) * | 1999-07-15 | 2001-02-05 | 윤종용 | 반도체장치의 제조방법 |
KR100365753B1 (ko) * | 2000-12-28 | 2002-12-26 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 층간절연막 형성방법 |
Also Published As
Publication number | Publication date |
---|---|
KR20050003757A (ko) | 2005-01-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7037836B2 (en) | Method of manufacturing a semiconductor device without oxidized copper layer | |
US6913994B2 (en) | Method to form Cu/OSG dual damascene structure for high performance and reliable interconnects | |
US7557038B2 (en) | Method for fabricating self-aligned contact hole | |
KR100529676B1 (ko) | 듀얼 다마신 패턴을 형성하는 방법 | |
KR19980070785A (ko) | 반도체 장치 및 그 제조 방법 | |
KR101006502B1 (ko) | 반도체 소자의 제조방법 | |
US7341955B2 (en) | Method for fabricating semiconductor device | |
KR101180977B1 (ko) | 콘택 형성 동안에 콘택홀 폭 증가를 방지하는 방법 | |
KR100307827B1 (ko) | 반도체소자의 금속배선 콘택 형성방법 | |
KR100664339B1 (ko) | 반도체 소자의 금속배선 형성방법 | |
KR100324020B1 (ko) | 반도체소자의금속배선형성방법 | |
KR100661220B1 (ko) | 듀얼 절연막을 이용한 금속 배선 형성 방법 | |
KR100268515B1 (ko) | 접촉구형성방법 | |
KR100935193B1 (ko) | 반도체 소자의 금속배선 및 그의 형성방법 | |
KR100774642B1 (ko) | 반도체 소자의 구리배선 형성방법 | |
KR100642917B1 (ko) | 반도체 소자의 금속배선 형성방법 | |
KR0157876B1 (ko) | 반도체 소자의 배선 제조방법 | |
KR100547242B1 (ko) | 보이드를 방지한 반도체 소자의 금속층간절연막 형성방법 | |
KR20050069598A (ko) | 반도체 소자의 배선 제조 방법 | |
US20090001581A1 (en) | Metal line of semiconductor device and method of forming the same | |
KR100571408B1 (ko) | 반도체 소자의 듀얼 다마신 배선 제조 방법 | |
KR100588640B1 (ko) | 반도체 소자 제조방법 | |
CN112838048A (zh) | 互连结构以及其制作方法 | |
KR20060030200A (ko) | 반도체 장치의 금속 배선층 형성 방법 | |
KR20060029379A (ko) | 반도체 소자의 금속배선 형성방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
N231 | Notification of change of applicant | ||
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20131118 Year of fee payment: 4 |
|
FPAY | Annual fee payment |
Payment date: 20141119 Year of fee payment: 5 |
|
FPAY | Annual fee payment |
Payment date: 20151118 Year of fee payment: 6 |
|
FPAY | Annual fee payment |
Payment date: 20161118 Year of fee payment: 7 |
|
FPAY | Annual fee payment |
Payment date: 20171117 Year of fee payment: 8 |
|
FPAY | Annual fee payment |
Payment date: 20181120 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20191119 Year of fee payment: 10 |