KR100986907B1 - 액정 디스플레이 패널 제조방법 및 그에 의해 제조된 액정 디스플레이 패널 - Google Patents
액정 디스플레이 패널 제조방법 및 그에 의해 제조된 액정 디스플레이 패널 Download PDFInfo
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- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13458—Terminal pads
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
Abstract
Description
압력(mTorr) | 100 | 200 | 300 |
식각 선택비(SiNx/n+ a-Si) | 6.3 | 5.2 | 4.4 |
식각 선택비의 균일도(%) | 8.5 | 8.2 | 8.7 |
SiNx의 식각률(Å/min) | 1390 | 1520 | 1660 |
n+ a-Si의 식각률(Å/min) | 220 | 290 | 380 |
인가전력(W) | 700 | 900 | 1100 | 1300 | 1500 |
식각 선택비(SiNx/n+ a-Si) | 12.7 | 8.5 | 5.2 | 4.8 | 3.4 |
식각 선택비의 균일도(%) | 10.2 | 9.1 | 8.2 | 9.6 | 11.8 |
SiNx의 식각률(Å/min) | 1140 | 1280 | 1520 | 1860 | 2150 |
n+ a-Si의 식각률(Å/min) | 90 | 150 | 290 | 390 | 630 |
Claims (5)
- 유리기판에 증착된 제1금속층을 제1마스크를 이용해 패터닝하여 TFT영역에 게이트전극을 형성하고 PAD영역에 패드전극을 형성하는 단계;상기 게이트전극 및 패드전극이 형성된 유리기판의 상부 전면에 게이트 절연막과 비정질 실리콘막과 도핑된 비정질 실리콘막을 순차적으로 증착하고, 제2마스크를 이용해 상기 비정질 실리콘막과 도핑된 비정질 실리콘막을 패터닝하여 상기 게이트전극 상측에 채널층과 오믹컨택층을 형성하는 단계;상기 채널층 및 오믹컨택층이 형성된 유리기판 전면에 제2금속층을 증착하고, 제3마스크를 이용해 상기 제2금속층을 패터닝하여 상기 채널층 및 오믹컨택층 상부의 중앙부분에서 양측으로 분할되는 소스전극 및 드레인전극을 형성함과 동시에 상기 패드전극 에 대응되는 위치에 개구공이 형성된 더미전극을 형성하는 단계;상기 소스전극 및 드레인전극을 식각장벽으로 이용해서 상기 소스전극과 드레인전극의 사이공간으로 노출된 오믹컨택층을 식각하여 상기 오믹컨택층이 분할되게 하고, 상기 더미전극을 식각장벽으로 이용해 게이트절연막을 식각하여 상기 더미전극의 개구공을 통해 상기 패드전극이 노출되게 하는 단계;상기 소스전극 및 드레인전극 및 더미전극이 형성된 유리기판의 전면에 투명도전물질을 증착하고, 제4마스크를 이용해 상기 투명도전물질을 패터닝하여 상기 소스전극 또는 드레인전극과 접촉되는 화소전극과 상기 패드전극과 접촉되는 패드컨택전극을 형성하는 단계; 및,상기 화소전극 및 패드컨택전극이 형성된 유리기판 전면에 보호막을 증착하는 단계;를 포함하는 것을 특징으로 하는 액정 디스플레이 패널 제조방법.
- 제 1항에 있어서,상기 오믹컨택층 및 게이트절연막을 동시에 식각하는 단계는 트리 플로로 메탄(CHF3) 가스를 주요 식각가스로 사용하고, 헬륨(He)가스를 첨가가스로 사용하는 건식 식각 방식이 적용되는 것을 특징으로 하는 액정 디스플레이 패널 제조방법.
- 제 2항에 있어서,상기 오믹컨택층 및 게이트절연막을 동시에 식각하는 단계의 공정 압력은 200mTorr이고, 인가 전력은 1100W인 것을 특징으로 하는 액정 디스플레이 패널 제조방법.
- TFT영역과 PAD영역이 구분되어 최하층에 배치되는 유리기판;상기 유리기판의 TFT영역에 형성되는 게이트전극;상기 유리기판의 PAD영역에 형성되는 패드전극;상기 TFT영역에서는 게이트전극 상측을 감싸도록 형성되고, 상기 PAD영역에서는 상기 패드전극의 중앙부분을 노출시키는 개구부가 형성되어 상기 패드전극의 상측을 감싸도록 형성된 게이트절연막;상기 게이트절연막 상측에서 게이트전극에 대응되는 위치에 형성되는 채널층과, 상기 채널층의 상측에서 양측으로 분할형성되는 오믹컨택층으로 구성되는 반도체층;상기 분할형성된 오믹컨택층에 각각 접촉되는 소스전극 및 드레인전극;상기 패드전극에 대응되는 위치에 개구공이 형성되어 게이트절연막의 상면에 형성되는 더미전극;상기 소스전극 또는 드레인전극에 일단부가 접촉되어 TFT영역의 화소부에 형성되는 화소전극;상기 더미전극 외측을 감싸며 상기 더미전극의 개구공을 통해 노출된 패드전극에 접촉되는 패드컨택전극; 및,상기 TFT영역과 PAD영역의 최상층에 적층되는 보호층;을 포함하는 액정 디스플레이 패널.
- 제 4항에 있어서,상기 더미전극은 상기 소스전극 및 드레인전극과 동일한 재질로 이루어지는 것을 특징으로 하는 액정 디스플레이 패널.
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KR20010093694A (ko) * | 2000-03-28 | 2001-10-29 | 니시가키 코지 | 박막 트랜지스터의 제조방법 |
KR20020092722A (ko) * | 2001-06-05 | 2002-12-12 | 엘지.필립스 엘시디 주식회사 | 액정표시소자의 어레이 기판 및 그 제조방법 |
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KR20010093694A (ko) * | 2000-03-28 | 2001-10-29 | 니시가키 코지 | 박막 트랜지스터의 제조방법 |
KR20020092722A (ko) * | 2001-06-05 | 2002-12-12 | 엘지.필립스 엘시디 주식회사 | 액정표시소자의 어레이 기판 및 그 제조방법 |
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