KR100920350B1 - Device of driving liquid crystal display and driving method thereof - Google Patents

Abstract

The present invention relates to a driving device of a liquid crystal display device that reduces unstable power supply and EMI, which occur when a row of data voltages are applied. The driving device includes a plurality of data driving IC groups including at least one data driving IC, a data driving unit which selects a gray voltage corresponding to image data among a plurality of gray voltages and applies the data voltage to the pixel as a data voltage, and And a signal controller configured to supply the image data to the data driver, generate a control signal for controlling the image data, and supply the image data to the data driver. The control signal includes a plurality of load signals for applying a corresponding data voltage to the data lines, and the plurality of load signals are supplied to different data driving IC groups at different times. Therefore, when the data voltage is applied to all the pixels in a row at the same time, the driving voltage of the data driving IC is momentarily reduced to prevent malfunction due to unstable driving voltage, and EMI generated by signal interference between neighboring lines. The phenomenon is greatly reduced.

LCD, LCD, Load Signal, EMI, Data Drive IC

Description

Driving device of liquid crystal display and method thereof {DEVICE OF DRIVING LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a detailed circuit diagram of a data driver according to an exemplary embodiment of the present invention.

4 (a) to (d) and 5 (a) to (d) respectively illustrate the first and second load signals, the inversion signal, and the corresponding pixel in two consecutive frames according to an embodiment of the present invention. A waveform diagram of voltage.

The present invention relates to a driving device of a liquid crystal display (LCD) and a method thereof.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to generate an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. In this case, in order to prevent deterioration caused by the application of an electric field in one direction for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row, or dot.

As described above, when the data voltage is applied to the pixel electrodes of all the rows, the liquid crystal display device sequentially applies the data voltages one by one. Therefore, when a row of data voltages are applied at the same time, a lot of power is instantly consumed. Therefore, the current of the driving voltage of the data driver which selects the data voltage corresponding to the image signal from the outside and applies it as the data signal to each of the corresponding pixel electrodes is rapidly increased when the data voltage of one row is applied. In this way, whenever the data voltage is simultaneously applied to one row of pixel electrodes, the driving voltage of the data driver increases instantaneously and causes ripple to act as a noise, thereby preventing the safe supply of voltage. The overall operation of the data driver becomes unstable. In addition, since a data voltage is simultaneously applied to a row of pixel electrodes through the data line, electromagnetic interference (EMI) occurs due to signal interference between neighboring data lines.

Therefore, the technical problem to be achieved by the present invention is to reduce the unstable power supply phenomenon that occurs when a row of data voltage is applied.

In addition, another technical problem to be achieved by the present invention is to reduce the EMI phenomenon that occurs when a row of data voltage is applied.

The present invention for solving the technical problem is a device for driving a liquid crystal display device comprising a plurality of pixels connected to the gate line and the data line and arranged in a matrix form, the driving device for generating a plurality of gray voltages A gray voltage generator, a data driver which selects a gray voltage corresponding to image data among the plurality of gray voltages and applies it to the pixel as a data voltage, and supplies the image data to the data driver and controls the image data. And a signal controller configured to generate a control signal and supply the control signal to the data driver. In this case, the control signal includes a plurality of load signals for applying a corresponding data voltage to the data line, the data driver includes a plurality of data driver IC groups, and each of the data driver IC groups includes at least one data. And a plurality of load signals are supplied to different data drive IC groups at different times.

In the present invention, it is preferable that the total pulse width of the at least two load signals does not exceed the gate on pulse width.

In addition, ICs belonging to each of the data driving IC groups may be adjacent to each other, and the number of ICs belonging to each of the data driving IC groups may be substantially the same.

Furthermore, the polarities of the data voltages generated by the adjacent data driving IC groups may be reversed, and the polarities of the line inversion signals applied from the signal controller to each of the data driving IC groups may be alternately inverted.

In the present invention, it is preferable that the order in which the plurality of load signals are applied for each frame is changed.

Another invention for solving the above technical problem is a method for driving a liquid crystal display device comprising a plurality of pixels connected to a gate line and a data line and arranged in a matrix form, wherein the driving method includes a plurality of loads from a signal controller. And applying a signal to a data driver, and applying a corresponding data voltage to the plurality of pixels from the data driver. In this case, the plurality of load signals include at least two load signals, are applied to the data driver at predetermined time intervals, and the data driver includes a plurality of data driver IC groups. At least one data driving IC, wherein the plurality of load signals are supplied to different data driving IC groups at different times.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.                     

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention. 3 is a detailed circuit diagram of a data driver according to an exemplary embodiment of the present invention.

As shown in FIG. 1, the liquid crystal display according to the present invention is connected to a liquid crystal panel assembly 300 and a gate driver 400, a data driver 500, and a data driver 500 connected thereto. The gray voltage generator 800 and a signal controller 600 for controlling the gray voltage generator 800 are included.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and arranged in a substantially matrix form. .

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data line D for transmitting a data signal. ₁ -D _m ). The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , a liquid crystal capacitor C _lc , and a storage capacitor C _st connected thereto. It includes. The holding capacitor C _st can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _lc and the storage capacitor C _st .

The liquid crystal capacitor C _lc has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270 It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the entire surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _st is formed by superimposing a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100, and a predetermined voltage such as a common voltage V _com is applied to the separate signal line. Is approved. However, the storage capacitor C _st may be formed such that the pixel electrode 190 overlaps the front gate line directly above the insulator.

Meanwhile, in order to implement color display, each pixel should be able to display color, which is possible by providing a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. In FIG. 2, the color filter 230 is formed in a corresponding region of the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

The liquid crystal molecules change their arrangement according to the electric field generated by the pixel electrode 190 and the common electrode 270, and thus the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

The gray voltage generator 800 generates a plurality of gray voltages V + and V− of the positive (+) and the negative (-) related to the luminance of the liquid crystal display.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n .

In addition, the data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select gray voltages V + and V− from the gray voltage generator 800 as data signals. It is applied to the data lines D ₁ -D _m . As shown in FIG. 3, the data driver 500 includes a plurality of first to tenth data driver ICs 501-510, for example, and the first to tenth data driver ICs 501-510. ) Is sequentially mounted to the upper edge outside the display area (not shown) of the liquid crystal panel assembly 300 in the horizontal direction. Output terminals of the respective data driving ICs 501-510 are connected to the corresponding data lines D ₁ -D _m .

These data driver ICs 501-510 may be mounted on the liquid crystal panel assembly 300 or may be mounted on a separate flexible printed circuit (FPC) substrate. When the data driver ICs 501-510 are mounted on the liquid crystal panel assembly 300, various control signals or data are provided through the FPC board mounted between the liquid crystal panel assembly 300 and the printed circuit board outside the assembly 300. Receive a signal.

The signal controller 600 generates a control signal for controlling operations of the gate driver 400 and the data driver 500, and supplies the corresponding control signal to the gate driver 400 and the data driver 500.

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), main clock (MCLK), data enable signal (DE) is provided. The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input control signal, and adjusts the image signals R, G, and B to match the operating conditions of the liquid crystal panel assembly 300. After appropriately processing, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signals R ', G', and B 'are sent to the data driver 500.

The gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV for controlling the output timing of the gate on pulse, and a gate on pulse. An output enable signal OE or the like that defines a width.

The data control signal CONT2 is a load for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and the data lines D ₁ -D _m . Inverting signal RVS that inverts the polarities of the data voltages for the signals LOAD1, LOAD2 and the common voltage V _com (hereinafter referred to as "polarity of the data voltage" by reducing the "polarity of the data voltage for the common voltage"). And a data clock signal HCLK and the like.

As shown in FIG. 3, the load signals LOAD1 and LOAD2 include first and second load signals LOAD1 and LOAD2, and the first load signal LOAD1 includes first to fifth data driving ICs 501. The second load signal LOAD2 is applied to the sixth to tenth data driving ICs 506-510. On the other hand, the inversion signal RVS is simultaneously applied to the first to tenth data driving ICs 501 to 510.                     

The gray voltage generator 800 generates a plurality of gray voltages related to the luminance of the liquid crystal display and applies them to the data driver 500.

Inter-IC connection lines are formed between the first to tenth data driver ICs 501-510 of the data driver 500 to correspond to one row of pixels according to the data control signal CONT2 from the signal controller 600. The image data R ', G', and B 'are supplied to the data driving IC 501 located on the leftmost side, and then transferred to the next data driving ICs 502-510. In the present embodiment, the image data R ', G', and B 'are sequentially supplied to the next data driver ICs 501-510 through the first data driver IC 501, but the image from the signal controller 600 is supplied. The data R ', G', and B 'may be supplied directly to the respective data driver ICs 501-510.

Then, each data driver IC 501-510 selects a gray voltage corresponding to each of the image data R ′, G ′, and B ′ from among the gray voltages from the gray voltage generator 800, thereby generating the image data R. FIG. ', G', B ') is converted into the corresponding data voltage.

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. Turn on the switching element (Q) connected to.

The gate-on voltage V _on is applied to one gate line G ₁ -G _n so that a row of switching elements Q connected thereto is turned on (this period is referred to as "1H" or "1 horizontal period ( horizontal period) "and the same as one period of the horizontal synchronization signal Hsync, the data enable signal DE, and the gate clock CPV], and the first to fifth data driver ICs of the data driver 400 ( 501-505) and the sixth to tenth data driving ICs 506-510, the corresponding data voltages are supplied to the connected data lines D ₁ -D _m . At this time, the data application timings from the first to fifth data driver ICs 501-505 and the sixth to tenth data driver ICs 506-510 are different from each other. This is described in more detail below. Accordingly, the data voltages supplied from the first to fifth data driver ICs 501-505 and the sixth to tenth data driver ICs 506-510 to the data lines D ₁ -D _m are turned on. Is applied to the corresponding pixel via Q).

In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“line inversion”) within one frame or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS ( "Dot reversal").

Then, the operation of applying the data signal to all the pixel electrodes in one row from the data driver 500 according to the exemplary embodiment of the present invention will be described with reference to FIGS. 4A to 4D and FIGS. 5A to 5D. ) In detail.                     

4 (a) to (d) and 5 (a) to (d) respectively illustrate the first and second load signals LOAD1 and LOAD2 in two consecutive frames according to an embodiment of the present invention. a) and waveform diagrams of the inverted signal b and the corresponding pixel voltages c and d.

First, as shown in FIG. 4A, the first load signal LOAD1 is applied to the first to fifth data driving ICs 501-505 from the signal controller 600, and a predetermined time t is obtained. Thereafter, the second load signal LOAD2 is applied to the sixth to tenth data driving ICs 506 to 510. At the falling edge of the first load signal LOAD1 pulse, the corresponding data voltage is applied to the corresponding pixel from the first to fifth data driving ICs 501-505 through the switching element Q turned on via the data line. Then, when the pulse of the second load signal LOAD2 becomes the falling edge state after the predetermined time t, the switching element Q whose data voltage is turned on from the sixth to tenth load signals LOAD6-LOAD10 through the corresponding data line. Is applied to the corresponding pixel.

At this time, the voltage state of the pixel to which the data voltage is applied is as shown in FIGS. 4C and 4D. That is, the charging voltage of the pixel to which the data voltage from the first to fifth data driver ICs 501-505 is gradually increased as shown in FIG. 4C, and the sixth to tenth data driver ICs 506 to 510. The charging voltage of the pixel to which the data voltage from is changed as shown in FIG. 4 (d) at intervals of a predetermined time (t) from FIG. In this embodiment, the polarities of the data voltages from the first to fifth data driver ICs 501 to 505 and the polarities of the data voltages from the sixth to tenth data driver ICs 506 to 510 are different from each other. The polarities of the charging voltages of (c) and (d) of are also reversed. However, the polarity state of the data voltage is just one example, and may have another type of data polarity state.

As such, the load signals LOAD1 and LOAD2 applied to the first to fifth data driver ICs 501-505 and the sixth to tenth data driver ICs 506-510 have a predetermined time difference t. Each is applied to apply a data voltage corresponding to the pixels of every row for one frame.

At this time, the time difference t between the first and second load signals LOAD1 and LOAD2 does not affect the charging time of the corresponding pixel, and the time before the gate-on voltage V _on of the next row is applied. It is appropriately adjusted within the range not exceeded. In addition, the total pulse widths of the first and second load signals LOAD1 and LOAD2 do not exceed the gate-on voltage width.

5 (a) to 5 (d) show the state of each signal for the next frame. As shown in FIG. 5 (b), the state of the inversion signal RVS is also opposite in polarity to that of the previous frame. The state of charge of the data voltage applied from the first to fifth data driver ICs 501-505 and the sixth to tenth data driver ICs 506-510 is also opposite to that of the previous frame (FIG. 5C). ) And (d)]. Other operations are the same as those described with reference to FIGS. 4A to 4D.

In the exemplary embodiment of the present invention, two load signals, that is, the first and second load signals LOAD1 and LOAD2, are generated to generate the first to fifth data driver ICs 501-505 and the sixth to tenth data driver ICs 506. The number of load signals applied to the data driver ICs 501-510 may vary depending on the operating characteristics of the liquid crystal display device, and the number of load signals LOAD1 and LOAD2 applied to each frame may be changed. The order can also be changed.

According to the present invention, since a plurality of load signals are generated and differentially applied to a plurality of data driver ICs, a time difference occurs at the time of applying the data voltage applied to one pixel. Therefore, when the data voltage is applied to all the pixels in one row at the same time, the phenomenon in which the driving voltage of the data driving IC increases momentarily is reduced, thereby preventing malfunction due to an unstable driving voltage. In addition, EMI phenomena caused by signal interference between neighboring lines are greatly reduced.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (8)

A device for driving a liquid crystal display device comprising a plurality of pixels connected to a gate line and a data line, respectively, and arranged in a matrix form. A gray voltage generator for generating a plurality of gray voltages; A data driver which selects a gray voltage corresponding to the image data among the plurality of gray voltages and applies it to the pixel as a data voltage; and A signal controller supplying the image data to the data driver and generating a control signal for controlling the image data and supplying the image data to the data driver Including, The control signal includes a plurality of load signals for applying a corresponding data voltage to the data line, The data driver includes a plurality of data driver IC groups, and each data driver IC group includes at least one data driver IC. The plurality of load signals are supplied to different data driving IC groups at different times, The order in which the plurality of load signals are applied for each frame is changed. Driving device for liquid crystal display device. In claim 1, And a total pulse width of at least two load signals of the plurality of load signals does not exceed a gate on pulse width. In claim 1, ICs belonging to the respective data driving IC groups are adjacent to each other. In claim 3, And a number of ICs belonging to each of the data driving IC groups is substantially the same. In claim 1, A driving device of a liquid crystal display device in which polarities of data voltages produced by the adjacent data driving IC group are reversed. In claim 1, And a polarity of a line inversion signal applied from the signal controller to each of the data driver IC groups is alternately inverted. delete A method of driving a liquid crystal display including a plurality of pixels connected to a gate line and a data line, respectively, and arranged in a matrix form. Applying a plurality of load signals from the signal controller to the data driver, and Applying a corresponding data voltage to the plurality of pixels from the data driver Including, The plurality of load signals include at least two load signals, and are applied to the data driver at predetermined time intervals. The data driver includes a plurality of data driver IC groups, and each data driver IC group includes at least one data driver IC. The plurality of load signals are supplied to different data driving IC groups at different times, The order in which the plurality of load signals are applied for each frame is changed. Driving method of liquid crystal display device.

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