KR100992129B1 - Liquid crystal display - Google Patents

Abstract

The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display capable of reducing a power consumption of a common voltage generator by applying a plurality of common voltages. A liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly including a plurality of pixels arranged in a matrix form, a common voltage generator for applying a plurality of common voltages to the liquid crystal panel assembly, and a plurality of gray level voltages. A gray voltage generator configured to generate a gray level; and a data driver configured to apply a gray voltage corresponding to an image signal among the gray voltages to the pixel as a data voltage, wherein the liquid crystal panel assembly includes first and second regions, The plurality of common voltages include first and second common voltages, and the common voltage generator applies a predetermined DC voltage to the second region while applying the first common voltage to the first region. The predetermined DC voltage is applied to the first region while the second common voltage is applied to the second region. In this way, by using a single amplifier, the liquid crystal panel assembly is divided into two regions, and a common voltage is applied to reduce the power consumption of the common voltage generator by half.

Common voltage, liquid crystal panel assembly, line inversion, ITO, power, small and medium size, contacts, short circuit

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a circuit diagram of a common voltage corrector 700 according to an exemplary embodiment of the present invention.

4A is a diagram illustrating a method of depositing ITO on an upper portion of a display panel according to an exemplary embodiment of the present invention.

FIG. 4B is a plan view illustrating the display panel shown in FIG. 4A divided into two regions.

5 is a diagram illustrating waveforms of a common voltage according to an exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to form an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to control the transmittance of light passing through the liquid crystal layer to obtain a desired image. At this time, in order to prevent deterioration caused by the application of an electric field in one direction to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row, or dot.

Meanwhile, the liquid crystal display applies a common voltage to the aforementioned common electrode including the common voltage generator. In particular, in the small and medium-sized liquid crystal display, line inversion is performed to invert the polarity of the common voltage row by row for low voltage driving.

In this line inversion, power consumption in the common voltage generator is a problem.

Power consumption is proportional to the product of the square of the common voltage applied and the liquid crystal capacitor that is the load. Since the liquid crystal capacitor is formed for each pixel, the load is formed by the number of pixels.

At this time, when the common voltage is inverted row by row, not only the polarity of any one gate line is changed but also the polarities of all the gate lines are inverted together, so that an effect of increasing the load by the number of pixels occurs and power consumption increases.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of reducing power consumption.

The liquid crystal display according to the exemplary embodiment of the present invention for achieving the technical problem includes a liquid crystal panel assembly, a common voltage generator and a data driver.

The liquid crystal panel assembly includes a plurality of pixels arranged in a matrix form, the common voltage generator applies a plurality of common voltages to the liquid crystal panel assembly, the gray voltage generator generates two sets of gray voltages, The data driver applies a gray voltage corresponding to an image signal among the gray voltages as the data voltage to the pixel. In this case, the liquid crystal panel assembly includes first and second regions, the plurality of common voltages include first and second common voltages, and the common voltage generator includes the first common voltage in the first region. The predetermined DC voltage may be applied to the second region while applying the second DC voltage, and the predetermined DC voltage may be applied to the first region while the second common voltage is applied to the second region.

The first and second common voltages may have a first voltage value and a second voltage value, respectively, and the first voltage value and the second voltage value may be alternately repeated for each row. It is preferable that the polarity is opposite to the common voltage.

On the other hand, the liquid crystal panel assembly includes two display panels consisting of a top plate and a bottom plate, the upper plate is divided into two regions to deposit indium tin oxide (ITO), and the bottom plate to electrically connect the top plate and the bottom plate Two contacts may be formed at the upper and lower edges, respectively.

At this time, the common voltage generator is connected in parallel to the output terminal, the operational amplifier, the non-inverting terminal is connected to a predetermined AC voltage, the inverting terminal is grounded through a first resistor and connected to the output terminal through a second resistor. First and second switching elements, and first and second capacitors connected in series with the first and second switching elements, respectively, wherein the first switching element and the second switching element have a predetermined interval. It is preferable that the first switching element is turned on while the data voltage is applied to the first region, and the first switching element is turned on while the data voltage is applied to the second region. It is preferable that the two switching elements are turned on. In addition, when the data voltage is applied to the boundary between the first region and the second region of the liquid crystal panel assembly, the first switching element and the second switching element are preferably turned on or off at the same time.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of a pixel of a liquid crystal display device according to an embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a common voltage generator 700, and data connected thereto. The driver 500 includes a gray voltage generator 800 connected to the data driver 500 and a signal controller 600 for controlling the gray voltage generator 800.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and arranged in a substantially matrix form. .

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data signal line or data for transmitting a data signal. Line D ₁ -D _m . The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives the common voltages V _com1 and V _com2 . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100, and the separate signal line includes the common voltages V _com1 and V _com2 . A fixed voltage is applied. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front gate line directly above the insulator.

Meanwhile, in order to implement color display, each pixel must display color, which is possible by providing a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. In FIG. 2, the color filter 230 is formed in a corresponding region of the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The common voltage generator 700 generates the common voltages V _com1 and V _com2 and divides the liquid crystal panel assembly 300 into two regions, respectively, and applies them above and below, which will be described in detail later.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltages V _com1 and V _com2 , and the other set has a negative value.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal. It consists of an integrated circuit.

The signal controller 600 generates control signals for controlling operations of the gate driver 400 and the data driver 500, and provides the corresponding control signals to the gate driver 400 and the data driver 500.

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input control signal, and adjusts the image signals R, G, and B to match the operating conditions of the liquid crystal panel assembly 300. After appropriately processing, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signals R ', G', and B 'are sent to the data driver 500.

The gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV for controlling the output timing of the gate on pulse, and a gate on pulse. An output enable signal OE or the like that defines a width.                     

The data control signal CONT2 is a load for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and the data lines D ₁ -D _m . An inverted signal (RVS) that inverts the polarity of the data voltage relative to the signal LOAD, common voltages V _com1 and V _com2 (hereinafter referred to as "polarity of data voltage" by reducing "polarity of data voltage relative to common voltage") ) And the data clock signal HCLK and the like.

The data driver 500 sequentially receives and shifts image data R ', G', and B 'corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and generates a gray voltage. The image data R ', G', B 'is converted into the corresponding data voltage by selecting the gray voltage corresponding to each of the image data R', G ', and B' among the gray voltages from the unit 800. Then, it is applied to the corresponding data line D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. When the switching element Q connected to the () is turned on, the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned on switching element Q.

The difference between the data voltage applied to the pixel and the common voltages V _com1 and V _com2 is represented as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage. As a result, the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“column inversion”) or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS within one frame ( "Dot reversal")

Meanwhile, as described above, the common voltage generator 700 generates the common voltages V _com1 and V _com2 and applies them to the liquid crystal panel assembly 300, which will be described in detail with reference to FIGS. 3 to 5. .

3 is a circuit diagram of a common voltage compensator 700 according to an exemplary embodiment of the present invention, and FIG. 4A is a diagram illustrating a method of depositing ITO on an upper portion of a display panel according to an exemplary embodiment of the present invention, and FIG. 4B is a diagram of FIG. The top view of the display panel shown in 4a divided into two regions. 5 is a diagram illustrating waveforms of a common voltage according to an exemplary embodiment of the present invention.                     

As shown in FIG. 3, the common voltage corrector 700 includes an operational amplifier OP and an output terminal connected thereto.

The operational amplifier OP is a non-inverting amplifier. The non-inverting terminal receives a constant AC voltage Vin, the non-inverting terminal is grounded through the resistor R1, and the output terminal through the resistor R2. Is connected to.

The output terminal is connected in parallel to the switching elements (SW1, SW2), and includes a capacitor (C1, C2) connected in series to each switching element (SW1, SW2), the output of the non-inverting amplifier (OP) is a switching element ( The capacitors C1 and C2 are charged via SW1 and SW2.

When the AC voltage Vin is input, it is amplified with a constant gain and output.

This AC voltage Vin corresponds to a period of 2H. Therefore, based on half of one cycle, that is, 1H, the common voltages V _com1 and V _com2 are _swinged to reverse polarity of each line. Here, the inversion of the polarity does not mean inversion to positive or negative polarity, but rather to change from a high level (for example 5V) to a low level (for example 0V) or from a low level to a high level.

4A shows two display panels 100 and 200 as viewed from the side, and shows two display panels 100 and 200 and contact portions 301 and 302.

When indium tin oxide (ITO) is deposited on the color filter 230, the two display panels are divided into two upper and lower regions, and two contact portions 301 and 302 are formed.

The contact portions 301 and 302 serve as short points that short-circuit the upper and lower plates 100 and 200, so that the common voltages V _com1 and V _com2 shown in FIG. Are applied to the common electrode 270 formed on the front surface of the substrate.

FIG. 4B shows the liquid crystal panel assembly 300 divided into two upper and lower regions, and shows a region to which the common voltages V _com1 and V _com2 are applied. That is, the common voltage V _com1 is applied to the region A, and the common voltage V _com2 is applied to the region B.

5 is a diagram illustrating waveforms of common voltages V _com1 and V _com2 . When the common voltage V _com1 is applied to the upper region A, a constant DC voltage is applied to the lower region B. On the contrary, when the common voltage V _com2 is applied to the lower region B, a constant DC voltage is applied to the upper region A. FIG. Although not shown, the polarity of the data voltage applied from the data driver 500 becomes the polarity opposite to the common voltages V _com1 and V _com2 , and is charged to the liquid crystal capacitor as a pixel voltage that is a difference between the common voltage and the data voltage. .

On the other hand, when the common voltages V _com1 and V _com2 are applied to the two areas A and B in this manner, the common voltages having different polarities are applied to the areas located therebetween, so that the areas A and B are separated. Boundaries may arise. In order to prevent this, as shown in FIG. 5, the switching elements SW1 and SW2 may be turned on or off at the same time to apply the same level of voltage. Here, when the switching elements SW1 and SW2 are turned on, a high level common voltage is applied, and when turned off, a low level common voltage is applied.

Alternatingly applying the two regions A and B of the liquid crystal panel assembly 300 may be controlled by opening and closing the switching elements SW1 and SW2 of FIG. 3. The switching elements SW1 and SW2 may be conventional MOS transistors, and may allow the signal controller 600 to apply a control signal.

In this way, the operational amplifier OP of the common voltage generator 700 is divided into two regions and the common voltages V _com1 and V _com2 are applied, thereby reducing the load by half compared to the conventional method, thereby halving power consumption. Can be reduced. In addition, this may easily contribute to achieving a system on glass (SOG).

As described above, when ITO is deposited on the color filter 230, the deposition is divided into two regions, and the common voltage V _com1 and V _com2 are also applied to the upper region and the lower region accordingly, thereby consuming the common voltage generator. SOG can be easily achieved by reducing the power to half.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (8)

A liquid crystal panel assembly comprising a plurality of pixels arranged in a matrix form, A common voltage generator configured to apply a plurality of common voltages to the liquid crystal panel assembly; A gradation voltage generator for generating two plural gradation voltages, and A data driver which applies a gray voltage corresponding to an image signal among the gray voltages as a data voltage to the pixel; The liquid crystal panel assembly includes first and second regions, The plurality of common voltages include first and second common voltages, The common voltage generator applies a predetermined DC voltage to the second region while applying the first common voltage to the first region, and applies the first common voltage to the second region. The liquid crystal display device applying the predetermined DC voltage. delete In claim 1, The first and second common voltages have a first voltage value and a second voltage value, respectively. The first voltage value and the second voltage value are alternately repeated every row. Liquid crystal display. 4. The method of claim 3, The data voltage has a polarity opposite to that of the common voltage. In claim 4, The liquid crystal panel assembly includes two display panels consisting of an upper plate and a lower plate, The upper plate is divided into two regions to deposit indium tin oxide (ITO), The lower plate has two contact portions formed at lower and upper edges, respectively, for electrically connecting the upper and lower plates. Liquid crystal display. In claim 5, The common voltage generator An operational amplifier having a non-inverting terminal connected to a predetermined AC voltage, an inverting terminal grounded through a first resistor, and connected to an output terminal through a second resistor; First and second switching elements connected in parallel to the output stage, and First and second capacitors connected in series with the first and second switching elements, respectively. Including; The first switching element and the second switching element are alternately turned on at predetermined intervals. Liquid crystal display. In claim 6, And the first switching element is turned on while the data voltage is applied to the first region, and the second switching element is turned on while the data voltage is applied to the second region. In claim 7, And the first switching element and the second switching element are simultaneously turned on or turned off when the data voltage is applied to a boundary between the first region and the second region of the liquid crystal panel assembly.

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