KR100992127B1 - Liquid crystal display - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device that can eliminate variations in horizontal crosstalk.

A liquid crystal panel assembly including an upper panel and a lower panel, a common voltage generator for applying a common voltage to the liquid crystal panel assembly, a data driver for selecting and applying a gray voltage corresponding to an image signal to the pixel as a data voltage, and A common voltage corrector configured to apply a correction common voltage corrected to a common voltage fed back from the upper panel of the liquid crystal panel assembly to the lower panel of the liquid crystal panel assembly, wherein the lower panel includes a plurality of correction voltages to which the corrected common voltage is applied; It includes a short point of and the magnitude of the correction common voltage is different from each other.

In this way, the variation of the horizontal crosstalk can be eliminated by applying and compensating the common voltage having different magnitudes to the lower panel.

Horizontal crosstalk, common voltage, liquid crystal panel assembly, coupling, lower panel, short circuit, feedback

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a circuit diagram of the common voltage corrector illustrated in FIG. 1.

4 is a waveform diagram of signals shown in FIG. 3.

5 is a diagram illustrating a method of applying a common voltage according to an embodiment of the present invention.

The present invention relates to a liquid crystal display device.

A general liquid crystal display device includes two display panels and a liquid crystal layer having dielectric anisotropy interposed therebetween. An electric field is applied to the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. Such liquid crystal displays are typical of portable flat panel displays (FPDs), and among them, TFT-LCD using a thin film transistor (TFT) as a switching element is mainly used.

Meanwhile, the LCD includes a pixel including a switching element, a data line and a gate line connected thereto, and applies a gate-on voltage for turning on the switching element through the gate line, and then applies the data voltage to the pixel through the turned-on switching element. Is authorized.

At this time, a horizontal crosstalk is a problem. When a data voltage of only one polarity of positive or negative polarity is applied to a pixel charged at the same time, the common voltage is distorted or coupled, resulting in an original voltage. By changing higher or lower, there is a difference in the voltage charged in the pixel, which is why the band appears on the screen.

On the other hand, the common voltage is applied to the common electrode of the upper plate and the lower plate, the common electrode and the pixel electrode of the upper plate forms a liquid crystal capacitor, the common electrode and the pixel electrode of the lower plate forms a storage capacitor.

In order to eliminate such horizontal cross-talk, driving is performed to compensate for the distortion by feeding back the distortion of the common voltage of the upper plate. One is to invert the distorted common voltage and compensate it in addition to the common voltage, and the other is to add and compensate the data voltage as much as the distorted common voltage.

At this time, when the distortion of the common voltage is applied in the first method, a so-called short point is applied to the upper and lower plates of the liquid crystal panel assembly to apply the compensated voltage thereto. By the way, the upper plate has a plurality of short points, but the lower plate has one short point.

The shorting point of the lower plate is located at the top of the panel, and when only a compensated voltage is applied to this point, there is a difference in horizontal crosstalk at the top and the bottom of the panel. This is because as the distance from the short-circuit point applied as a delay phenomenon along the length of the data line decreases, the amount of compensation decreases. This makes the difference between crosstalk visible and visible at the top and bottom of the panel.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of eliminating horizontal crosstalk and variations thereof.

According to an aspect of the present invention, there is provided a liquid crystal display device including a liquid crystal panel assembly including an upper panel and a lower panel, a common voltage generator for applying a common voltage to the liquid crystal panel assembly, and an image to the pixel. A data driver which selects and applies a gray voltage corresponding to a signal as a data voltage, and applies a correction common voltage corrected to a common voltage fed back from the upper panel of the liquid crystal panel assembly to the lower panel of the liquid crystal panel assembly. The lower panel includes a plurality of short-circuit points to which the corrected common voltage is applied, and the corrected common voltages have different magnitudes.

The common voltage corrector may include first and second operational amplifiers and first and second inverters. The non-inverting terminals of the first and second operational amplifiers are connected to the common voltage. It may be connected to the feedback voltage via a capacitor and a resistor and to the output terminal via another resistor.

The common voltage corrector may further include first and second inverters connected to each of the first and second operational amplifiers.

Here, the correction common voltage may include first and second correction common voltages, and the second correction common voltage may be greater than the first correction common voltage.

In addition, the lower panel may include a region to which the first corrected common voltage is applied and a region to which the second corrected common voltage is applied.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.                     

FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of a pixel of a liquid crystal display device according to an embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a common voltage beam connected thereto. The government 700 includes a gray voltage generator 800 connected to the data driver 500 and a signal controller 600 for controlling the gray voltage generator 800.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and arranged in a substantially matrix form. .

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data signal line or data for transmitting a data signal. It includes the line (D ₁ -D _m ). The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100, and a common voltage V _com is applied to the separate signal line. In addition, the common voltage VFB fed back from the upper panel 200 is compensated and the compensated common voltage V ′ _com is applied. The storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front gate line directly above the insulator.

Meanwhile, in order to implement color display, each pixel must display color, which is possible by providing a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. In FIG. 2, the color filter 230 is formed in a corresponding region of the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal. It consists of a circuit.

The common voltage corrector 700 compensates the feedback voltage VFB of the common voltage V _com and applies it to the lower panel 100, which will be described in detail later.

The signal controller 600 generates control signals for controlling operations of the gate driver 400 and the data driver 500, and provides the corresponding control signals to the gate driver 400 and the data driver 500.                     

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input control signal, and adjusts the image signals R, G, and B to match the operating conditions of the liquid crystal panel assembly 300. After appropriately processing, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signals R ', G', and B 'are sent to the data driver 500.

The gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV for controlling the output timing of the gate on pulse, and a gate on pulse. An output enable signal OE or the like that defines a width.

The data control signal CONT2 is a load for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and the data lines D ₁ -D _m . Signal LOAD, inverted signal RVS and data that inverts the polarity of the data voltage with respect to common voltage V _com (hereinafter referred to as " polarity of data voltage " by reducing " polarity of data voltage with respect to common voltage "). Clock signal HCLK and the like.

The data driver 500 sequentially receives and shifts image data R ', G', and B 'corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and generates a gray voltage. The image data R ', G', B 'is converted into the corresponding data voltage by selecting the gray voltage corresponding to each of the image data R', G ', and B' among the gray voltages from the unit 800. Then, it is applied to the corresponding data line D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. When the switching element Q connected to the () is turned on, the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned on switching element Q.

The difference between the data voltage applied to the pixel and the common voltage V _com is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage. As a result, the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltage V _on is sequentially applied to all the gate lines G ₁ -G _n during one frame to apply the data voltage to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“column inversion”) or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS within one frame ( "Dot reversal")

Next, the liquid crystal display according to the exemplary embodiment of the present invention will be described in more detail with reference to FIGS. 3 to 5.

3 is a circuit diagram of the common voltage corrector illustrated in FIG. 1, FIG. 4 is a waveform diagram of signals illustrated in FIG. 3, and FIG. 5 is a diagram illustrating a method of applying a common voltage according to an exemplary embodiment of the present invention. .

As shown in FIG. 3, the common voltage corrector 700 includes a plurality of operational amplifiers OP1 and OP2 and inverters INV1 and INV2.

The operational amplifiers OP1 and OP2 are differential amplifiers, the non-inverting terminal (+) is connected to the common voltage V _com , and the inverting terminal (-) connects the capacitors C1 and C2 and the resistors R1 and R3. Are respectively connected to the feedback voltage VFB.

In addition, output terminals of the operational amplifiers OP1 and OP2 are connected to the inverters INV1 and INV2, respectively.

The feedback voltage VFB is a voltage in which the common voltage V _com is distorted, that is, a coupled common voltage, and is a voltage having a form of alternating current as it rises or falls as the data voltage rises or falls. Capacitors C1 and C2 pass only this alternating current component and open when a direct current component is input.

The operational amplifiers OP1 and OP2 amplify the difference between the feedback voltage VFB and the common voltage V _com , and the inverters INV1 and INV2 invert the same to show the common voltages V _com1 and V as shown in FIG. 4. _com2 ).

The common voltages V _com1 and V _com2 are output voltages of the feedback voltage VFB through the common voltage corrector 700 and are applied to have a phase opposite to the feedback voltage VFB as shown in the drawing. Create a waveform like a dotted line.

Meanwhile, as shown in FIG. 5, the common voltage V _com1 is applied above the lower panel 100, and the common voltage V _com2 is applied below the lower panel 100. At this time, the common voltage V _com2 is preferably larger than the common voltage V _com1 .

This is considered because the coupling common voltage increases as the lower side of the lower panel 100 increases, and as shown in FIG. 5, the common electrode is divided into two regions A and B to form a common electrode. It may be authorized. In addition, a separate wiring and a short point (not shown) are formed to be applied to each region.

In this way, when a horizontal crosstalk deviation occurs in the upper and lower portions of the lower panel 100, the horizontal crosstalk is improved by adding a separate wiring and applying a common voltage V _com2 , and at the same time, the horizontal crosstalk. Even the torque deviation can be eliminated to obtain a uniform screen.

As described above, by applying common voltages V _com1 and V _com2 having different magnitudes to the lower panel 100, a uniform screen can be obtained by eliminating horizontal crosstalk variation.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (5)

A liquid crystal panel assembly comprising an upper panel and a lower panel including a plurality of pixels; A common voltage generator configured to apply a common voltage to the liquid crystal panel assembly; A data driver which selects and applies a gray voltage corresponding to an image signal to the pixel as a data voltage; and A common voltage corrector configured to apply a plurality of corrected common voltages correcting a common voltage fed back from the upper panel of the liquid crystal panel assembly to the lower panel of the liquid crystal panel assembly Including, The lower panel includes a plurality of short circuit points to which the corrected common voltage is applied. The plurality of corrected common voltages are different in magnitude. Liquid crystal display. In claim 1, The common voltage corrector includes first and second operational amplifiers, Non-inverting terminals of the first and second operational amplifiers are connected to the common voltage, and an inverting terminal is connected to the feedback common voltage via a capacitor and a resistor and the first and second arithmetic operation through another resistor. Connected to the output terminals of each amplifier Liquid crystal display. In claim 2, The common voltage corrector further includes first and second inverters connected to the first and second operational amplifiers, respectively. 4. The method of claim 3, The correction common voltage includes a first and second correction common voltage, The second corrected common voltage is greater than the first corrected common voltage Liquid crystal display. In claim 4, The lower panel includes a region to which the first correction common voltage is applied and a region to which the second correction common voltage is applied.

Images