KR20050050896A - Liquid crystal display - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display capable of compensating coupling of a kick-back voltage and a common voltage.

A liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly including a plurality of pixels, a common voltage generator for applying a common voltage to the liquid crystal panel assembly, and a reference voltage generator for generating two sets of reference voltages. A plurality of data driving integrated circuits generating a plurality of gray voltages based on the reference voltage and selecting and applying a gray voltage corresponding to an image signal to the pixel, and a common voltage fed back from the liquid crystal panel assembly. And a common voltage corrector configured to correct and apply the correction to the data driver integrated circuit.

In this way, a good quality liquid crystal display device can be obtained by compensating the coupling amount between the kickback voltage and the common voltage according to the position of the liquid crystal panel assembly.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

The present invention relates to a liquid crystal display device.

A general liquid crystal display device includes two display panels and a liquid crystal layer having dielectric anisotropy interposed therebetween. An electric field is applied to the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. Such liquid crystal displays are typical among portable flat panel displays (FPDs) that are easy to carry. Among them, TFT-LCDs using thin film transistors (TFTs) as switching elements are mainly used.

Such a liquid crystal display includes a pixel including a switching element, a data driver for applying a corresponding data voltage to the pixel, a reference voltage generator for generating a reference voltage and supplying the data voltage to the data driver, and a common voltage to the liquid crystal panel assembly. It provides a common voltage generator.

The reference voltage generator generates a gray voltage of positive and negative polarity for inversion driving, and the data driver selects a gray voltage corresponding to an image signal among a plurality of gray voltages and applies it to the pixel as a data voltage.

At this time, a method of supplying a gray voltage includes a method of generating all necessary gray voltages in advance and supplying them to the data driver, and supplying some gray voltages as a reference, and dividing the rest within the data driver IC. Recently, as the number of bits of data increases, the number of gradation voltages to be expressed also increases, and usually the latter method is employed.

For example, in the latter method, for 8-bit data, all the gradation voltages required are 256, of which 8 to 16 reference gradation voltages (hereinafter referred to as "reference voltages" by reducing the reference gradation voltages). And the values therebetween are generated by a certain rule in the IC of the data driver.

Meanwhile, in the liquid crystal display, a kickback voltage is necessarily generated due to the parasitic capacitance between the gate and drain of the switching element, which causes flicker, crosstalk, and gate whitish. do.

In order to compensate for the kickback voltage, it is currently difficult to accurately compensate for the feedback by compensating for the common voltage at one short point and applying it to the entire liquid crystal panel assembly.

In addition, the common voltage is not supplied with a constant direct current by coupling with the data voltage, but the phenomenon of rising or falling in the form of a pulse higher or lower than the common voltage applied at the rising and falling edges of the data voltage occurs. In the form of alternating current, distortion of the common voltage occurs.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of compensating coupling between a kickback voltage and a common voltage.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a liquid crystal panel assembly, a common voltage generator, a reference voltage generator, a plurality of data driving integrated circuits, and a common voltage corrector. Include.

The common voltage generator applies a common voltage to the liquid crystal panel assembly, the reference voltage generator generates two sets of reference voltages, and the data driving integrated circuit generates a plurality of gray voltages based on the reference voltage. The gray voltage corresponding to the image signal is selected and applied to the pixel, and the common voltage corrector corrects the common voltage fed back from the liquid crystal panel assembly and applies it to the data driving integrated circuit. Here, the reference voltage generator may include a plurality of reference voltage generators, and each of the reference voltage generators may include a resistor string having resistors connected in series. The reference voltage generation circuit may include first to twelfth reference voltage generation circuits, and the first reference voltage generation circuit may include a resistor string having one end connected to a power supply voltage and the other end grounded. Each of the second to twelfth reference voltage generation circuits may include first to third resistor strings having one end connected to the power supply voltage and the other end grounded. The first and third resistor strings respectively generate first gray voltages having different polarities with respect to the center voltage, and the second resistor strings generate second gray voltages having different polarities with respect to the center voltage. It is preferable. In addition, the magnitudes of the first and second gray voltages generated by the first to twelfth reference voltage generation circuits may be determined in consideration of kick-back voltages of the liquid crystal panel assembly.

The data driver integrated circuit may include first to twelfth data driver integrated circuits, and outputs from the first to twelfth reference voltage generators may be applied to the first to twelfth data driver integrated circuits, respectively. desirable. In this case, the liquid crystal panel assembly includes first to twelfth short points for outputting the feedback common voltage, and the common voltage corrector is configured to output the feedback common voltages from the first to twelfth short points. It is preferable to apply the correction to the first to twelfth data driver integrated circuits.

The common voltage corrector may include first to twelfth operational amplifiers, and the inverting terminals of the respective operational amplifiers receive the feedback common voltage through a capacitor and a resistor, and are connected to an output terminal through another resistor. The non-inverting terminal is preferably applied with the same voltage as the common voltage applied to the liquid crystal panel assembly.

On the other hand, it is preferable that the short circuit points are respectively located on the left side of the data driving integrated circuit, and each output from the common voltage corrector is applied to the data driving integrated circuit located on the right side of the short circuit point.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a common voltage compensator 700, and data connected thereto. The driver 500 includes a reference voltage generator 800 connected to the data driver 500 and a signal controller 600 for controlling the driver 500.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and arranged in a substantially matrix form. .

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data signal line or data for transmitting a data signal. Line D ₁ -D _m . The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100, and a predetermined voltage such as a common voltage V _com is applied to the separate signal line. Is approved. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

Meanwhile, in order to implement color display, each pixel must display color, which is possible by providing a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. In FIG. 2, the color filter 230 is formed in a corresponding region of the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The reference voltage generator 800 generates two sets of gradation voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The common voltage corrector 700 applies the voltage V _com 'compensated by the distorted common voltage from the liquid crystal panel assembly 300 to the data driver 500, which will be described in detail later.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal. It consists of a circuit.

The signal controller 600 generates control signals for controlling operations of the gate driver 400 and the data driver 500, and provides the corresponding control signals to the gate driver 400 and the data driver 500.

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input control signal, and adjusts the image signals R, G, and B to match the operating conditions of the liquid crystal panel assembly 300. After appropriately processing, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signals R ', G', and B 'are sent to the data driver 500.

The gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV for controlling the output timing of the gate on pulse, and a gate on pulse. An output enable signal OE or the like that defines a width.

The data control signal CONT2 is a load for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and the data lines D ₁ -D _m . Signal LOAD, inverted signal RVS and data that inverts the polarity of the data voltage with respect to common voltage V _com (hereinafter referred to as " polarity of data voltage " by reducing " polarity of data voltage with respect to common voltage "). Clock signal HCLK and the like.

The data driver 500 sequentially receives and shifts image data R ', G', and B 'corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and generates a gray voltage. The image data R ', G', B 'is converted into the corresponding data voltage by selecting the gray voltage corresponding to each of the image data R', G ', and B' among the gray voltages from the unit 800. Then, it is applied to the corresponding data line D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. When the switching element Q connected to the () is turned on, the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned on switching element Q.

The difference between the data voltage applied to the pixel and the common voltage V _com is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage. As a result, the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“column inversion”) or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS within one frame ( "Dot reversal").

Meanwhile, the reference voltage generator 800 of the liquid crystal display according to the exemplary embodiment of the present invention generates a plurality of reference voltages as a reference and supplies the data to each data driving IC, and the common voltage corrector 700 supplies the common voltage Vcom. The feedback is compensated for and then applied to the data driver IC, which will be described in detail with reference to FIGS. 3 to 5.

First, the reference voltage generator 800 will be described.

3 is a circuit diagram of the reference voltage generator 800 according to an exemplary embodiment of the present invention, and shows some of the reference voltage generators.

As shown, the reference voltage generator 800 includes a plurality of reference voltage generators 801 to 812, and each of the reference voltage generators includes a resistor string. Here, only a part is shown for convenience of description.

The reference voltage generation circuits 801-812 generate and apply a reference voltage for each IC including, for example, twelve elements located in the data driver 500.

The reference voltage generation circuit 801 for generating a reference voltage applied to the data driving IC # 1 includes the resistor strings R11-R118 required to generate the reference voltage as in the conventional reference voltage generator.

One end of the resistor lines R11-R118 is connected to the power supply voltage AVDD, the other end is grounded, and is connected to each other in series to distribute the voltage. The resistor strings R11 to R118 are all composed of 18 resistors to generate 16 gray reference voltages, each of eight positive and negative polarities.

For example, for a normally black liquid crystal display, positive and negative white gray voltages (V _PW1 , V _NW1 ) and a center voltage V _CNT are interposed therebetween. Positive and negative black voltages (V _PB1 , V _NB1 ) and reference voltages V _REF1 -V _REF6 , V _REF7 -V _REF12 located between them are generated. Here, the white gray voltages V _PW1 and V _NW1 and the black gray voltages V _PB1 and V _NB1 are used in the data driver 500 as they are, and the voltages V _REF1 -V _REF6 and V _REF7 -V _{REF12 between them.} ) Is divided by the gray level needed again through the resistor string provided in the data driver 500.

The reference voltage generation circuit 802 for generating a reference voltage applied to the data driving IC # 2 includes resistor strings R21-R28.

One end of the resistor lines R21 and R22 and the resistor lines R27 and R28 is connected to the power supply voltage AVDD and the other end is grounded to generate the positive and negative white gray voltages V _PW2 and V _NW2 , respectively. .

One end of the resistor lines R23-26 is connected to the power supply voltage AVDD and the other end is grounded to generate positive and negative black gray voltages V _PB2 and V _NB2 .

Here, the resistor string 802 generates only the positive and negative white gray voltages V _PW2 and V _NW2 and the positive and negative black gray voltages V _PB2 and V _NB2 to the data driver 500. The remaining gray voltage is generated using the reference voltage generated by the reference voltage generator 801. Since the other reference voltage generation circuits 803 to 812 are the same, detailed description thereof will be omitted.

The white gray voltage and the black gray voltage generated using each resistor string are determined in consideration of the kickback voltage. Since the kickback voltage is most affected by the white gray voltage and the black gray voltage, the kickback voltage is compensated separately. Also, the kickback voltage gradually decreases as the distance from the gate driver 400 increases. The resistance value of the resistance column of each of the reference voltage generation circuits 801 to 812 is adjusted in the direction of decreasing the gray scale voltage.

In this way, the influence of the kickback voltage can be minimized by generating and applying a reference voltage for each data driver IC.

Next, the common voltage corrector 700 will be described.

4 is a circuit diagram illustrating an example of a common voltage corrector 700 according to an exemplary embodiment of the present invention, and FIG. 5 is a diagram illustrating a driving device of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the common voltage corrector 700 includes a plurality of resistors, capacitors, and operational amplifiers OP1, OP7, and OP12 connected thereto. In reality, all twelve operational amplifiers are included, but only some of them are shown in the drawing.

The resistor includes a resistor R41 connected to the power supply voltage AVDD, a plurality of resistor rows R42-R47 parallel to the resistor 41, and resistors R48 and R49 connected in series thereto.

The operational amplifier OP1 is a differential amplifier, the inverting terminal of which is connected to the feedback voltage V _FB1 through the capacitor C1 and the resistor R11 and to the output terminal through the resistor R12. have. The non-inverting terminal is connected between the resistors R42 and R43 and receives the same voltage as the common voltage V _com . That is, the value of the resistors is adjusted so that the node voltage between the resistors R42 and 43 produces the same voltage as the original common voltage V _com .

Here, the capacitors C1, C7, and C12 are used to cut off the DC voltage, and the common voltages V _FB1, V _{FB7, and} V _{FB12 that} are fed back are coupled to the data voltage and are waveforms with a distorted waveform. When the direct current comes in, it means that a constant common voltage (V _com ) is applied, so there is no need to compensate.

Inverting terminals and non-inverting terminals of the operational amplifiers OP7 and OP12 are also connected to the operational amplifier OP1 in the same manner. However, the feedback voltages V _FB7 and V _FB12 applied through the capacitors C7 and C12 are different.

The common voltage corrector 700 receives the feedback voltages VFB1-VFB12 from the short points SP1-SP12 of the liquid crystal panel assembly 300, corrects the feedback voltages, and provides the correction voltage to the data driving integrated circuit.

As shown in FIG. 5, the feedback voltages V _FB1 , V _FB7 , and V _FB12 are output from short points SP1, SP71, and SP12 of the liquid crystal panel assembly 300, respectively. Although the drawing shows that the feedback voltage is output at a specific short point, it is actually output at all short points SP1-SP12.

One short point SP1-SP12 is provided at the left side of each of the data driver ICs in accordance with the number of data driver ICs in the liquid crystal panel assembly 300, and each coupled common voltage is formed from each short point SP1-SP12. To draw. This is because the amount of coupling of the data voltage and the common voltage V _com varies depending on the position of the liquid crystal panel assembly 300.

The operational amplifiers OP1, OP7, and OP12 receive the feedback voltages V _FB1 , V _FB7 , and V _FB12 , and compensate for the difference from the common voltage V _com to each common voltage V _com1 , V _com7 , and V _com12 . Will output The common voltages V _com1 , V _com7 , and V _com12 thus output are input to the data driver 500 as shown in FIG. 5.

More specifically, the common voltages V _com1 , V _com7 , and V _com12 from the common voltage corrector 700 are input to the nearest data driving IC, respectively. For example, the feedback voltage V _FB1 drawn out from the short point SP1 is output to the common voltage V _com1 through the common voltage corrector 700 and input to the data driving IC # 1. The common voltage V _com1 is applied to the liquid crystal panel assembly 300 through a dummy channel among data channels provided in the data driving IC. In other words, if it is drawn out at any of the short-circuit points SP1-SP12, a compensation voltage is applied to the closest part of the drawn part to maximize the compensation effect.

In the above description, the normally black liquid crystal display device is described as an example, but it is obvious that the normally black liquid crystal display device is also applied. In addition, although the number of the data driver ICs constituting the data driver 500 is given as an example, the number may be more or less.

In this way, the reference voltage is generated and applied separately for each data driving IC to minimize the pixel voltage, which is a difference between the data voltage and the common voltage due to the kickback voltage, and also to pull out the feedback voltage from every short-circuit point, thereby for each data driving IC. By maximizing the reward effect. By compensating for the coupling of the kickback voltage and the common voltage which affect the image quality simultaneously, a good quality liquid crystal display device can be obtained.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a circuit diagram of a reference voltage generator according to an exemplary embodiment of the present invention.

4 is a circuit diagram of a common voltage corrector according to an exemplary embodiment of the present invention.

5 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

Claims (11)

A liquid crystal panel assembly comprising a plurality of pixels, A common voltage generator configured to apply a common voltage to the liquid crystal panel assembly; A reference voltage generator for generating two sets of reference voltages; A plurality of data driving integrated circuits generating a plurality of gray voltages based on the reference voltage, and selecting and applying a gray voltage corresponding to an image signal to the pixel; A common voltage corrector for correcting a common voltage fed back from the liquid crystal panel assembly and applying it to the data driving integrated circuit. Liquid crystal display comprising a. In claim 1, The reference voltage generator includes a plurality of reference voltage generators, Each of the reference voltage generating circuits includes a resistor string having resistors connected in series. Liquid crystal display. In claim 2, One of the plurality of reference voltage generation circuits includes a resistor string having one end connected to a power supply voltage and the other end grounded. In claim 3, And each of the remaining circuits of the reference voltage generation circuit includes first to third resistance lines having one end connected to the power supply voltage and the other end grounded. In claim 4, The first and third resistor lines respectively generate first gray voltages having different polarities with respect to a center voltage. In claim 5, The second resistor string generates a second gray voltage having different polarities with respect to the center voltage. In claim 6, The first and second gray level voltages generated by the reference voltage generation circuit are determined in consideration of a kick-back voltage of the liquid crystal panel assembly. In claim 7, And a plurality of outputs from the plurality of reference voltage generators are applied one-to-one to the plurality of data driver integrated circuits. In claim 8, The liquid crystal panel assembly includes a plurality of short points for outputting the feedback common voltage, The common voltage corrector corrects the feedback common voltage from the short-circuit point and applies the data to the data driving integrated circuit in a one-to-one manner. Liquid crystal display. In claim 9, The common voltage corrector A plurality of operational amplifiers, The inverting terminal of each of the operational amplifiers receives the feedback common voltage through a capacitor and a resistor and is connected to the output terminal through another resistor, and the non-inverting terminal has a voltage equal to the common voltage applied to the liquid crystal panel assembly. felled Liquid crystal display. In claim 10, The short circuit points are respectively located on the left side of the data driving integrated circuit, Each output from the common voltage corrector is applied to the data driver integrated circuit located to the right of the short circuit point. Liquid crystal display.