KR20060022501A - Liquid crystal display - Google Patents

Abstract

The present invention relates to a liquid crystal display device, comprising: a liquid crystal panel assembly including a plurality of pixels, and a common voltage generator for extracting a pixel voltage from the pixels, generating an average value of the pixel voltages, and outputting the pixel voltage as a common voltage, The data voltage applied to the pixel has positive polarity and negative polarity in units of two frames, and is substantially the same size based on a common voltage. As described above, the pixel voltages of the positive and negative data voltages are directly extracted and averaged to generate a common voltage considering the kickback voltage of the actual pixel electrode.

Liquid crystal display, pixel voltage, common voltage, flicker, afterimage

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is an equivalent circuit diagram of a pixel capable of extracting a pixel voltage in a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 4 is a diagram in which the pixel illustrated in FIG. 3 is disposed in a liquid crystal panel assembly.

5 is a block diagram of a common voltage generator of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 6 is a diagram illustrating waveforms of pixel voltages in units of frames in a liquid crystal display according to an exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device.

In general, a liquid crystal display (LCD) includes two display panels including a pixel electrode and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to generate an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. In this case, in order to prevent degradation caused by an electric field applied to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row by pixel, or pixel by pixel.

However, when inverting the polarity of the data voltage, the positive and negative polarities of the pixel voltage become asymmetrical due to the parasitic capacitance present in the thin film transistor. Occurs.

In order to prevent the flicker phenomenon and the afterimage, the common voltage is adjusted so that the positive and negative polarities of the pixel voltages are symmetrical in consideration of the kickback voltage using a variable resistor.

However, since the variable resistor is manually adjusted by the operator, it is difficult to adjust the common voltage, and it takes a long time due to the position or structure of the variable resistor.

 An object of the present invention is to provide a liquid crystal display device capable of automatically adjusting the common voltage such that the positive and negative polarities of the pixel voltages are symmetrical.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a liquid crystal panel assembly including a plurality of pixels, and extracts pixel voltages from the pixels, generates an average value of the pixel voltages, and outputs the result as a common voltage. The common voltage generator includes a common voltage generator, and the data voltage applied to the pixel has positive polarity and negative polarity in units of two frames, and has substantially the same size based on the common voltage.

The common voltage generator may average the pixel voltages of two frames.

The common voltage generator may include an integrator that integrates the pixel voltage for two frames, an average unit that receives an integral value from the integrator, calculates the average value, and a buffer that maintains the average value from the average unit for two frames. Can be.

The common voltage generator may be initialized in units of two frames according to a reset signal.

The liquid crystal panel assembly may include a signal line connected between the switching element of the pixel and the pixel electrode to transfer the pixel voltage.

The pixel may be disposed at a corner of the liquid crystal panel assembly, and the common voltage may be applied to the corner.                     

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver The gray voltage generator 800, the common voltage generator 700, and the signal controller 600 controlling the gray voltage generator 800 connected thereto are included.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels Px connected to the plurality of display signal lines G ₁ -G _n and D ₁ -D _m , which are arranged in a substantially matrix form. .

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data line D for transmitting a data signal. ₁ -D _m ). The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q, such as a thin film transistor, is provided in the lower panel 100, and the control terminal and the input terminal are three-terminal elements, respectively, with gate lines G ₁ -G _n and data lines D ₁ -D _m . The output terminal is connected to a liquid crystal capacitor (C _LC ) and a holding capacitor (C _ST ).

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST , which serves as an auxiliary part of the liquid crystal capacitor C _LC , is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage V _com is applied to this separate signal line. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

On the other hand, to implement color display, each pixel uniquely displays one of the three primary colors (spatial division) or each pixel alternately displays the three primary colors over time (time division) so that the desired color can be selected by the spatial and temporal sum of these three primary colors. To be recognized. 2 illustrates that each pixel includes a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The common voltage generator 700 generates a common voltage V _com , which becomes a reference voltage of the liquid crystal display, and supplies the generated common voltage V _com to the liquid crystal panel assembly 300.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal.

The gate driver 400 or the data driver 500 is mounted directly on the liquid crystal panel assembly 300 in the form of a plurality of driving integrated circuit chips, or mounted on a flexible printed circuit film (not shown). And may be attached to the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP). Alternatively, the gate driver 400 or the data driver 500 may be integrated in the liquid crystal panel assembly 300.

The signal controller 600 controls operations of the gate driver 400 and the data driver 500.

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 may control the input image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 properly processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate control signal. After generating the CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to

The gate control signal (CONT1) includes at least one clock signal and the like to control the output of the scan start instruction to start the scanning of the gate-on voltage (V _on) signal (STV) and the gate-on voltage (V _on).

The data control signal CONT2 is a horizontal synchronization start signal STH for transmitting data of one pixel row, a load signal LOAD for applying a corresponding data voltage to the data lines D ₁ -D _m , and a common voltage V _com. ), The inversion signal RVS, the data clock signal HCLK, and the like, which inverts the polarity of the data voltage (hereinafter, referred to as "polarity of the data voltage" by reducing the "polarity of the data voltage" with respect to the common voltage)).

The data driver 500 receives the image data DAT for one row of pixels according to the data control signal CONT2 from the signal controller 600, and displays each image among the gray voltages from the gray voltage generator 800. By selecting the gray scale voltage corresponding to the data DAT, the image data DAT is converted into the corresponding data voltage and then applied to the data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G1 -Gn according to the gate control signal CONT1 from the signal controller 600, and applies the gate lines G ₁ -G _n to the gate lines G ₁ -G _n . The connected switching element Q is turned on, and thus a data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned on switching element Q.

The difference between the data voltage applied to the pixel and the common voltage V _com is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The arrangement of the liquid crystal molecules varies according to the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame is started and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to the polarity of the previous frame ("frame"reversal"). In this case, the polarities of the data voltages flowing through one data line are changed according to the characteristics of the inversion signal RVS even in one frame (eg, inverted rows and inverted dots) or the polarities of the data voltages applied to one pixel row are also different from each other. (Eg: nirvana, point inversion).

The plurality of pixels Px includes at least one pixel Pr capable of drawing the pixel voltage V _P charged in the pixel electrode 190, which will be described in detail with reference to the accompanying drawings.

FIG. 3 is an equivalent circuit diagram of a pixel capable of extracting a pixel voltage in a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 4 is a view showing the pixel shown in FIG. 3 disposed on the liquid crystal panel assembly.

As shown in FIG. 3, the liquid crystal panel assembly 300 includes a signal line 176 connected between the switching element Q for the pixel Pr and the pixel electrode 190. The signal line 176 extends along the liquid crystal panel assembly 300 and transmits the pixel voltage V _P to the outside.

On the other hand, pixels may be extracted to the pixel voltage (V _P) to the electrode line (176) directly connected to the pixel electrode 190 and kept instead of the signal line 176, electrode line (not shown), a pixel voltage (V _P) by using the It can also be extracted.

Since the pixel Pr is substantially the same as the pixel illustrated in FIG. 2 except for the pixel electrode line 176, a description thereof will be omitted.

As shown in FIG. 4, the pixel Pr includes four pixels P1, P2, P3, and P4 disposed at four corners of the liquid crystal panel assembly 300. Here, a common voltage V _com is applied to each corner portion. Each corner of the pixel voltage take-pixel (P1, P2, P3, P4), the charge and discharge characteristics difference of the pixel electrode 190, a lot of the pixel voltage drawn here as an I section (V _P) is a liquid crystal panel assembly (300 from each other in ) Represents the characteristics of the whole.

Meanwhile, the pixels P1, P2, P3, and P4 may be disposed in some of four corners or at some of edges of the liquid crystal panel assembly 300 or in any internal region of the liquid crystal panel assembly 300, as necessary. Can also be adjusted.

Next, a common voltage generator according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 5 and 6.

5 is a block diagram of a common voltage generator of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 5, the common voltage generator 700 includes an integrator 710, an average unit 720, and a buffer 730.

The common voltage generator 700 receives the pixel voltage V _P from the pixels P1, P2, P3, and P4 and generates a common voltage V _com based on the pixel voltage V _P.

The integrator 710 integrates the input pixel voltage V _{P in} units of two frames. As an integrator, a conventional operational amplifier can be used.

The average unit 720 receives the integrated value from the integrator 710 and calculates and outputs an average of two frames. The average unit 720 may also use an operational amplifier and generate an average value by amplifying a voltage.

The buffer 730 receives the output value from the average unit 720 and outputs it as the common voltage V _com . The buffer 730 reads an output value from the average unit 720 every two frames and maintains the value for two frames.

An operation of generating the common voltage V _{com by the} common voltage generator 700 will be described in detail with reference to FIG. 6.

FIG. 6 is a diagram illustrating waveforms of pixel voltages in units of frames in a liquid crystal display according to an exemplary embodiment of the present invention.

In the liquid crystal display according to the exemplary embodiment, it is assumed that two data voltages, positive and negative, are applied to a pixel with respect to one image signal. That is, an input video signal of 30 Hz is converted into a 60 Hz output data voltage and displayed, and an input video signal of 60 Hz is converted into an output data voltage of 120 Hz and displayed. As shown in FIG. 6, the pixel Pr is subjected to the positive and negative pixel voltages symmetrical with respect to the common voltage V _com .

The external reset signal RST input to the integrator 710, the average unit 720, and the buffer 730 is a signal for initializing them every two frames.                     

Reset signal (RST) is applied when a change in a positive signal at the negative pixel voltage (V _P). The reset signal RST may be generated by the signal controller 600 and exported to the common voltage generator 700.

In the initialized state according to the reset signal RST, the integrator 710 integrates the pixel voltages V _P corresponding to the two frames, outputs an integrated value, and then initializes the reset signal RST again.

The average unit 720 averages the integral values input from the integrator 710 to two frames and transfers them to the buffer 730 and is initialized according to the reset signal RST to receive the next integral value from the integrator 710. .

The buffer 730 outputs the average value received from the average unit 720 as the common voltage V _com and maintains this value until the reset signal RST is applied.

The common voltage V _com generated as described above is the average of the positive and negative pixel voltages V _P of the previous two frames and is output after two frames have passed since the power is applied to the liquid crystal display. However, since the two frames are shorter than the time when the liquid crystal display is completely turned on, the two frames do not affect the display of the image signal.

As such, by directly extracting and averaging the pixel voltages of the positive and negative data voltages, a common voltage considering the kickback voltage of the actual pixel electrode may be automatically generated.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (6)

A liquid crystal panel assembly comprising a plurality of pixels, and A common voltage generator which extracts a pixel voltage from the pixel, generates an average value of the pixel voltages, and outputs the common voltage as a common voltage. Including; The data voltage applied to the pixel has positive polarity and negative polarity in units of two frames and has substantially the same magnitude based on the common voltage. Liquid crystal display. In claim 1, The common voltage generator averages the pixel voltages of two frames. In claim 2, In claim 1, The common voltage generator, An integrator that integrates the pixel voltage for two frames, An average unit which receives an integral value from the integrator and calculates the average value, and A buffer holding the average value from the average portion for two frames Liquid crystal display comprising a. In claim 3, The common voltage generator is initialized in units of two frames according to a reset signal. In claim 1, The liquid crystal panel assembly includes a signal line connected between the switching element of the pixel and the pixel electrode and transmitting the pixel voltage. In claim 5, The pixel is disposed at a corner of the liquid crystal panel assembly, and the common voltage is applied to the corner.

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