KR20050077850A - Liquid crystal display and driving method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an impulsive driving liquid crystal display device, wherein the types of data voltages applied to odd-numbered pixel rows in one frame are different from those of data voltages applied to even-numbered pixel rows. In addition, the application order of data voltages applied between neighboring frames is also different. The data voltage includes a normal data voltage corresponding to the normal data and a black data voltage corresponding to the black data for impulsive driving. In this way, the normal data voltage and the black data voltage are alternately applied to each pixel row, and the data application order between neighboring frames is reversed. Since the black data voltage is inserted, impulsive driving is performed without increasing the frame frequency. Is improved.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF}

The present invention relates to a liquid crystal display and a driving method thereof.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, an electric field is generated in the liquid crystal layer by applying a data voltage and a common voltage to the pixel electrode and the common electrode, respectively, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. . In this case, in order to prevent deterioration caused by the application of an electric field in one direction for a long time, the polarity of the data voltage with respect to the common voltage is inverted on a frame, row, or pixel basis.

However, when the polarity of the data voltage is inverted as described above, the response speed of the liquid crystal molecules is slow, so that it takes a long time for the liquid crystal capacitor to charge to the target voltage, so that the screen is not clear and blurring occurs. In order to solve this problem, an impulsive driving method for inserting a black screen for a short time has been developed.

Such an impulsive driving method turns off the backlight lamp at a predetermined cycle to make the entire screen black (impulsive emission type) and applies a black data voltage to the pixel at a constant cycle in addition to the normal data voltage that is substantially involved in the display (cyclic resetting type). There is).

However, these methods still do not compensate for the late response speed of the liquid crystal, but also the response speed of the backlight lamp is slow, there is a problem that the image quality is deteriorated due to the afterimage of the screen or flicker occurs. In particular, in the case of applying the black data voltage, the application time of the normal data voltage is shortened, so that the liquid crystal capacitor does not reach the target voltage.

The technical problem to be achieved by the present invention is to solve this problem, and to implement an impulsive implementation without reducing the application time of the normal data voltage.

According to an aspect of the present invention for achieving the above technical problem,

A plurality of gate lines transferring a gate-on voltage,

A plurality of data lines alternately transferring a normal data voltage and an impulsive data voltage;

A plurality of pixel rows connected to the gate line and the data line and including a switching element that is connected by the gate-on voltage to transfer the data voltage;

A gate driver connected to each of the gate lines to sequentially apply the gate-on voltage, and

A data driver for applying the data voltage to the data line

Including,

The type of data voltage applied to one pixel row is different from the type of data voltage applied to adjacent pixel rows,

The order of applying the data voltages applied to one frame is different from the order of applying the data voltages applied to adjacent frames.

The present invention may further include a signal controller which controls the gate driver and the data driver and applies the image data corresponding to the data voltage to the data driver.

The image data includes normal data corresponding to the normal data voltage and impulsive data corresponding to the impulsive data voltage, and the order of applying the normal data and the impulsive data applied for one frame is for an adjacent frame. It is preferable to be different from the order of application.

The signal controller alternately transfers the data in the pixel row unit in the order of the impulsive data and the normal data when the odd-numbered frame, and in the order of the normal data and the impulsive data when the even-numbered frame, The data may be alternately transferred in the pixel row unit.

Another aspect of the present invention is a driving method of a liquid crystal display device including a plurality of pixel rows including a switching element connected to a plurality of gate lines and a plurality of data lines.

In one frame, turning on the switching device by sequentially applying a gate-on voltage to the gate line,

Applying one data voltage of a normal data voltage and an impulsive data voltage to one pixel row through the data line;

Applying a remaining data voltage to another pixel row adjacent to the pixel row through the data line, and

In the next frame, the step is repeated, and the order of applying the data voltage applied to each pixel row in the previous frame is reversed.

Preferably, the impulsive data voltage is a black data voltage, and the application period of the normal data voltage and the impulsive data voltage may be one horizontal period.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display and a driving method thereof according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. The gray voltage generator 800 connected to the signal generator 500 and a signal controller 600 for controlling the gray voltage generator 800 are included.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m in an equivalent circuit, and arranged in a substantially matrix form. In terms of structure, the lower panel 100, the upper panel 200, and the liquid crystal layer 3 therebetween are included.

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n transmitting gate signals (also called scan signals) and data lines D ₁ transferring data signals. It includes -D _m). gate lines (G ₁ -G _n) may extend substantially in a row direction and extending in the column direction are substantially parallel to each other and almost the data line (D ₁ -D _m) thereof is also substantially from each other Parallel

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is a three-terminal element such as a thin film transistor provided in the lower panel 100, and is a control terminal connected to the gate line G ₁ -G _n and the data line D ₁ -D _m , respectively. It has an input terminal and an output terminal connected to a liquid crystal capacitor (C _LC ) and a holding capacitor (C _ST ).

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the entire surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST , which serves as an auxiliary part of the liquid crystal capacitor C _LC , is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage V _com is applied to this separate signal line. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

On the other hand, in order to implement color display, each pixel may uniquely display one of a predetermined number of primary colors (spatial division) or each pixel may alternately display the primary colors over time (time division). In this way, the desired color can be recognized in time. 2 shows that each pixel includes a color filter 230 in an area corresponding to the pixel electrode 190 as an example of spatial division. The color of the color filter 230 may be three colors of red, green, and blue, which are three primary colors of light, or four colors of which white (or transparent) is added to these three primary colors. In addition, three primary colors of cyan, magenta, and yellow may be used independently or in combination with three primary colors of light. Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to gate signals formed of a combination of a gate on voltage Von and a gate off voltage Voff from the outside. Applied to (G ₁ -G _n ).

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal. Is done.

The gate driver 400 or the data driver 500 is mounted on a tape carrier package (TCP) (not shown) in the form of an integrated circuit (IC) chip and attached to the liquid crystal panel assembly 300. It may be directly mounted on the liquid crystal panel assembly 300 without TCP (chip on glass, COG mounting method), or may be formed directly on the liquid crystal panel assembly 300 together with the thin film transistor of the pixel.

The signal controller 600 controls operations of the gate driver 400 and the data driver 500.

The display operation of such a liquid crystal display device will now be described in detail.

The signal controller 600 may input red, green, and blue three-color image signals R, G, and B and an input control signal, for example, a vertical synchronization signal, from an external graphic controller (not shown). Vsync), a horizontal sync signal (Hsync), a main clock (MCLK), and a data enable signal (DE). The signal controller 600 appropriately processes the image signals R, G, and B according to the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and performs a gate control signal CONT1. And after generating a control signal such as a data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to

In this case, the image signal DAT includes normal data generated based on the input image signals R, G, and B and black data that minimizes the luminance of the pixel for impulsive driving. The pixels are alternately output. Therefore, the normal data and the black data are alternately output once during one horizontal period (or " 1H ") (one period of the horizontal synchronization signal Hsync and the data enable signal DE).

The gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate-on voltage Von, a gate clock signal CPV for controlling the output timing of the gate-on voltage Von, and a gate-on voltage ( An output enable signal OE or the like that defines the duration of Von).

The data control signal CONT2 includes a horizontal synchronization start signal STH indicating the start of input of the image data DAT, a load signal LOAD for applying a data voltage to the data lines D ₁ -D _m , and a common voltage V. _com ), the inversion signal RVS, the data clock signal HCLK, and the like, which inverts the polarity of the data voltage (hereinafter, referred to as "polarity of the data voltage" by reducing the "polarity of the data voltage with respect to the common voltage"). .

The data driver 500 sequentially receives and shifts normal data or black data for one row of pixels according to the data control signal CONT2 from the signal controller 600, and the gray voltage from the gray voltage generator 800. By selecting the gray scale voltage corresponding to each of the image data DAT, the image data DAT is converted into the corresponding data voltage and applied to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage Von to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600. Then, the switching element Q connected to the gate lines G ₁ -G _n is turned on, so that the data voltage applied to the data lines D ₁ -D _m is connected to the corresponding pixel through the turned on switching element Q. Is approved.

The difference between the data voltage applied to the pixel and the common voltage V _com is represented as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage, and the liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage. Accordingly, the polarization of the light passing through the liquid crystal layer 3 changes, and the change in the polarization is represented by the change in the transmittance of the light by polarizers (not shown) attached to the display panels 100 and 200.

After one horizontal period, the data driver 500 and the gate driver 400 repeat the same operation with respect to the pixels in the next row. In this manner, the gate-on voltages Von are sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“line inversion”) within one frame or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS ( "Dot reversal").

Next, an impulsive driving method of the liquid crystal display according to the exemplary embodiment of the present invention will be described in detail with reference to FIG. 3.

3 (a) and 3 (b) are diagrams illustrating a form in which black data voltages are applied in odd-numbered and even-numbered frames, respectively, according to an embodiment of the present invention.

As described above, the signal controller 600 alternately provides the normal data and the black data to the data driver 500 as the image data DAT, while the vertical synchronization start signal STV, the output enable signal OE, The gate clock signal CPV is provided to the gate driver 400 to perform scanning.

The data voltages applied to the plurality of data lines D1 -Dm are illustrated as two types, a normal data voltage corresponding to normal data and a black data voltage corresponding to black data. In an embodiment of the present invention, when an odd numbered frame, a black data voltage is applied to an odd pixel row and a normal data voltage is applied to an even pixel row. On the contrary, in the even-numbered frame, the normal data voltage is applied to the odd-numbered pixel rows and the black data voltage is applied to the even-numbered pixel rows. To this end, when the image data DAT is applied to the data driver 500 by the signal controller 600, the odd-numbered frame image data DAT transmits black data instead of the image signal corresponding to the odd-numbered pixel rows. Normal image signals of even-numbered pixel rows are transmitted as they are, so that black data and normal image data are alternately applied in units of pixel rows. In addition, even-numbered frame image data (DAT) transmits normal image signals of odd-numbered pixel rows as they are, but transmits black data instead of image signals corresponding to even-numbered pixel rows. Alternately. As described above, since the normal data voltage and the black data voltage are alternately applied to each pixel row, the application time of the normal data voltage and the black data voltage is 1H, respectively.

Although the black data voltage is applied to the odd-numbered pixel rows and the normal data voltage is applied to the even-numbered pixel rows in the embodiment of the present invention, the normal data voltage and the black data voltage are vice versa. Although alternately applied, it is apparent that the order of applying the normal data voltage and the black data voltage according to the frame order may be changed. In this case, the application order of the normal data and the black data of the image data DAT applied to the data driver 500 by the signal controller 600 may also be changed in accordance with the application order of the data voltage.

The scan of the normal data voltage and the black data voltage will now be described in more detail.

First, in the first frame, which is an odd numbered frame, the signal controller 600 generates a pulse for applying data to the vertical synchronization start signal STV applied to the gate driver 400.

The gate driver 400 receiving the pulse of the vertical synchronization signal STV outputs the gate-on voltage Von of which the pulse width is determined according to the output enable signal OE in order from the first gate line G1. Therefore, the black data voltage and the normal data voltage are alternately applied from the pixel row connected to the first gate line G1 to the pixel row connected to the last gate line Gn. As a result, each pixel row in turn charges its data voltage.

That is, in the odd-numbered frame, since the signal controller 600 alternately applies the black data after the black data to the data driver 600 for each pixel row, the black data voltage is applied to the pixel row connected to the odd-numbered gate line and the even-numbered pixel row is applied. The normal data voltage is applied to the pixel row connected to the gate line (Fig. 3 (a)).

After the data scanning operation for the first frame is finished, the signal controller 600 applies a data application pulse to the vertical synchronization start signal STV applied to the gate driver 400 to scan the data for the even-numbered second frame. Create

As described above, the vertical synchronization start signal STV causes the gate driver 400 to generate a gate-on voltage Von having a pulse width determined by the output enable signal OE from the first gate line G1. The last gate line Gn is sequentially applied.

However, in the even-numbered frame, since the signal controller 600 alternately applies normal data followed by black data to the data driver 600 for each pixel row, the normal data voltage is applied to the pixel row connected to the odd-numbered gate line, and even-numbered pixels are applied. A black data voltage is applied to the pixel row connected to the gate line (Fig. 3B).

In the subsequent frames, the application order of the black data and the normal data in the odd and even frames is reversed, so that the black data voltage and the normal data voltage are alternately applied for each pixel row.

As such, when the odd and even frames are interlaced with the pixel rows to which the black data voltage and the normal data voltage are applied, one completed image and one black frame are obtained when the two frames are combined. As a result, the black data voltage can be inserted without increasing the frame frequency, so that an impulsive implementation effect is obtained and image quality deterioration due to a reduction in the data charging time of the pixel is reduced. In addition, since the black data voltage and the normal data voltage are alternately applied in units of pixel rows in this manner, when the TV broadcast signal is transmitted using the National Television System Committee (NTSC) method, a separate deinterlace processing operation is not necessary. Processing efficiency and processing time can be reduced.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As such, since the impulsive implementation is performed without increasing the frame frequency, the data voltage charging time of the pixel is not reduced and the image quality of the liquid crystal display is improved.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 (a) and 3 (b) are diagrams illustrating a form in which black data voltages are applied in odd-numbered and even-numbered frames, respectively, according to an exemplary embodiment of the present invention.

Claims (10)

A plurality of gate lines transferring a gate-on voltage, A plurality of data lines alternately transferring a normal data voltage and an impulsive data voltage; A plurality of pixel rows connected to the gate line and the data line and including a switching element that is connected by the gate-on voltage to transfer the data voltage; A gate driver connected to each of the gate lines to sequentially apply the gate-on voltage, and A data driver for applying the data voltage to the data line Including, The type of data voltage applied to one pixel row is different from the type of data voltage applied to adjacent pixel rows, The order of applying the data voltages applied to one frame is different from the order of applying the data voltages applied to adjacent frames. Liquid crystal display. In claim 1, And a signal controller configured to control the gate driver and the data driver and to apply image data corresponding to the data voltage to the data driver. In claim 2, The image data includes normal data corresponding to the normal data voltage and impulsive data corresponding to the impulsive data voltage, And an application order of the normal data and the impulsive data applied for one frame is different from an application order applied for the adjacent frame. In claim 3, And the signal controller alternately transfers the data in the pixel row unit in the order of the impulsive data and the normal data when an odd numbered frame is used. In claim 3, And the signal controller alternately transfers the data in the pixel row unit in the order of the normal data and the impulsive data when the frame is even. The method of claim 4 or 5, The impulsive data voltage is a black data voltage. In claim 6, And an application period of the normal data voltage and the impulsive data voltage is one horizontal period, respectively. A driving method of a liquid crystal display device including a plurality of pixel rows including switching elements connected to a plurality of gate lines and a plurality of data lines. In one frame, turning on the switching device by sequentially applying a gate-on voltage to the gate line, Applying one data voltage of a normal data voltage and an impulsive data voltage to one pixel row through the data line; and Applying a remaining data voltage to another pixel row adjacent to the pixel row through the data line; In the next frame, repeating the above steps and reversing the application order of the data voltages applied to each pixel row in the previous frame as opposed to the application order in the previous frame. Method of driving a liquid crystal display comprising a. In claim 8, The driving time of the normal data voltage and the impulsive data voltage is 1 horizontal period, respectively. In claim 9, And the impulsive data voltage is a black data voltage.