KR100824378B1 - Apparatus for comparing bit reverse amplitude of word and method thereof - Google Patents

Abstract

Disclosed are a bit reverse order comparison apparatus and method of a word. The lower bit extraction unit extracts the lower part bits of the word, and the bit reverse order generation unit generates the bit reverse order values for the lower partial bit values by referring to the lookup table. The comparison unit compares the generated bit inverse order value with a preset maximum value, and the controller determines to perform the extraction operation, the generation operation, and the comparison operation repeatedly for all the words to determine the word having the maximum value. In the case where there are a plurality of words having a maximum value, the bit transition unit transitions the lower part bits in the lower bit direction, and the controller controls the repeated operation to repeatedly perform the extraction operation, the generation operation, and the comparison operation. Have the word that is uniquely determined. As a result, the amount of computation is reduced when the size comparison with respect to the bit inverse conversion value of the word is performed, and the comparison time can be shortened.

Bitwise, Word, GUID, Lookup Table, IEEE 1394

Description

Apparatus for comparing bit reverse amplitude of word and method approximately}

1 is a block diagram showing the configuration of an embodiment of a bit reverse order size comparison apparatus of a word according to the present invention;

2 is a view showing an example of a lookup table stored in the bit reverse order size comparison apparatus of the word according to the present invention;

FIG. 3 is an initial value of a storage space indicating an index of entries having a maximum bit-reverse size of a partial bit in a GUID list. In the indexing process, all values are compared at the beginning of an operation. A drawing that indicates that each GUID value is the same and is the maximum value, and that an index number is given for the maximum value,

Figure 4a is a view showing the results of each process in performing the operation according to an embodiment of the device for comparing the bit reverse order size of the word according to the present invention,

FIG. 4B is a diagram illustrating an index number indicating a number of GUIDs having a maximum value and an index number of a GUID having a maximum bit reverse order read from a lookup table based on the lower four bit values described with reference to FIG. 4A;

5A is a view showing the result of each process in performing an operation of determining a GUID having a maximum value among the plurality of GUIDs when there are a plurality of GUIDs having a maximum value;                 

5B is a diagram showing the number of GUIDs having a maximum value and an indexing number having a maximum value;

FIG. 6A is a diagram illustrating a result of shifting GUID values having indexing numbers of 1 and 2 by 4 bits from the upper bit to the lower bit when the GUID having the maximum value is two;

FIG. 6B is a diagram showing the number of GUIDs having the maximum bit reverse value and the index number of the GUID having the maximum bit reverse value, and FIG.

7 is a flowchart illustrating an embodiment of a method for comparing bit inverse sizes of words according to the present invention.

The present invention relates to an apparatus and method for comparing a bit reverse order of a word, and more particularly, to compare a bit reverse order of a word in order to perform a process of finding the largest value by comparing the size of the bit in the reverse order of the word. An apparatus and method are provided.

Conventionally, the method of finding the largest of the words first compared the sizes by making all the words in bit reverse order. Applying such a conventional method, there is a problem in that the process of converting bits in reverse order takes a lot of processing time due to a large amount of computation.

In particular, in the construction of a home network between devices employing an IEEE 1394 serial bus, in the process of determining a home network controller, the global unique identifiers (GUIDs) are reversed in bit order, and bit sizes are reversed. It is not desirable that the conversion takes much time.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a fast comparison apparatus and method for a bit inverse order size of a word that can reduce processing time in converting bits of a word in reverse order and comparing sizes.

In order to achieve the above technical problem, a bit reverse order size comparison apparatus of a word according to the present invention includes a lower bit extraction unit for extracting lower N bit values from a word; A bit reverse value generation unit generating a bit reverse value for the lower N bit values; A comparison unit comparing a bit reverse order value corresponding to the lower N bit values with a preset maximum value; And control the lower bit extracting unit, the bit reverse value generating unit, and the comparing unit to perform the extracting operation, the generating operation, and the comparing operation on all the words, and the lower bit extracting unit according to the comparison result for the word. And a controller configured to determine the word having the maximum number of N bit values.

Preferably, the lower bit extracting unit extracts the lower N bits through the AND operation of the word with respect to a masking bit value.

Preferably, the bit reverse size comparison apparatus of the word according to the present invention further includes a storage unit for storing a look-up table in which bit reverse order values for the lower N bit values are stored, and the bit reverse value generation unit The bit reverse values for the N bit values are read from the lookup table.

Preferably, the bit reverse size comparison apparatus of the word according to the present invention further comprises a bit transition unit for shifting the word by N bits from the upper bit direction to the lower bit direction, wherein the control unit has a maximum number of N lower bit values. In the case where there are a plurality of in-words, a control signal for performing a transition operation on the plurality of words is output to the bit transition unit, and the lower bit extraction unit, the bit reverse value generation unit, and the plurality of words for which the transition is completed are performed. The comparison unit controls to perform the extraction operation, the generation operation, and the comparison operation, and determines the word having the maximum number of lower N bit values according to the comparison result for the plurality of words in which the transition is completed.

On the other hand, the bit reverse order size comparison method of the word according to the present invention comprises the steps of: extracting the lower N bit values from the word; Generating a bit reverse order value for the lower N bit values; Comparing the bit reverse order with a preset maximum value; And determining the word having the largest bit reverse order value according to the comparison result.

Preferably, the extracting step extracts the lower N bits of the word through an AND operation with a masking bit value.

Preferably, the bit reverse order size comparison method of the word according to the present invention, when there are a plurality of words having the maximum number of the N low-bit value, the word for the plurality of words in the direction from the upper bit to the lower bit by N number of the plurality of words The method further includes the step of transitioning, and the extraction step and the determination step are repeated for the transitioned word.                     

As a result, the processing time can be shortened in comparing the sizes of the GUIDs of the respective devices in a reverse order on a network composed of devices equipped with a word, in particular, an IEEE 1394 serial bus.

Hereinafter, an apparatus and method for comparing bit reverse order sizes of words according to the present invention will be described in detail with reference to the accompanying drawings. In the following description, the word is a GUID of devices equipped with an IEEE 1394 serial bus.

1 is a block diagram showing a configuration of an embodiment of a bit reverse order size comparison apparatus of a word according to the present invention.

Referring to FIG. 1, the bit reverse order size comparison apparatus 100 according to the present invention includes a lower bit extracting unit 110, a bit reverse order value generation unit 120, a comparison unit 130, a control unit 140, And a storage unit 150 and a bit transition unit 160.

The lower bit extraction unit 110 extracts the lower N bit values from the GUIDs. In general, the GUID is composed of 64 bits and N may be any number less than or equal to 64. Hereinafter, for convenience of description, the number of GUIDs is four and N is four. In this case, four bits are logically multiplied with a masking bit having a bit value of 1111 from the least significant bit of the 64-bit GUID to extract the lower four bit values. The lower bit extracting unit 110 extracts the lower four bit values and preferably creates the total number of GUIDs in an index form.

The bit reverse value generator 120 generates bit reverse values for the lower four bit values. The bit inverse value can be obtained by shifting the lower four bit values or by using other logic elements.                     

However, it is preferable to generate the bit reverse value using the lookup table rather than obtaining the bit reverse value through the above method. First, the lower four bit values extracted from the lower bit extraction unit 110 are determined as reference numbers. The bit reverse order value is read from the lookup table using the reference number to generate the bit reverse value. This lookup table is stored in the storage 150.

2 is a diagram illustrating an example of a lookup table. Referring to Fig. 2, the lookup table records possible bit values that four bits can have and bit reverse values for each bit value. Each bit value corresponds to values corresponding to the lower four bits of the GUID to be compared.

Figure 4a is a view showing the results of each process in performing the operation according to an embodiment of the bit reverse order size comparison apparatus of the word according to the present invention. Referring to FIG. 4A, reference numerals of respective GUIDs generated by the lower bit extraction unit 110 are recorded in the first column. In addition, the value of each GUID is recorded in the second column, and the four bits displayed separately are the lower four bit values, which are used to read the bit reverse order corresponding to the reference numbers of the lookup table. In the third column, reference numbers on the lookup table corresponding to the lower four bit values are recorded. In column 3, the number in parentheses corresponds to the value of the reference number. Finally, in the fourth column, the bit reverse value read from the lookup table using the reference number is recorded.

The comparison unit 130 compares the bit reverse order values corresponding to the lower N bit values with a preset maximum value. Whether the maximum value of each GUID corresponds is compared by the comparison unit 130. On the other hand, when the number of the GUID is created in the indexing form in the process of extracting the lower four bit values for the first GUID, the GUID having the maximum value can be represented as the index number of the maximum GUID. FIG. 3 is an initial value of a storage space indicating an index of entries having a maximum bit-reverse size of a partial bit in a GUID list. In the indexing process, all values are compared at the beginning of an operation. Assuming that each GUID value is the same and maximum, it indicates that an index number is given for the maximum value.

Meanwhile, FIG. 4B is a diagram illustrating an index number indicating a number of GUIDs having the maximum value and the index number of the GUID having the largest bit reverse order size read from the lookup table based on the lower four bit values described with reference to FIG. 4A. to be. In FIG. 4B, the first column represents the number of GUIDs having the maximum value, and the third column represents the indexing number of the GUID having the maximum value. Therefore, referring to FIG. 4B, it can be seen that the value of the GUID having the indexing number 2 has the maximum value.

The control unit 140 performs a lower bit extracting unit 110, a bit reverse value generating unit 120, and a comparison unit 130 to perform the extraction operation, the bit reverse value generation operation, and the comparison operation with respect to the entire word. The GUID of the lower four bit values is determined according to the result of comparing the values of each GUID. Therefore, the control unit 140 compares the bit inverse values of the lower four bit values in the order of the given indexing numbers for each GUID, and compares each other with each other. Decide on As described with reference to FIGS. 4A and 4B, when there is one GUID having the maximum value, the controller outputs a control signal to each component to terminate the comparison with the GUID.                     

On the other hand, the bit reverse size comparison apparatus 100 of the word according to the present invention further includes a bit transition unit 160 for shifting the GUID from the upper bits to the lower bit direction, the control unit 140 is four lower When there are a plurality of GUIDs having the maximum bit values, a control signal for performing a transition operation for each GUID is output to the bit transition unit 160, and the lower bit extraction unit 110 and the bit for the plurality of GUIDs for which the transition is completed. The inverse value generator 120 and the comparer 130 control the extraction operation, the generation operation, and the comparison operation, and the lower four bit values are maximum according to a comparison result for the plurality of GUIDs for which the transition is completed. It is desirable to determine the GUID.

5A is a diagram showing the result of each process in performing an operation of determining a GUID having a maximum value among the plurality of GUIDs when there are a plurality of GUIDs having a maximum value. Referring to FIG. 5A, it can be seen that the bit reverse values of the GUIDs having the indexing numbers 1 and 2 are equal to 14. In this case, the number of GUIDs having the maximum value and the indexing number having the maximum value are shown in FIG. 5B.

As shown in FIGS. 5A and 5B, when two GUIDs have the maximum values, the bit transition unit 160 shifts the GUID values having the indexing numbers 1 and 2 by 4 bits from the upper bits to the lower bits. This transition result is shown in the second column of FIG. 6A. 6A is a diagram showing the results of each process in performing an operation according to another embodiment of the apparatus for comparing the bit reverse order sizes of words according to the present invention.

In the state where each GUID value is shifted by 4 bits, the lower bit extracting unit 110 extracts the lower four bit values as described above, and the bit inverse net value generating unit 120 uses the extracted lower four bit values. Generates the bit reverse order for the lower four bits. Since the operations of the lower bit extracting unit 110 and the bit reverse order value generating unit 120 are the same as described above, detailed description thereof will be omitted. The comparator 130 compares the bit inverse values and it can be seen from FIG. 6B that the GUID having the maximum bit inverse value is the GUID having the index number 2 by the operation of the comparator 130. 6B shows the number of GUIDs having the maximum bit order value and the index number of the GUID having the maximum bit order value.

The control unit 140 operates the bit transition unit 160, the lower bit extraction unit 110, the bit reverse value generation unit 120, and the comparison unit 130 until the GUID having the maximum bit reverse order value becomes one. To control.

7 is a flowchart illustrating an embodiment of a method for comparing bit inverse sizes of words according to the present invention.

 Referring to FIG. 7, the lower bit extraction unit 110 extracts the lower four bit values from the GUID (S700). The bit reverse order generation unit 120 searches for a lookup table stored in the storage unit 150 by referring to the lower four bit values and reads the bit reverse order value from the lookup table (S710).

The comparison unit 130 receives the lower four bit reverse order values for the GUID to be compared currently from the bit reverse value generation unit 120 and compares them with a preset maximum value (S720). The maximum value is initially set to zero. If the lower four bit reverse order values for the current GUID to be compared are greater than the preset maximum value, the controller 140 sets the corresponding bit reverse order values to the maximum value according to the comparison result of the comparison unit 130 (S730). Controls to perform the low bit extraction process for the next GUID.

When the comparison process for the GUID to be compared is completed, the controller 140 determines whether the comparison of the entire GUID is completed (S740). If there is a GUID to be compared, the steps S700 to S730 are repeated until the comparison is completed for the entire GUID. The number of GUIDs to be compared is preferably set before the start of the comparison operation. However, when the lower bit extraction process is collectively performed for all the GUIDs, it is desirable to grasp the total number of GUIDs during the lower bit extraction.

If the comparison of the entire GUID is completed, the controller 140 determines whether two or more GUIDs having a maximum value exist (S750). If the GUID having the maximum value is uniquely determined, the controller 140 ends the comparison process. On the other hand, if there are two or more GUIDs having the maximum value, the controller 140 outputs a control signal to the bit transition unit 160 to shift the lower four bits for the plurality of GUIDs having the maximum value.

The bit transition unit 160 shifts the lower four bits in the direction of the upper bit to the lower bit with respect to the plurality of GUIDs having the maximum value (S760). When the transition to the lower bit is completed, the controller 140 controls to repeatedly perform the steps S700 to S740 on the GUIDs of which the transition is completed, thereby extracting the GUID having the maximum value again. If there are a plurality of GUIDs having the maximum value again in this process, the controller 140 controls to perform the steps S750 to S760 so that one GUID having the maximum value is finally extracted. Specific examples of each process are the same as those described with reference to FIGS. 4A to 6B, and thus detailed descriptions thereof will be omitted.

According to the apparatus and method for comparing a bit reverse order size of a word according to the present invention, a bit reverse order is taken for only a part of lower bits using a lookup table in which bit reverse order conversion values are recorded, and partial sizes are compared. If the word is not determined, it is possible to reduce the time required for bit reverse conversion and to increase the operation speed by sequentially repeating a process of comparing the next some bits again.

In addition, when the present invention is applied to the process of determining the home network controller in a network composed of devices equipped with the IEEE 1394 serial bus, the process of comparing the bit reverse order size of the GUID for each device can be performed at high speed. There is an advantage that the time required for the determination of the control device can be shortened.

Claims (14)

A lower bit extracting unit extracting lower N bit values from a word; A bit reverse value generation unit generating a bit reverse value for the lower N bit values; A comparison unit comparing a bit reverse order value corresponding to the lower N bit values with a preset maximum value; And Controlling the sub-bit extraction unit, the bit reverse value generation unit, and the comparison unit to perform the extraction operation, the bit reverse value generation operation, and the comparison operation with respect to the entire word, and according to the comparison result with respect to the word And a controller configured to determine the word having the maximum number of the lower N bit values. The method of claim 1, And the lower bit extracting unit extracts the lower N bits of the word by performing a logical multiplication with a masking bit value. The method of claim 1, And a storage unit storing a lookup table in which bit reverse order values of the lower N bit values are recorded. And the bit reverse order value generating unit reads the bit reverse order values for the lower N bit values from the lookup table. The method of claim 3, wherein And the lookup table includes a lookup table reference number in which the N bit values are arranged in size order and a bit reverse value in which the reference numbers are arranged in bit reverse order. The method of claim 1, And a bit shift part for shifting the word from the upper bit to the lower bit by N bits. The control unit outputs a control signal to the bit transition unit to perform a transition operation on the plurality of words when there are a plurality of words having the maximum number of N lower bit values, and the lower level of the plurality of words in which the transition is completed. A bit extracting unit, a bit reverse order value generating unit, and the comparing unit to perform the extraction operation, the generating operation, and the comparing operation, and the lower N bit values according to the comparison result for the plurality of words in which the transition is completed. And determining the word that is the largest bit. The method of claim 5, The control unit generates a control signal to repeatedly perform the operations of the bit transition unit, the lower bit extraction unit, the bit reverse order value generation unit, and the comparison unit until the word having the maximum number of the lower N bit values is determined. Bit reverse order size comparison device, characterized in that for outputting. The method according to any one of claims 1 to 6, And said word is a unique identification number of a device equipped with an IEEE 1394 serial bus. Extracting the lower N bit values from the word; Generating a bit reverse order value for the lower N bit values; Comparing the bit reverse order with a preset maximum value; And And determining the word having the largest bit reverse order value according to the comparison result. The method of claim 8, And the extracting step extracts the lower N bits of the word through a logical multiplication with a masking bit value. The method of claim 8, And the bit reverse order value is read from a lookup table based on the lower N bits. The method of claim 10, And the lookup table includes a lookup table reference number in which values for the N bits are arranged in size order and a bit reverse value in which the reference numbers are arranged in bit reverse order. The method of claim 8, Transitioning the word from the upper bit to the lower bit direction by N number of the plurality of words when the number of words having the maximum number of N lower bit values is maximum; And repeating the extracting step to the determining step for the transitioned word. The method of claim 12, And repeating the steps from the transition step to the determination step until the word having the maximum number of the lower N bit values is uniquely determined. The method according to any one of claims 8 to 13, And said word is a unique identification number of a device equipped with an IEEE 1394 serial bus.

Images